CY62147CV25

47V CY62147CV25/30/33 MoBL™ 256K x 16 Static RAM Features • High Speed — 55 ns and 70 ns availability • Voltage range: — CY62147CV25: 2.2V–2.7V — CY62147CV30: 2.7V–3.3V — CY62147CV33: 3.0V–3.6V • Pin Compatible with CY62147V • Ultra-low active power — Typical active current: 1.5 mA @ f = 1 MHz • • • • — Typical active current: 5.5 mA @ f = fmax (70 ns speed) Low standby power Easy memory expansion with CE and OE features Automatic power-down when deselected CMOS for optimum speed/power cantly reduces power consumption by 80% when addresses are not toggling. The device can also be put into standby mode reducing power consumption by more than 99% when deselected (CE HIGH or both BLE and BHE are HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH), outputs are disabled (OE HIGH), both Byte High Enable and Byte Low Enable are disabled (BHE, BLE HIGH), or during a write operation (CE LOW and WE LOW). Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A17). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A17). Reading from the device is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins will appear on I/O0 to I/O7. If Byte High Enable (BHE) is LOW, then data from memory will appear on I/O8 to I/O15. See the truth table at the back of this data sheet for a complete description of read and write modes. The CY62147CV25/30/33 are available in a 48-ball FBGA package. Functional Description The CY62147CV25/30/33 are high-performance CMOS static RAMs organized as 256K words by 16 bits. These devices feature advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life™ (MoBL™) in portable applications such as cellular telephones. The devices also have an automatic power-down feature that signifi- Logic Block Diagram DATA IN DRIVERS A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 ROW DECODER 256K x 16 RAM Array 2048 x 2048 SENSE AMPS I/O0 – I/O7 I/O8 – I/O15 COLUMN DECODER BHE WE CE OE BLE A11 A12 A13 A14 A15 A16 CE Pow er Down Circuit BHE BLE Cypress Semiconductor Corporation Document #: 38-05202 Rev. *A • 3901 North First Street A17 • San Jose • CA 95134 • 408-943-2600 Revised April 24, 2002 CY62147CV25/30/33 MoBL™ Pin Configuration[1, 2] 1 BLE I/O8 I/O9 VSS VCC I/O14 I/O15 NC 2 OE BHE I/O10 I/O11 FBGA (Top View) 4 3 5 A0 A3 A5 A17 A1 A4 A6 A7 A16 A15 A13 A10 A2 CE I/O1 I/O3 I/O4 I/O5 WE A11 6 NC I/O0 I/O2 Vcc Vss I/O6 I/O7 NC A B C D E F G H I/O12 DNU I/O13 NC A8 A14 A12 A9 Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ................................. –65°C to +150°C Ambient Temperature with Power Applied............................................. –55°C to +125°C Supply Voltage to Ground Potential ... –0.5V to Vccmax + 0.5V DC Voltage Applied to Outputs in High Z State[3] .................................... –0.5V to VCC + 0.3V DC Input Voltage[3] .................................-0.5V to VCC + 0.3V Output Current into Outputs (LOW) .............................20 mA Static Discharge Voltage .......................................... >2001V (per MIL-STD-883, Method 3015) Latch-Up Current.................................................... >200 mA Operating Range Device CY62147CV25 CY62147CV30 CY62147CV33 Range Industrial Ambient Temperature –40°C to +85°C VCC 2.2V to 2.7V 2.7V to 3.3V 3.0V to 3.6V Product Portfolio Power Dissipation (Industrial) Operating, ICC VCC Range Product CY62147CV25 CY62147CV30 CY62147CV33 VCC(min.) VCC(typ.) 2.2V 2.7V 3.0V 2.5V 3.0V 3.3V [4] f = 1 MHz VCC(max.) 2.7V 3.3V 3.6V Speed 55 ns 70 ns 55 ns 70 ns 55 ns 70 ns Typ. [4] f = fmax Typ. [4] Standby (ISB2) Typ.[4] 5 µA 7 µA 8 µA Max. 15 µA 15 µA 20 µA Max. 3 mA 3 mA 3 mA 3 mA 3 mA 3 mA Max. 15 mA 15 mA 15 mA 1.5 mA 1.5 mA 1.5 mA 1.5 mA 1.5 mA 1.5 mA 7 mA 7 mA 7 mA 5.5 mA 12 mA 5.5 mA 12 mA 5.5 mA 12 mA Notes: 1. NC pins are not connected to the die. 2. E3 (DNU) can be left as NC or VSS to ensure proper application. 3. VIL(min.) = –2.0V for pulse durations less than 20 ns. 4. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ.), TA = 25°C. Document #: 38-05202 Rev. *A Page 2 of 14 CY62147CV25/30/33 MoBL™ Electrical Characteristics Over the Operating Range CY62147CV25-55 Parameter VOH VOL VIH VIL IIX IOZ Description Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input Leakage Current GND < VI < VCC Output Leakage Current VCC Operating Supply Current Automatic CE Power-Down Current— CMOS Inputs Automatic CE Power-Down Current— CMOS Inputs GND < VO < VCC, Output Disabled f = fMAX = 1/tRC f = 1 MHz CY62147CV25-70 Min. 2.0 Typ.[4] Max. 0.4 1.8 –0.3 –1 –1 5.5 1.5 5 VCC + 0.3V 0.6 +1 +1 12 3 15 µA Unit V V V V µA µA mA Test Conditions IOH = –0.1 mA IOL = 0.1 mA VCC = 2.2V VCC = 2.2V Min. 2.0 Typ. [4] Max. 0.4 1.8 –0.3 –1 –1 7 1.5 5 VCC + 0.3V 0.6 +1 +1 15 3 15 ICC VCC = 2.7V IOUT = 0 mA CMOS Levels ISB1 CE > VCC – 0.2V VIN > VCC – 0.2V or VIN < 0.2V, f = fmax (Address and Data Only), f=0 (OE,WE,BHE and BLE) CE > VCC – 0.2V VIN > VCC – 0.2V or VIN < 0.2V, f = 0, VCC = 2.7V ISB2 CY62147CV30-55 Parameter VOH VOL VIH VIL IIX IOZ Description Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input Leakage Current GND < VI < VCC Output Leakage Current VCC Operating Supply Current Automatic CE Power-Down Current— CMOS Inputs Automatic CE Power-Down Current— CMOS Inputs GND < VO < VCC, Output Disabled f = fMAX = 1/tRC f = 1 MHz CY62147CV30-70 Min. 2.4 Typ.[4] Max. 0.4 2.2 –0.3 –1 –1 5.5 1.5 7 VCC + 0.3V 0.8 +1 +1 12 3 15 µA Unit V V V V µA µA mA Test Conditions IOH = –1.0 mA IOL = 2.1 mA VCC = 2.7V VCC = 2.7V Min. 2.4 Typ. [4] Max. 0.4 2.2 –0.3 –1 –1 7 1.5 7 VCC + 0.3V 0.8 +1 +1 15 3 15 ICC VCC = 3.3V IOUT = 0 mA CMOS Levels ISB1 CE > VCC – 0.2V VIN > VCC – 0.2V or VIN < 0.2V, f = fmax (Address and Data Only), f=0 (OE,WE,BHE and BLE) CE > VCC – 0.2V VIN > VCC – 0.2V or VIN < 0.2V, f = 0, VCC = 3.3V ISB2 Document #: 38-05202 Rev. *A Page 3 of 14 CY62147CV25/30/33 MoBL™ Electrical Characteristics Over the Operating Range (continued) CY62147CV33-55 Parameter VOH VOL VIH VIL IIX IOZ Description Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input Leakage Current GND < VI < VCC Output Leakage Current VCC Operating Supply Current Automatic CE Power-Down Current— CMOS Inputs Automatic CE Power-Down Current— CMOS Inputs GND < VO < VCC, Output Disabled f = fMAX = 1/tRC f = 1 MHz CY62147CV33-70 Min. 2.4 Typ.[4] Max. 0.4 2.2 –0.3 –1 –1 5.5 1.5 8 VCC + 0.3V 0.8 +1 +1 12 3 20 µA Unit V V V V µA µA mA Test Conditions IOH = –1.0 mA IOL = 2.1 mA VCC = 3.0V VCC = 3.0V Min. 2.4 Typ. [4] Max. 0.4 2.2 –0.3 –1 –1 7 1.5 8 VCC + 0.3V 0.8 +1 +1 15 3 20 ICC VCC = 3.6V IOUT = 0 mA CMOS Levels ISB1 CE > VCC – 0.2V VIN > VCC – 0.2V or VIN < 0.2V, f = fmax (Address and Data Only), f=0 (OE,WE,BHE and BLE) CE > VCC – 0.2V VIN > VCC – 0.2V or VIN < 0.2V, f = 0, VCC = 3.6V ISB2 . Capacitance[5] Parameter CIN COUT Description Input Capacitance Output Capacitance Test Conditions TA = 25°C, f = 1 MHz, VCC = VCC(typ.) Max. 6 8 Unit pF pF Thermal Resistance Description Thermal Resistance (Junction to Ambient)[5] Thermal Resistance (Junction to Case)[5] Note: 5. Tested initially and after any design or process changes that may affect these parameters. Test Conditions Still Air, soldered on a 3 x 4.5 inch, two-layer printed circuit board Symbol ΘJA ΘJC BGA 55 16 Unit °C/W °C/W Document #: 38-05202 Rev. *A Page 4 of 14 CY62147CV25/30/33 MoBL™ AC Test Loads and Waveforms R1 VCC OUTPUT 30 pF INCLUDING JIG AND SCOPE R2 VCC Typ 10% GND Rise TIme: 1 V/ns ALL INPUT PULSES 90% 90% 10% Fall Time: 1 V/ns Equivalent to: THÉVENIN EQUIVALENT RTH VTH OUTPUT Parameters R1 R2 RTH VTH 2.5V 16.6 15.4 8 1.20 3.0V 1.105 1.550 0.645 1.75 3.3V 1.216 1.374 0.645 1.75 Unit KΩ KΩ KΩ Volts Data Retention Characteristics (Over the Operating Range) Parameter VDR ICCDR tCDR[5] tR[6] Chip Deselect to Data Retention Time Operation Recovery Time Description VCC for Data Retention Data Retention Current VCC= 1.5V CE > VCC – 0.2V, VIN > VCC – 0.2V or VIN < 0.2V 0 tRC Conditions Min. 1.5 3 Typ.[4] Max. Vccmax 10 Unit V µA ns ns Data Retention Waveform[7] DATA RETENTION MODE VCC CE or BHE.BLE VCC(min) tCDR VDR > 1.5 V VCC(min) tR Note: 6. Full Device AC operation requires linear VCC ramp from VDR to VCC(min.) > 100µs or stable at VCC(min.) >100 µs. 7. BHE.BLE is the AND of both BHE and BLE. Chip can be deselected by either disabling the chip enable signals or by disabling both BHE and BLE. Document #: 38-05202 Rev. *A Page 5 of 14 CY62147CV25/30/33 MoBL™ Switching Characteristics Over the Operating Range[8] 55 ns Parameter READ CYCLE tRC tAA tOHA tACE tDOE tLZOE tHZOE tLZCE tHZCE tPU tPD tDBE tLZBE[10] tHZBE WRITE CYCLE tWC tSCE tAW tHA tSA tPWE tBW tSD tHD tHZWE tLZWE [12] 70 ns Max Min 70 55 70 10 55 25 70 35 5 20 25 10 20 25 0 55 55 70 70 5 20 25 70 60 60 0 0 50 60 30 0 20 25 5 Max Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns Description Read Cycle Time Address to Data Valid Data Hold from Address Change CE LOW to Data Valid OE LOW to Data Valid OE LOW to Low Z[9] OE HIGH to High Z CE LOW to Low Z CE HIGH to High Z [9, 11] [9] [9, 11] Min 55 10 5 10 0 CE LOW to Power-Up CE HIGH to Power-Down BHE / BLE LOW to Data Valid BHE / BLE LOW to Low Z [9] 5 BHE / BLE HIGH to High Z[9, 11] Write Cycle Time CE LOW to Write End Address Set-Up to Write End Address Hold from Write End Address Set-Up to Write Start WE Pulse Width BHE / BLE Pulse Width Data Set-Up to Write End Data Hold from Write End WE LOW to High Z [9, 11] 55 45 45 0 0 45 50 25 0 5 WE HIGH to Low Z[9] Notes: 8. Test conditions assume signal transition time of 5 ns or less, timing reference levels of VCC(typ.)/2, input pulse levels of 0 to VCC(typ.), and output loading of the specified IOL/IOH and 30-pF load capacitance. 9. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZBE is less than tLZBE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device. 10. If both byte enables are toggled together this value is 10 ns. 11. tHZOE, tHZCE, tHZBE, and tHZWE transitions are measured when the outputs enter a high impedance state. 12. The internal write time of the memory is defined by the overlap of WE, CE = VIL, BHE and/or BLE = VIL. All signals must be ACTIVE to initiate a write and any of these signals can terminate a write by going INACTIVE. The data input set-up and hold timing should be referenced to the edge of the signal that terminates the write. Document #: 38-05202 Rev. *A Page 6 of 14 CY62147CV25/30/33 MoBL™ Switching Waveforms Read Cycle No. 1 (Address Transition Controlled) [13, 14] tRC ADDRESS tOHA DATA OUT PREVIOUS DATA VALID tAA DATA VALID Read Cycle No. 2 (OE Controlled) [14, 15] ADDRESS CE tACE OE tDOE BHE/BLE tLZOE tRC tPD tHZCE tHZOE tHZBE tDBE tLZBE DATA OUT HIGH IMPEDANCE tLZCE VCC SUPPLY CURRENT tPU 50% 50% ISB ICC DATA VALID HIGH IMPEDANCE Notes: 13. Device is continuously selected. OE, CE = VIL, BHE and/or BLE = VIL. 14. WE is HIGH for read cycle. 15. Address valid prior to or coincident with CE, BHE, BLE transition LOW. Document #: 38-05202 Rev. *A Page 7 of 14 CY62147CV25/30/33 MoBL™ Switching Waveforms (continued) Write Cycle No. 1 (WE Controlled) [12, 16, 17] tWC ADDRESS tSCE CE tAW WE tSA tPWE tHA BHE/BLE tBW OE tSD DATA I/O NOTE 18 tHZOE [12, 16, 17] tHD DATAIN VALID Write Cycle No. 2 (CE Controlled) tWC ADDRESS tSCE CE tSA tAW tPWE tHA WE BHE/BLE tBW OE tSD DATA I/O NOTE 18 tHZOE DATAIN VALID tHD Notes: 16. Data I/O is high-impedance if OE = VIH. 17. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state. 18. During this period, the I/Os are in output state and input signals should not be applied. Document #: 38-05202 Rev. *A Page 8 of 14 CY62147CV25/30/33 MoBL™ Switching Waveforms (continued) Write Cycle No. 3 (WE Controlled, OE LOW) [17] tWC ADDRESS tSCE CE BHE/BLE tAW tSA WE tBW tHA tPWE tSD DATA I/O NOTE 18 tHZWE DATAIN VALID tHD tLZWE Write Cycle No. 4 (BHE/BLE Controlled, OE LOW) [17] tWC ADDRESS CE tSCE tAW BHE/BLE tSA WE tPWE tSD DATA I/O NOTE 18 DATAIN VALID tHD tBW tHA Document #: 38-05202 Rev. *A Page 9 of 14 CY62147CV25/30/33 MoBL™ Typical DC and AC Parameters (Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ.), TA = 25°C.) Operating Current vs. Supply Voltage 14.0 MoBL 12.0 ICC (mA) ICC (mA) 10.0 8.0 6.0 4.0 2.0 (f = 1 MHz) (f = fmax, 55 ns) (f = fmax, 70 ns) 14.0 12.0 10.0 8.0 6.0 4.0 2.0 (f = 1 MHz) 0.0 3.0 2.7 3.3 SUPPLY VOLTAGE (V) (f = fmax, 55 ns) (f = fmax, 70 ns) MoBL ICC (mA) 14.0 12.0 10.0 8.0 6.0 4.0 (f = 1 MHz) 0.0 3.3 3.0 3.6 SUPPLY VOLTAGE (V) 2.0 (f = fmax, 55 ns) (f = fmax, 70n s) MoBL 0.0 2.2 2.5 2.7 SUPPLY VOLTAGE (V) Standby Current vs. Supply Voltage 12.0 ISB (µA) ISB (µA) 10.0 8.0 6.0 4.0 2.0 0 2.2 2.5 2.7 SUPPLY VOLTAGE (V) MoBL 12.0 MoBL ISB (µA) 10.0 8.0 6.0 4.0 2.0 0 2.7 3.0 3.3 SUPPLY VOLTAGE (V) 12.0 MoBL 10.0 8.0 6.0 4.0 2.0 0 3.0 3.3 3.6 SUPPLY VOLTAGE (V) Access Time vs. Supply Voltage MoBL 60 50 40 TAA (ns) TAA (ns) 30 20 10 0 2.2 2.5 2.7 60 50 40 TAA (ns) 30 20 10 0 2.7 3.0 3.3 MoBL 60 50 40 30 20 10 0 3.0 3.3 3.6 MoBL SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) Document #: 38-05202 Rev. *A Page 10 of 14 CY62147CV25/30/33 MoBL™ Truth Table CE H X L L L L L L L L L WE X X H H H H H H L L L OE X X L L L H H H X X X BHE X H L H L L H L L H L BLE X H L L H L L H L L H Inputs/Outputs High Z High Z Data Out (I/OO–I/O15) Data Out (I/OO–I/O7); I/O8–I/O15 in High Z Data Out (I/O8–I/O15); I/O0–I/O7 in High Z High Z High Z High Z Data In (I/OO–I/O15) Data In (I/OO–I/O7); I/O8–I/O15 in High Z Data In (I/O8–I/O15); I/O0–I/O7 in High Z Mode Deselect/Power-Down Deselect/Power-Down Read Read Read Output Disabled Output Disabled Output Disabled Write Write Write Power Standby (ISB) Standby (ISB) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Ordering Information Speed (ns) 70 Ordering Code CY62147CV25LL-70BAI CY62147CV25LL-70BVI CY62147CV30LL-70BAI CY62147CV30LL-70BVI CY62147CV33LL-70BAI CY62147CV33LL-70BVI 55 CY62147CV25LL-55BAI CY62147CV25LL-55BVI CY62147CV30LL-55BAI CY62147CV30LL-55BVI CY62147CV33LL-55BAI CY62147CV33LL-55BVI Package Name BA48B BV48A BA48B BV48A BA48B BV48A BA48B BV48A BA48B BV48A BA48B BV48A Package Type 48-Ball Fine Pitch BGA (7 mm x 8.5 mm x 1.2 mm) 48-Ball Fine Pitch BGA (6 mm x 8 mm x 1 mm) 48-Ball Fine Pitch BGA (7 mm x 8.5 mm x 1.2 mm) 48-Ball Fine Pitch BGA (6 mm x 8 mm x 1 mm) 48-Ball Fine Pitch BGA (7 mm x 8.5 mm x 1.2 mm) 48-Ball Fine Pitch BGA (6 mm x 8 mm x 1 mm) 48-Ball Fine Pitch BGA (7 mm x 8.5 mm x 1.2 mm) 48-Ball Fine Pitch BGA (6 mm x 8 mm x 1 mm) 48-Ball Fine Pitch BGA (7 mm x 8.5 mm x 1.2 mm) 48-Ball Fine Pitch BGA (6 mm x 8 mm x 1 mm) 48-Ball Fine Pitch BGA (7 mm x 8.5 mm x 1.2 mm) 48-Ball Fine Pitch BGA (6 mm x 8 mm x 1 mm) Operating Range Industrial Document #: 38-05202 Rev. *A Page 11 of 14 CY62147CV25/30/33 MoBL™ Package Diagrams 48-Ball (7.00 mm x 8.5 mm x 1.2 mm) Thin BGA BA48B 51-85106-*C Document #: 38-05202 Rev. *A Page 12 of 14 CY62147CV25/30/33 MoBL™ Package Diagrams (continued) 48-Lead VFBGA (6 mm x 8 mm x 1 mm) BV48A 51-85150-** MoBL, MoBL2 and More Battery Life are trademarks of Cypress Semiconductor Corporation. All product and company names mentioned in this document may be the trademarks of their respective holders. Document #: 38-05202 Rev. *A Page 13 of 14 © Cypress Semiconductor Corporation, 2001. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. CY62147CV25/30/33 MoBL™ Document Title: CY62147CV25/30/33 MoBL™ 256K x 16 Static RAM Document Number: 38-05202 REV. ** *A ECN NO. 112394 114216 Issue Date 01/31/02 05/01/02 Orig. of Change GAV Description of Change Converted from Spec# 38-01123 to 38-05202. Advance Information to Final MGN/GUG Improved Typical & Max Icc values Document #: 38-05202 Rev. *A Page 14 of 14