Simplifying System IntegrationTM
78Q8430
STEM Demo Board User Manual
March, 2008
Rev. 1.0
78Q8430 STEM Demo Board User Manual
UM_8430_006
© 2008 Teridian Semiconductor Corporation. All rights reserved.
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contained in the Company’s warranty detailed in the Teridian Semiconductor Corporation standard Terms
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document, reserves the right to change devices or specifications detailed herein at any time without
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Teridian Semiconductor Corp., 6440 Oak Canyon, Suite 100, Irvine, CA 92618
TEL (714) 508-8800, FAX (714) 508-8877, http://www.teridian.com
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Table of Contents
1
Introduction ......................................................................................................................................... 5
1.1 Package Contents......................................................................................................................... 6
1.2 Safety and ESD Notes .................................................................................................................. 6
1.3 System Hardware Requirements .................................................................................................. 7
1.4 System Software Requirements ................................................................................................... 7
2
Hardware Setup ................................................................................................................................... 8
2.1 Jumper and Dip Switch Settings ................................................................................................... 8
2.2 Connections .................................................................................................................................. 9
3
Software Setup .................................................................................................................................. 11
3.1 Development (Host) PC Environment Setup .............................................................................. 11
3.2 Video Server PC Environment Setup ......................................................................................... 11
3.3 ST Microconnect Target Configuration ....................................................................................... 11
3.4 78Q8430 Software Device Driver ............................................................................................... 11
4
78Q8430 STEM Demo Board Schematic, BOM and PCB Layout ................................................. 12
5
Ordering Information ........................................................................................................................ 23
6
Related Documentation .................................................................................................................... 23
7
Contact Information .......................................................................................................................... 23
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Figures
Figure 1: 78Q8430 System Interface Diagram ............................................................................................. 6
Figure 2: 78Q8430 STEM Demo Board Jumper and Dip Switch Locations ................................................. 8
Figure 3: Demo System Hardware Connections........................................................................................... 9
Figure 4: STEM EMI Bus Interface Block Diagram ..................................................................................... 12
Figure 5: STEM EMI Bus Interface Schematic ........................................................................................... 13
Figure 6: STEM IO Bus Interface Schematic .............................................................................................. 14
Figure 7: MICTOR Diagnostic Connectors Schematic ............................................................................... 15
Figure 8: 78Q8430 MAC Interface Schematic ............................................................................................ 16
Figure 9: 78Q8430 PHY Interface Schematic ............................................................................................. 17
Figure 10: Top Silkscreen Layout ............................................................................................................... 19
Figure 11: Top Layer Layout ....................................................................................................................... 19
Figure 12: Ground Layer Layout ................................................................................................................. 20
Figure 13: Inner Layer 1 Layout .................................................................................................................. 20
Figure 14: Inner Layer 2 Layout .................................................................................................................. 21
Figure 15: VCC Layer Layout ..................................................................................................................... 21
Figure 16: Bottom Layer Layout .................................................................................................................. 22
Figure 17: Bottom Silkscreen Layout .......................................................................................................... 22
Tables
Table 1: Demo Board Jumper Options ......................................................................................................... 8
Table 2: Demo Board Dip Switch Options .................................................................................................... 8
Table 3: STEM Demo Board Bill of Materials ............................................................................................. 18
Table 4: Order Numbers and Description ................................................................................................... 23
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1 Introduction
The 78Q8430 STEM Demo Board (D8430T3B_STEM) is a design example for a 10/100BASE-TX
MAC+PHY ST Microelectronics STEM daughter card. The Demo Board plugs directly into STi5100 and
STi5514 Evaluation Systems. The network connection is provided by the 78Q8430 which is a single chip
auto-sensing, auto-switching (auto-negotiation or parallel detect modes and auto-MDIX) 10/100BASE-TX
Fast Ethernet transceiver with full duplex operation capability. The device is designed specifically for the
Audio/Visual (A/V) and Set Top Box (STB) markets and is easily interfaced to available A/V and STB core
processors.
The 78Q8430 is compliant with applicable IEEE-802.3 standards. MAC and PHY configuration and
status registers are provided as specified by IEEE802.3u. The integrated MAC is supported by an
internal 32KByte transmit and receive SRAM FIFO. The partition of transmit and receive queues are
configurable through software, allowing the 78Q8430 to be tuned for specific applications. The device
contains hardware support for TCP-IP checksum and ARC address recognition.
The 78Q8430 STEM Demo Board includes support for the following 78Q8430 hardware interface
features:
•
•
•
•
•
•
•
The system bus interface operates like external memory with an active low chip select.
A configurable bus interface with support for little endian and big endian formats.
Supports an asynchronous 100 MHz (max) bus clock for STi5100/5514 operation.
Supports 32-bit, 16-bit and 8 bit wide data bus formats.
Optional EEPROM interface for configuration data.
Two programmable LED outputs for PHY status.
Single +3.3V power supply voltage with common ground plane.
A host processor interfaces directly to the FIFO via the GBI interface. The D8430T3B_STEM board is
configured for 16-bit big endian bus format by default. The bus can optionally be configured for 32-bit or
8-bit bus widths or little endian format. Figure 1 shows the 78Q8430 system interfaces.
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32-bit/16-bit/8-bit
System
Bus
78Q8430
Single Chip
10/100 Ethernet
MAC & PHY
Interface
Configuration
EEPROM
Interface
LED
Link (Programmable)
LED
Activity (Programmable)
RJ45
CAT5
Cable
Integrated RJ-45
with 1:1
Transformer
JTAG
Interface
Figure 1: 78Q8430 System Interface Diagram
This document describes the setup and configuration of the 78Q8430 STEM Demo Board. The demo
board requires operation with a +3.3V power supply sourced from the STEM bus interface on the STi5100
evaluation board. The 78Q8430 PHY interfaces to a CAT5 UTP cable via a 1:1 transformer.
The supplied software driver includes support for ST/OS-20. The included 78Q8430 Software Driver
Development Guidelines and 78Q8430 Software User Guide for ST/OS-20 describe the software
interfacing requirements for quick driver integration and prompt system evaluation of the 78Q8430.
Use this document with those listed in the Related Documentation section.
1.1
Package Contents
The 78Q8430 STEM Demo Board kit includes:
•
•
•
A 78Q8430 STEM Demo Board (D8430T3B_STEM).
A CD containing the 78Q8430 software device driver for ST/OS-20.
The following documents on CD:
78Q8430 STEM Demo Board User Manual (this document)
78Q8430 Preliminary Data Sheet
78Q8430 Layout Guidelines
78Q8430 Software Driver Development Guidelines
78Q8430 Software User Guide for ST/OS-20
The printed circuit board Gerber files are available upon request.
1.2
Safety and ESD Notes
Connecting live voltages to the demo board system will result in potentially hazardous voltages on the
boards.
The demo boards are ESD sensitive! ESD precautions must be taken when handling these
boards!
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1.3
78Q8430 STEM Demo Board User Manual
System Hardware Requirements
The following describes the minimum hardware requirements for the 78Q8430 Demo Board system:
•
•
•
•
•
•
•
1.4
The 78Q8430 STEM Demo Board (D8430T3B_STEM).
An STi5100 Evaluation Platform (available from ST).
A software development PC with the following minimum requirements: Pentium® 4 CPU with 256 MB
RAM and 40 GB hard drive running either Windows® 2000 or Windows XP.
An IP Video Server PC with the following minimum requirements: Pentium 4 CPU with 256 MB RAM
and 40 GB hard drive, 10/100 ports for demo board connection, running either Windows 2000 or
Windows XP.
A 10/100Base-T hub or switch.
An ST Microconnect JTAG emulator. This device loads the IPSTB demo software into the STi5100
Evaluation Platform.
Television for viewing the video demo.
System Software Requirements
The following describes the minimum software requirements for embedded application programming
using the 78Q8430 Demo Board:
•
•
•
ST20 Toolset: STi5100 BSP Version 2.0.5 Patch 1 (available from ST).
IPBox: contains web_server, htdocs, and video_server folders (included in the 78Q8430 ST/OS-20
driver software release package).
IPSTB application: Ipstba3_esp – 5100 (included in the 78Q8430 ST/OS-20 driver software release
package).
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2 Hardware Setup
2.1
Jumper and Dip Switch Settings
The 78Q8430 STEM Demo Board utilizes various jumpers (J5, J6, and J8) and dip switches (S3) for
establishing the startup configuration of the 78Q8430 device. Figure 2 shows the location of the jumpers
and dip switch. Table 1 and Table 2 describe the jumper and dip switch options. The jumper and switch
numbers and settings are printed on the demo board.
Figure 2: 78Q8430 STEM Demo Board Jumper and Dip Switch Locations
Table 1: Demo Board Jumper Options
Jumper
J5
Name
Chip Select Source
Setting
notCS0
notCS1
J6
Interrupt Selection
notINTR0
notINTR1
J8
PMEB Selection
notINTR1
PMEB
Description
Selects STEM notCS0 for 78Q8430 chip select signal
source.
Selects STEM notCS1 for 78Q8430 chip select signal
source (default).
Connects 78Q8430 interrupt output to STEM notINTR0
signal.
Connects 78Q8430 interrupt output to STEM notINTR1
signal (default).
Connects 78Q8430 PMEB output to STEM notINTR1
signal.
Connects 78Q8430 PMEB output to board PMEB signal.
Table 2: Demo Board Dip Switch Options
S3 – Device Mode Configuration Dip Switch ( 1 = open, 0 = closed)
Position 1 (ENDIAN1)
Position 1, 2:
0, 0 (default) = big endian (MSB at high bit positions)
0, 1 = bytes are little endian inside 16 bit words
Position 2 (ENDIAN0)
1, 0 = word endian (MSW at low bit positions)
1, 1 = little endian (MSB at low bit positions)
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S3 – Device Mode Configuration Dip Switch ( 1 = open, 0 = closed)
Position 3 (BUSMODE)
Position 5 (CLCKMODE)
Position 4 (WAITMODE)
Position 6 (BTZ0)
Position 7 (BTZ1)
Position 8 (NC)
2.2
Position 3, 5, 4:
0, 0, 0 = sync bus, external system clock, memwait act low
0, 0, 1 = sync bus, external system clock, memwait act high
0, 1, 0 = reserved
0, 1, 1 = reserved
1, 0, 0 = async bus, external system clock, memwait act low
1, 0, 1 (default) = async bus, external system clock, memwait act high
1, 1, 0 = async bus, internal system clock, memwait act low
1, 1, 1 = async bus, internal system clock, memwait act high
Position 6, 7:
0, 0 = 32 bit bus width
0, 1 (default) 16 bit bus width (only DATA[15:0] are used)
1, 0 = 8 bit bus width (only DATA [7:0] are used)
1, 1 = reserved
No Connection
Connections
Connect the system components as shown in Figure 3. Refer to the STi5100 documentation for
additional information on the STi5100 Evaluation Platform connections.
Figure 3: Demo System Hardware Connections
STEP 1: Attach the 78Q8430 STEM Demo Board to the STi5100 Evaluation Board via the two 140 pin
connectors on the bottom of the demo board to the two corresponding STEM connectors on the STi5100
Evaluation Board.
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STEP 2: Connect the development PC Ethernet port to the switch/hub using a CAT-5 cable.
STEP 3: Connect the ST20 in-circuit-emulator (ICE) to the switch/hub using a CAT-5 cable.
STEP 4: Connect the ST20 ICE to the STi5100 Evaluation Board using the ribbon cable.
STEP 5: Connect the television to the STi5100 Evaluation Board using a video/audio cable.
STEP 6: Connect the video server PC to the STEM demo board RJ-45 connector using a CAT-5 cable.
STEP 7: Refer to the STi5100 documentation for powering up the evaluation system. The 78Q8430
STEM Demo Board receives its power through the STEM bus interface on the STi5100 Evaluation Board.
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3 Software Setup
The path names (in italics) given in the following steps are for illustrative purposes. If the software has
been installed in different directories than those given below, replace the path in the example with the
appropriate path for your installation.
3.1
Development (Host) PC Environment Setup
The following steps describe how to set up the host PC software environment.
STEP 1: Modify the Windows Environment to use the ST20R2.0.5 tool set as follows:
Append C:\STM\ST20R2.0.5\bin; to the front of the system variable ‘Path’. As an example, the new
path might be C:\STM\ST20R2.0.5\bin;C:\STM\ST20R1.9.6\bin;%SystemRoot%\system32;……
STEP 2: Modify the system variable ‘ST20ROOT’ as follows:
ST20ROOT
C:\STM\ST20R2.0.5
STEP 3: Reboot the PC.
3.2
Video Server PC Environment Setup
The following steps describe how to set up the MPEG2 video server PC environment.
STEP 1: Set up the ST TSVOD server for unicast video streaming:
G:\ IPBox\servers\ TS_VOD_Server
STEP 2: Set up the ST Multicast server for multicast video streaming:
G:\ IPBox\servers\ Multicast
STEP 3: Set the video server PC IP address to 192.168.1.110.
STEP 4: Start the appropriate server before requesting a video stream.
3.3
ST Microconnect Target Configuration
Set the ST Microconnect Target Configuration (via Ethernet) IP addresses as follows:
Host PC:
ST Microconnect:
Video Server PC:
3.4
192.168.1.100
192.168.1.30
192.168.1.110
78Q8430 Software Device Driver
The 78Q8430 ST/OS-20 device driver software and user guide, 78Q8430 Software User Guide for
ST/OS-20, are provided with the demo board. Refer to that documentation for additional information on
configuring and installing the driver.
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4 78Q8430 STEM Demo Board Schematic, BOM and PCB Layout
.
J1/P1
VCC33
VCCD
FLASHCLK
BUSCLK
notRESET
RESETB
J5
notCS0
notCS1
CSB
notRD
notWR
OEB
WRB
A9:0
ADDR9:0
VCCA
J16
LED0
LED1
TXP
TXN
RXP
RXN
RJ45
XTLN
25MHz Crystal
DATA31:0
D31:0
XTLP
MEMWAIT
MemWait
J6
INTB
notINTR0
notINTR1
PMEB
J8
J9
STEM
EMI
INTERFACE
S3
ENDIAN0
ENDIAN1
BUSMODE
CLKMODE
WAITMODE
BOOTSZ0
BOOTSZ1
J4/P2
TCLK
TRST
TMS
TDO
TDI
U2
PROMCLK
PROMCS
PROMDO
PROMDI
78Q8430B
TP2 & TP5
STEM IO Interface
Not Used
Pass Through Only
Mictor Connectors
Logic Analyzer Pods
TP1, TP4, TP8
Scope Test Points
Figure 4: STEM EMI Bus Interface Block Diagram
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78Q8430 STEM Demo Board User Manual
P1
J1
R1
33
GND
0603
DACK2
DACK0
DRAK0
notDR0
MemGnt
notINTR0
notINTR0
R2
33
FLASHCLK
0603
notCS0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
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27
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50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
MemWait
MemWait
notWR
notBS
SCLK
SCKEN
MPST0
FCLK
notWR
notCS0
A25
A23
A21
A19
A17
A15
A13
A11
A9
A7
A5
A3
A1
D31
D29
D27
D25
D23
D21
D19
D17
D15
D13
D11
D9
D7
D5
D3
D1
MCLK
GND
VCC12
notBS
notFRAME
SDRAM_CLK
notCAS
SDRAM_CLKEN
notRESET
MEZZ_PRESENT0
MEZZ_PRESENT1
GROUND
GROUND
DACK2
DACK3
DACK0
DACK1
DRAK0
DRAK1
notDREQ0
notDREQ1
GROUND
GROUND
MemWait
AUXCLKOUT
VCC3V3
VCC3V3
MemGranted
MemReq
notINTR0
notINTR1
GROUND
GROUND
FLASH_CLK
FBAA
GROUND
GROUND
notWR
notRD_notCAS_notFRAME
GROUND
GROUND
notCS0
notCS1
GROUND
GROUND
A25
A24
A23
A22
VCC3V3
VCC3V3
A21
A20
A19
A18
GROUND
GROUND
A17
A16
A15
A14
VCC3V3
VCC3V3
A13
A12
A11
A10
GROUND
GROUND
A9
A8
A7
A6
VCC3V3
VCC3V3
A5
A4
A3
A2
GROUND
GROUND
A1_notBE3_DQM3
A0_notBE2_DQM2
notBE1_DQM1
notBE0_DQM0
GROUND
GROUND
D31
D30
D29
D28
GROUND
VCC
D27
D26
D25
D24
GROUND
GROUND
D23
D22
D21
D20
GROUND
VCC
D19
D18
D17
D16
GROUND
GROUND
D15
D14
D13
D12
GROUND
VCC
D11
D10
D9
D8
GROUND
GROUND
D7
D6
D5
D4
GROUND
VCC
D3
D2
D1
D0
GROUND
GROUND
MPX_CLK
ALE_notRAS_notBS
GROUND
GROUND
VCC12V
VCC12V
VCC12V
VCC12V
STEM EMI Connector
Solder Side Connector to Motherboard
AMP 5-179010-6
STEM_J_EMI_REV1
71
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75
76
77
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84
85
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121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
notBS
SCLK
SCKEN
notFRM
norCAS
notRESET
MPST1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
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50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
notRESET
DACK2
DACK0
DRAK0
notDR0
DACK3
DACK1
DRAK1
notDR1
MemWait
ACLK
MemReq
notINTR1
MemGnt
notINTR0
notINTR0
notINTR1
FCLK
FBAA
notWR
notRD
notRD
notCS1
notCS0
notCS1
A25
A23
A24
A22
A21
A19
A20
A18
A17
A15
A16
A14
A13
A11
A12
A10
A[9:0]
A9
A7
A[9:0]
A8
A6
A5
A3
A4
A2
A1
A0
D[31:0]
D30
D28
D31
D29
D[31:0]
D27
D25
D26
D24
D23
D21
D22
D20
D19
D17
D18
D16
D15
D13
D14
D12
D11
D9
D10
D8
D7
D5
D6
D4
D3
D1
D2
D0
MCLK
ALE
GND
GND
STEM EMI Connector
Component Side Expansion Connector
Pass Through
AMP 179031-6
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75
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77
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120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
notFRM
norCAS
notRESET
DACK3
DACK1
DRAK1
notDR1
ACLK
MemReq
notINTR1
notINTR1
FBAA
notRD
notCS1
A24
A22
A20
A18
A16
A14
A12
A10
A8
A6
A4
A2
A0
D30
D28
D26
D24
D22
D20
D18
D16
D14
D12
D10
D8
D6
D4
D2
D0
ALE
GND
STEM_P_EMI
VCC12
VCC5
notBS
notFRAME
SDRAM_CLK
notCAS
SDRAM_CLKEN
notRESET
MEZZ_PRESENT0
MEZZ_PRESENT1
GROUND
GROUND
DACK2
DACK3
DACK0
DACK1
DRAK0
DRAK1
notDREQ0
notDREQ1
GROUND
GROUND
MemWait
AUXCLKOUT
VCC3V3
VCC3V3
MemGranted
MemReq
notINTR0
notINTR1
GROUND
GROUND
FLASH_CLK
FBAA
GROUND
GROUND
notWR
notRD_notCAS_notFRAME
GROUND
GROUND
notCS0
notCS1
GROUND
GROUND
A25
A24
A23
A22
VCC3V3
VCC3V3
A21
A20
A19
A18
GROUND
GROUND
A17
A16
A15
A14
VCC3V3
VCC3V3
A13
A12
A11
A10
GROUND
GROUND
A9
A8
A7
A6
VCC3V3
VCC3V3
A5
A4
A3
A2
GROUND
GROUND
A1_notBE3_DQM3
A0_notBE2_DQM2
notBE1_DQM1
notBE0_DQM0
GROUND
GROUND
D31
D30
D29
D28
GROUND
VCC
D27
D26
D25
D24
GROUND
GROUND
D23
D22
D21
D20
GROUND
VCC
D19
D18
D17
D16
GROUND
GROUND
D15
D14
D13
D12
GROUND
VCC
D11
D10
D9
D8
GROUND
GROUND
D7
D6
D5
D4
GROUND
VCC
D3
D2
D1
D0
GROUND
GROUND
MPX_CLK
ALE_notRAS_notBS
GROUND
GROUND
VCC12V
VCC12V
VCC12V
VCC12V
VCC5
GND1
GND2
GND
GND
C6
10
0805
GND
1
C5
10
0805
MTHOLE
GND
MTHOLE
1
C4
10
0805
1
C3
10
0805
1
+3.3V
GND
Figure 5: STEM EMI Bus Interface Schematic
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J4
1
2
3
4
5
6
7
8
9
10
11
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13
14
15
16
17
18
19
20
21
22
23
24
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41
42
43
44
45
46
47
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49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
STEMIO4
STEMIO5
STEMIO7
STEMIO8
STEMIO10
STEMIO13
STEMIO14
STEMIO16
STEMIO17
STEMIO19
STEMIO22
STEMIO23
STEMIO25
STEMIO26
STEMIO28
STEMIO29
STEMIO31
STEMIO32
STEMIO34
STEMIO35
STEMIO37
STEMIO38
STEMIO40
STEMIO43
STEMIO44
STEMIO46
STEMIO47
STEMIO49
STEMIO52
STEMIO53
STEMIO55
STEMIO56
STEMIO58
STEMIO60
STEMIO62
STEMIO64
STEMIO65
STEMIO67
STEMIO69
GND
VCC5
VCC5
VCC12V
VCC12V
GROUND
TS_OUT_DATA7
TS_OUT_DATA5
GROUND
TS_OUT_DATA3
TS_OUT_DATA1
GROUND
TS_OUT_CLK
GROUND
VCC
TS_IN0_DATA7
TS_IN0_DATA5
GROUND
TS_IN0_DATA3
TS_IN0_DATA1
GROUND
TS_IN0_CLK
GROUND
VCC
AVData7
AVData5
GROUND
AVData3
AVData1
GROUND
AVPacketErr
AVByteClk
GROUND
AVPacketTag0
AVPacketTag2
VCC
TS_IN1_DATA7
TS_IN1_DATA5
GROUND
TS_IN1_DATA3
TS_IN1_DATA1
GROUND
TS_IN1_CLK
GROUND
VCC
TS_IN2_DATA7
TS_IN2_DATA5
GROUND
TS_IN2_DATA3
TS_IN2_DATA1
GROUND
TS_IN2_CLK
GROUND
VCC
YUV7
YUV5
GROUND
YUV3
YUV1
GROUND
VSYNC
GROUND
PIXCLK
GROUND
SCLK
GROUND
PCM3
PCM1
GROUND
I2C_CLK
GROUND
Reserved
VCC
P2
VCC12V
VCC12V
GROUND
TS_OUT_DATA6
TS_OUT_DATA4
GROUND
TS_OUT_DATA2
TS_OUT_DATA0
GROUND
TS_OUT_DSTRT
TS_OUT_DVAL
GROUND
TS_IN0_DATA6
TS_IN0_DATA4
GROUND
TS_IN0_DATA2
TS_IN0_DATA0
GROUND
TS_IN0_DSTRT
TS_IN0_DVAL
GROUND
AVData6
AVData4
GROUND
AVData2
AVData0
GROUND
AVPacketClk
AVByteClkValid
GROUND
AVPacketTag1
AVPacketTag3
VCC
TS_IN1_DATA6
TS_IN1_DATA4
GROUND
TS_IN1_DATA2
TS_IN1_DATA0
GROUND
TS_IN1_DSTRT
TS_IN1_DVAL
GROUND
TS_IN2_DATA6
TS_IN2_DATA4
GROUND
TS_IN2_DATA2
TS_IN2_DATA0
GROUND
TS_IN2_DSTRT
TS_IN2_DVAL
GROUND
YUV6
YUV4
GROUND
YUV2
YUV0
GROUND
HSYNC
GROUND
MCLK
GROUND
LRCLK
GROUND
PCM2
PCM0
GROUND
I2C_SDA
GROUND
notRESET
VCC
STEM IO Connector
Solder Side Connector to Motherboard
AMP 5-179010-6
STEM_J_IO_REV1
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
STEMIO74
STEMIO75
STEMIO4
STEMIO5
STEMIO77
STEMIO78
STEMIO7
STEMIO8
STEMIO80
STEMIO81
STEMIO10
STEMIO83
STEMIO84
STEMIO13
STEMIO14
STEMIO86
STEMIO87
STEMIO16
STEMIO17
STEMIO89
STEMIO90
STEMIO19
STEMIO92
STEMIO93
STEMIO22
STEMIO23
STEMIO95
STEMIO96
STEMIO25
STEMIO26
STEMIO98
STEMIO99
STEMIO28
STEMIO29
STEMIO101
STEMIO102
STEMIO31
STEMIO32
STEMIO104
STEMIO105
STEMIO34
STEMIO35
STEMIO107
STEMIO108
STEMIO37
STEMIO38
STEMIO110
STEMIO111
STEMIO40
STEMIO113
STEMIO114
STEMIO43
STEMIO44
STEMIO116
STEMIO117
STEMIO46
STEMIO47
STEMIO119
STEMIO120
STEMIO49
STEMIO122
STEMIO123
STEMIO52
STEMIO53
STEMIO125
STEMIO126
STEMIO55
STEMIO56
STEMIO128
STEMIO58
STEMIO130
STEMIO60
STEMIO132
STEMIO62
STEMIO134
STEMIO136
STEMIO64
STEMIO65
STEMIO138
STEMIO67
STEMIO140
STEMIO69
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
GND
VCC12V
VCC12V
GROUND
TS_OUT_DATA7
TS_OUT_DATA5
GROUND
TS_OUT_DATA3
TS_OUT_DATA1
GROUND
TS_OUT_CLK
GROUND
VCC
TS_IN0_DATA7
TS_IN0_DATA5
GROUND
TS_IN0_DATA3
TS_IN0_DATA1
GROUND
TS_IN0_CLK
GROUND
VCC
AVData7
AVData5
GROUND
AVData3
AVData1
GROUND
AVPacketErr
AVByteClk
GROUND
AVPacketTag0
AVPacketTag2
VCC
TS_IN1_DATA7
TS_IN1_DATA5
GROUND
TS_IN1_DATA3
TS_IN1_DATA1
GROUND
TS_IN1_CLK
GROUND
VCC
TS_IN2_DATA7
TS_IN2_DATA5
GROUND
TS_IN2_DATA3
TS_IN2_DATA1
GROUND
TS_IN2_CLK
GROUND
VCC
YUV7
YUV5
GROUND
YUV3
YUV1
GROUND
VSYNC
GROUND
PIXCLK
GROUND
SCLK
GROUND
PCM3
PCM1
GROUND
I2C_CLK
GROUND
Reserved
VCC
VCC12V
VCC12V
GROUND
TS_OUT_DATA6
TS_OUT_DATA4
GROUND
TS_OUT_DATA2
TS_OUT_DATA0
GROUND
TS_OUT_DSTRT
TS_OUT_DVAL
GROUND
TS_IN0_DATA6
TS_IN0_DATA4
GROUND
TS_IN0_DATA2
TS_IN0_DATA0
GROUND
TS_IN0_DSTRT
TS_IN0_DVAL
GROUND
AVData6
AVData4
GROUND
AVData2
AVData0
GROUND
AVPacketClk
AVByteClkValid
GROUND
AVPacketTag1
AVPacketTag3
VCC
TS_IN1_DATA6
TS_IN1_DATA4
GROUND
TS_IN1_DATA2
TS_IN1_DATA0
GROUND
TS_IN1_DSTRT
TS_IN1_DVAL
GROUND
TS_IN2_DATA6
TS_IN2_DATA4
GROUND
TS_IN2_DATA2
TS_IN2_DATA0
GROUND
TS_IN2_DSTRT
TS_IN2_DVAL
GROUND
YUV6
YUV4
GROUND
YUV2
YUV0
GROUND
HSYNC
GROUND
MCLK
GROUND
LRCLK
GROUND
PCM2
PCM0
GROUND
I2C_SDA
GROUND
notRESET
VCC
STEM IO Connector
Component Side Expansion Connector
Pass Through
AMP 179031-6
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
STEMIO74
STEMIO75
STEMIO77
STEMIO78
STEMIO80
STEMIO81
STEMIO83
STEMIO84
STEMIO86
STEMIO87
STEMIO89
STEMIO90
STEMIO92
STEMIO93
STEMIO95
STEMIO96
STEMIO98
STEMIO99
STEMIO101
STEMIO102
STEMIO104
STEMIO105
STEMIO107
STEMIO108
STEMIO110
STEMIO111
STEMIO113
STEMIO114
STEMIO116
STEMIO117
STEMIO119
STEMIO120
STEMIO122
STEMIO123
STEMIO125
STEMIO126
STEMIO128
STEMIO130
STEMIO132
STEMIO134
STEMIO136
STEMIO138
STEMIO140
GND
STEM_P_IO
VCC12
VCC12
Figure 6: STEM IO Bus Interface Schematic
14
Rev. 1.0
UM_8430_006
78Q8430 STEM Demo Board User Manual
TP1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
A[9:0]
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
A[9:0]
(MSB)
TP4
A3
A2
1
2
1
2
(LSB)
GND
GND
43
40
39
GND
notRD
notWR
notCS
notRESET
GND
notRD
notWR
notCS
notRESET
PMEB
notINTR
MemWait
NC
NC
CLKO
D15O
D14O
D13O
D12O
D11O
D10O
D9O
D8O
D7O
D6O
D5O
D4O
D3O
D2O
D1O
D0O
42
PMEB
notINTR
MemWait
NC
GND
CLKE
D15E
D14E
D13E
D12E
D11E
D10E
D9E
D8E
D7E
D6E
D5E
D4E
D3E
D2E
D1E
D0E
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
FLASHCLK
FLASHCLK
TP27
TP29
TP211
41
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
TP2
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
GND
Mictor 38 Pin Connector
AMP
2-767004-2
TP5
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
TP8
(LSB)
D1
D0
1
2
1
2
GND
43
GND
42
GND
GND
GND
NC
NC
CLKO
D15O
D14O
D13O
D12O
D11O
D10O
D9O
D8O
D7O
D6O
D5O
D4O
D3O
D2O
D1O
D0O
41
39
GND
GND
D31
D30
D29
D28
D27
D26
D25
D24
D23
D22
D21
D20
D19
D18
D17
D16
NC
GND
CLKE
D15E
D14E
D13E
D12E
D11E
D10E
D9E
D8E
D7E
D6E
D5E
D4E
D3E
D2E
D1E
D0E
40
(MSB)
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
Mictor 38 Pin Connector
AMP
2-767004-2
D[31:0]
D[31:0]
Figure 7: MICTOR Diagnostic Connectors Schematic
Rev. 1.0
15
78Q8430 STEM Demo Board User Manual
UM_8430_006
.
+3.3V
C9
0.1
0603
GND
C10
0.1
0603
GND
C11
0.1
0603
GND
C12
0.1
0603
GND
C14
0.1
0603
GND
C15
0.1
0603
GND
C16
0.1
0603
GND
C17
0.1
0603
GND
C13
0.1
0603
GND
FLASHCLK
R3
notRESET
notRESET
100
0603
GND
BUSCLK
GND
RSTB
J5
1
2
3
notCS1
notWR
notRD
A[9:0]
1
2
3
notCS
notWR
notRD
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
+3.3V
R95
10K
0603
R94
10K
0603
R93
10K
0603
R92
10K
0603
R91
10K
0603
R90
10K
0603
R89
10K
0603
ENDIAN1
ENDIAN0
BUSMODE
WAITMODE
CLKMODE
BTZ0
BTZ1
S3
1
2
3
4
5
6
7
8
7
16
15
14
13
12
11
10
9
R82
R88
R87
R86
R85
R81
R84
R83
R54
R53
33(MSB)
33
33
33
33
33
33
33
33
33(LSB)
80
79
BUSMODE
WAITMODE
CLKMODE
83
84
85
BTZ1
BTZ0
ADDR9
ADDR8
ADDR7
ADDR6
ADDR5
ADDR4
ADDR3
ADDR2
ADDR1
ADDR0
ENDIAN1
ENDIAN0
BUSMODE
WAITMODE
CLKMODE
100
1
PROMCLK
PROMCS
PROMDO
PROMDI
BOOTSZ1
BOOTSZ0
74
75
76
77
TDI
TDO
TMS
TRST
TCLK
DATA31
DATA30
DATA29
DATA28
DATA27
DATA26
DATA25
DATA24
DATA23
DATA22
DATA21
DATA20
DATA19
DATA18
DATA17
DATA16
DATA15
DATA14
DATA13
DATA12
DATA11
DATA10
DATA9
DATA8
DATA7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0
CSB
WRB
OEB
25
24
23
22
21
20
19
18
9
10
ENDIAN1
ENDIAN0
MEMWAIT
RESETB
16
11
12
A[9:0]
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC11
15
PROMCLK
PROMCS
PROMDO
PROMDI
4
81
3
5
6
TDI
TDO
TMS
TRST
TCLK
INTB
PMEB
13
MEMWT
69
68
67
66
65
64
63
62
59
58
57
56
55
54
53
52
49
48
47
46
45
42
41
40
39
38
33
32
31
30
29
28
DB31
DB30
DB29
DB28
DB27
DB26
DB25
DB24
DB23
DB22
DB21
DB20
DB19
DB18
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
R71
10K
0603
R4
33
MEMWAIT
R5
R7
R9
R11
R13
R15
R17
R20
R22
R25
R27
R29
R31
R33
R35
R37
33 0603
R6
33 0603
R8
33 0603
R10
33 0603
R12
33 0603
R14
33 0603
R16
33 0603
R18
33 0603
R21
33 0603
R23
33 0603
R26
33 0603
R28
33 0603
R30
33 0603
R32
33 0603
R34
33 0603
R36
33 0603
R38
(MSB)
33
0603
33
0603
33
0603
33
0603
33
0603
33
0603
33
0603
33
0603
33
0603
33
0603
33
0603
33
0603
33
0603
33
0603
33
0603
33
0603
(LSB)
D31
D30
D29
D28
D27
D26
D25
D24
D23
D22
D21
D20
D19
D18
D17
D16
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
MemWait
0603
D[31:0]
D[31:0]
+3.3V
notINTR0
R19
10K
0603
notINTR0
J6
J62
R24
33
0603
1
2
3
1
2
3
notINTR1
notINTR1
notINTR
+3.3V
R69
10K
0603
J8
notINTR
PMEB
72
73
J82
R70
33
0603
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND11
FLASHCLK
EVQPJU
notCS0
R72
10K
0603
8
17
36
27
37
44
51
71
61
82
SW1
RESET
notCS
C18
0.1
0603 +3.3V
1
2
3
1
2
3
2
14
34
35
26
43
50
60
70
78
PMEB
U1A
78Q8430B-100
TMS
+3.3V
GND
8
TDI
1
CS
DI
VCC
TRST
4
DO
TCLK
93LC46B
5
3
CLK
GND
2
U2
TDO
7
6
NC1
NC2
Not Installed
R65
10K
0603
R67
10K
0603
R68
10K
0603
J9
1
2
3
4
5
6
7
8
9
10
CON10
GND
GND
GND
4
UX2
Spare
SOT23_5
GND
5
2
4
UX3
Spare
SOT23_5
GND
2
4
3
2
3
UX1
Spare
SOT23_5
3
4
3
2
5
5
5
+3.3V
UX4
Spare
SOT23_5
GND
Figure 8: 78Q8430 MAC Interface Schematic
16
Rev. 1.0
UM_8430_006
78Q8430 STEM Demo Board User Manual
+3.3V
C20
0.1
0603
GND
GND
C21
0.1
0603
GND
C22
0.1
0603
GND
R63
680
0603
Activity
CHSGND1
Link
LED0
TXP
TXN
RXP
RXN
XTLP
GNDA3
99
GNDA2
91
U1B
78Q8430B-100
89
GNDA1
XTLN
92
LED1
90
LED0
97
TXOP
98
TXON
94
RXIP
93
RXIN
J16
C23
0.1
0603
GND
R44
49.9
1%
0603
R45
49.9
1%
0603
R46
49.9
1%
0603
R47
49.9
1%
0603
C24
0.1
0603
GND
CGND3
9
10
1
2
3
4
5
6
7
8
11
12
87
XTLP
88
XTLN
RALED
RCLED
RX/TX
TD+
TDTDCT
CGND1
CGND2
RDCT
RD+
RDLCLED
LALED
Link
CGND4
J0011F01P TabUp
Pulse Engr
CGND
CGND
Gnd pins 2 and 4
Y1
1
3
C30
27PF
0603
CGND
14
LED1
13
VCCA3
VCCA2
VCCA1
1
96
C19
10
0805
86
FERRITE
R_0805
Use Zero Ohm Resistor
VCCA
95
L1
+3.3V
25.000MHZ
50ppm
Raltron
GND L11B
C31
27PF
0603
GND
GND
C25
10
0805
R64
680
0603
GND
+3.3V
Figure 9: 78Q8430 PHY Interface Schematic
Rev. 1.0
17
78Q8430 STEM Demo Board User Manual
UM_8430_006
Table 3: STEM Demo Board Bill of Materials
1
2
2
15
C30,C31
C9-C18,C20-C24
CAP, 27pF, 50V
CAP, 0.1uF, 16V
3
6
C3-C6,C19,C25
CAP,10uF,10V
4
0
GND1,GND2
MTHOLE
5
3
J5,J6,J8
CON3
6
2
TP4,TP8
CON2
7
1
J9
CON10
8
9
10
11
2
1
1
1
STEM connector
Integrated RJ45
25MHz Crystal
Ferrite Bead
12
14
RES, 10k, 5%
R_0603
ERJ-3GEYJ103V
Panasonic
13
1
J1,J4
J16
Y1
L1 (USE 0-ohm)
R19,R65,R67-R69,
R71,R72,R89-R95
SW1
PCB
Part
Vendor
Footprint
Number
C_0603
C1608C0G1H270J TDK
C_0603
ECJ-1VB1E104K
Panasonic
GRM21BR61A106K
C_0805
Murata
E19L
MTHOLE
Sullins
SIP\3P
PBC03SAAN
Electronics
Corp
Sullins
SIP\2P
PBC02SAAN
Electronics
Corp
Sullins
SIP\10P
PBC10SAAN
Electronics
Corp
STEM CON 5-5179010-6
AMP
RJ45-INT J1011F01P
Pulse Eng
XTAL-SMD ABMM-25MHz
Abracon
L_0805
MMZ2012S181A
TDK
PB
EVQ-PJX05M
Panasonic
14
1
S3
15
4
Switch, PB
8-Position DIP
Switch
RES, 49.9, 1%
16
47
17
18
1
2
R44-R47
R1,R2,R4-R18,
R20-R38, R53,
RES, 33, 5%
R54,R70,R81-R88
R3
RES,100,5%
R63,R64
RES, 680, 5%
19
1
TP1
20
2
21
Item Quantity
Reference
Part
DIPSW-16 90HBJ08PT
Grayhill, Inc
R_0603
ERJ-3EKF49R9V
Panasonic
R_0603
ERJ-3GEYJ330V
Panasonic
R_0603
R_0603
ERJ-3GEYJ101V
ERJ-3GEYJ681V
CON17
SIP\17P
PBC17SAAN
TP2,TP5
Mictor 38-pin
MICTOR
2-767004-2
1
U1
78Q8430
100 LQFP
78Q8430
22
1
U2
SOIC8
93LC46BT-I/SN
23
4
UX1-UX4
93LC46
Spare – not
installed
Panasonic
Panasonic
Sullins
Electronics
Corp
Tyco
Teridian
Semiconductor
Microchip
18
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Figure 10: Top Silkscreen Layout
Figure 11: Top Layer Layout
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Figure 12: Ground Layer Layout
Figure 13: Inner Layer 1 Layout
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Figure 14: Inner Layer 2 Layout
Figure 15: VCC Layer Layout
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Figure 16: Bottom Layer Layout
Figure 17: Bottom Silkscreen Layout
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5 Ordering Information
Table 4 lists the order number and description for the 78Q8430 STEM Demo Board.
Table 4: Order Numbers and Description
Part Description
78Q8430 STEM Demo Board (D8430T3B_STEM)
Order Number
78Q8430STEM-DB
6 Related Documentation
The following 78Q8430 documents are available from Teridian Semiconductor Corporation:
78Q8430 Preliminary Data Sheet
78Q8430 Layout Guidelines
78Q8430 Software Driver Development Guidelines
78Q8430 Software User Guide for ST/OS-20
78Q8430 STEM Demo Board User Manual
78Q8430 ARM9 Linux Driver User and Test Guide
78Q8430 Embest Evaluation Board User Manual
7 Contact Information
For more information about Teridian Semiconductor products or to check the availability of the 78Q8430,
contact us at:
6440 Oak Canyon Road
Suite 100
Irvine, CA 92618-5201
Telephone: (714) 508-8800
FAX: (714) 508-8878
Email: lan.support@teridian.com
For a complete list of worldwide sales offices, go to http://www.teridian.com.
Rev. 1.0
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Revision History
Revision
1.0
24
Date
03/20/2008
Description
First publication.
Rev. 1.0
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