IAUC120N06S5N017ATMA1

IAUC120N06S5N017 OptiMOS™-5 Power Transistor Product Summary Features • OptiMOS™ power MOSFET for automotive applications • N-channel - Enhancement mode - Normal level VDS 60 V RDS(on),max 1.7 mW ID 120 A • MSL1 up to 260°C peak reflow PG-TDSON-8-43 • 175 °C operating temperature • Green product (RoHS compliant) • 100% Avalanche tested 1 1 Type Package Marking IAUC120N06S5N017 PG-TDSON-8-43 5N06N017 Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Drain current ID Conditions V GS=10 V, Chip limitation1,2) V GS=10V, DC current3) T a=85 °C, V GS=10 V, Value 226 Unit A 120 R thJA on 2s2p2,4) 30 Pulsed drain current2) I D,pulse T C=25 °C, t p= 100 µs 757 Avalanche energy, single pulse2) E AS I D=60 A 345 mJ Avalanche current, single pulse I AS - 120 A Gate source voltage V GS - ±20 V Power dissipation P tot T C=25 °C 167 W Operating and storage temperature T j, T stg - -55 ... +175 °C Rev. 1.0 page 1 2020-05-04 IAUC120N06S5N017 Parameter Symbol Values Conditions Unit min. typ. max. Thermal characteristics2) Thermal resistance, junction - case R thJC - - - 0.9 Thermal resistance, junction ambient4) R thJA - - 23.3 - K/W Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0V, I D=1mA 60 - - Gate threshold voltage V GS(th) V DS=V GS, I D=94µA 2.2 2.8 3.4 Zero gate voltage drain current I DSS V DS=60V, V GS=0V, T j=25°C - - 1 T j=125°C1) - - 100 V DS=60V, V GS=0V, V µA Gate-source leakage current I GSS V GS=20V, V DS=0V - - 100 nA Drain-source on-state resistance R DS(on) V GS=7V, I D=30A - 1.6 1.9 mW V GS=10V, I D=60A - 1.3 1.7 - - 1.6 - Gate resistance2) Rev. 1.0 RG page 2 W 2020-05-04 IAUC120N06S5N017 Parameter Symbol Values Conditions Unit min. typ. max. - 5348 6952 - 1160 1507 Dynamic characteristics2) Input capacitance C iss Output capacitance C oss Reverse transfer capacitance Crss - 56 84 Turn-on delay time t d(on) - 13.4 - Turn-off delay time t d(off) - 26.9 - Rise time tr - 7.0 - Fall time tf - 17.2 - Gate to source charge Q gs - 24.0 31.2 Gate to drain charge Q gd - 13.7 20.6 Gate charge total Qg - 73.7 95.9 Gate plateau voltage V plateau - 4.5 - V A V GS=0V, V DS=30V, f =1MHz V DD=30V, V GS=10V, I D=60A, R G,ext=3.5W pF ns Gate Charge Characteristics2) V DD=30V, I D=60A, V GS=0 to 10V nC Reverse Diode Diode continous forward current2) IS T C=25 °C - - 120 Diode pulse current2) I S,pulse T C=25 °C, t p= 100 µs - - 757 Diode forward voltage V SD V GS=0V, I F=60A, T j=25°C - 0.8 1.1 V Reverse recovery time2) t rr - 49 - ns Reverse recovery charge2) Q rr - 49 - nC V R=30V, I F=50A, di F/dt =100A/µs 1) Practically the current is limited by the overall system design including the customer-specific PCB. 2) The parameter is not subject to production test - verified by design/characterization. 3) The product can operate at a specified current based on best practice to minimze electromigration at the solder joint. For rare events and inrush currents, the value may be exceeded. 4) Device on a four-layer 2s2p FR4 PCB defined in accordance with JEDEC standards (JESD51-5-7). PCB is vertical in still air. Rev. 1.0 page 3 2020-05-04 IAUC120N06S5N017 1 Power dissipation 2 Drain current P tot = f(T C); V GS = 10 V I D = f(T C); V GS = 10 V 200 250 180 225 160 200 140 175 120 150 ID [A] Ptot [W] Chip current 100 80 100 60 75 40 50 20 25 0 DC current 125 0 0 50 100 150 200 0 50 100 TC [°C] 150 200 TC [°C] 3 Safe operating area 4 Max. transient thermal impedance I D = f(V DS); T C = 25 °C; D = 0 Z thJC = f(t p) parameter: t p parameter: D =t p/T 1000 101 1 µs 10 µs 100 µs 100 150 µs 100 ID [A] ZthJC [K/W] 0.5 0.1 10-1 0.05 10 0.01 10-2 single pulse 1 10-3 0.1 1 10 100 VDS [V] Rev. 1.0 10-6 10-5 10-4 10-3 10-2 10-1 100 tp [s] page 4 2020-05-04 IAUC120N06S5N017 5 Typ. output characteristics 6 Typ. drain-source on-state resistance I D = f(V DS); T j = 25 °C R DS(on) = f(I D); T j = 25 °C parameter: V GS parameter: V GS 1000 8 900 7 800 10 V 700 6 7V 5 500 RDS(on) [mW] ID [A] 600 6V 400 5V 4 5.5 V 3 300 5.5 V 6V 2 7V 200 10 V 5V 1 100 0 0 1 2 3 4 5 0 6 0 35 70 105 140 175 210 245 280 315 350 VDS [V] ID [A] 7 Typ. transfer characteristics 8 Typ. drain-source on-state resistance I D = f(V GS); V DS = 6V R DS(on) = f(T j); parameter: T j parameter: ID, VGS 1000 4 -55 °C 900 3.5 25 °C 800 3 175 °C 700 RDS(on) [mW] ID [A] 600 500 400 2.5 VGS=7V, ID=30A 2 1.5 VGS=10V, ID=60A 300 1 200 0.5 100 0 1 2 3 4 5 6 7 8 9 10 VGS [V] Rev. 1.0 0 -60 -20 20 60 100 140 180 Tj [°C] page 5 2020-05-04 IAUC120N06S5N017 9 Typ. gate threshold voltage 10 Typ. capacitances V GS(th) = f(T j); V GS = V DS C = f(V DS); V GS = 0 V; f = 1 MHz parameter: I D 104 3.5 Ciss Coss 103 3 C [pF] VGS(th) [V] 940 µA 94 µA 102 2.5 Crss 2 1.5 101 -60 -20 20 60 100 140 0 180 10 20 30 40 50 60 VDS [V] Tj [°C] 11 Typical forward diode characteristics 12 Avalanche characteristics IF = f(VSD) I AS= f(t AV) parameter: T j parameter: Tj(start) 103 1000 102 100 IF [A] IAV [A] 25 °C 150 °C 25 °C 25 °C 175 °C 175 °C 101 10 100 0 0.2 0.4 0.6 0.8 1 1.2 1.4 VSD [V] Rev. 1.0 100 °C 1 0.1 1 10 100 1000 tAV [µs] page 6 2020-05-04 IAUC120N06S5N017 13 Avalanche energy 14 Drain-source breakdown voltage E AS = f(T j) V BR(DSS) = f(T j); I D = 1 mA parameter: I D 66 800 64 30 A VBR(DSS) [V] EAS [mJ] 600 400 60 A 62 60 200 58 120 A 56 0 25 75 125 -55 175 -15 Tj [°C] 25 65 105 145 Tj [°C] 15 Typ. gate charge 16 Gate charge waveforms V GS = f(Q gate); I D = 60 A pulsed parameter: V DD 10 V GS 12 V 9 Qg 30 V 8 48V 7 VGS [V] 6 5 V gs(th) 4 3 2 Q g(th) Q sw Q gate 1 Q gs 0 0 8 16 24 32 40 48 56 64 72 Q gd 80 Qgate [nC] Rev. 1.0 page 7 2020-05-04 IAUC120N06S5N017 Package Outline Footprint Packaging Rev. 1.0 page 8 2020-05-04 IAUC120N06S5N017 Published by Infineon Technologies AG 81726 Munich, Germany © Infineon Technologies AG 2020 All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 1.0 page 9 2020-05-04 IAUC120N06S5N017 Revision History Version Date Changes Revision 1.0 04.05.2020 Final Data Sheet Rev. 1.0 page 10 2020-05-04