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IR25750LTRPBF

IR25750LTRPBF

  • 厂商:

    EUPEC(英飞凌)

  • 封装:

    SOT23-5

  • 描述:

    IC CURRENT SENSE SOT23-5

  • 数据手册
  • 价格&库存
IR25750LTRPBF 数据手册
IR25750LPBF HVICTM SOT-23 Current Sensing IC Features            Description VDS(on) or VCE(on) sensing Eliminates external current sensing resistors Enables inductance-less current sensing 600V blocking capability Programmability and temperature compensation possible No VCC required Gate drive on/off sync input Filter delay at GATE turn-on (200nsec typ.) 20.8V zener clamps on GATE and CS pins Integrated ESD protection and latch immunity on all pins Tiny 5-pin SOT-23 package The IR25750L is a novel current sensing IC that extracts the VDS(on) of a power MOSFET, or the VCE(on) of an IGBT, during the switch on-time. IR’s proprietary 600V HVIC technology then blocks the high drain voltage to during the MOSFET or IGBT off-time. This IC allows for external current sensing resistors to be eliminated for reducing power losses and increasing overall system efficiency. The IC includes a gate drive input that provides VCC supply voltage to the IC and synchronizes the internal sensing circuit to the on and off times of the switch. Programmability and temperature compensation are also possible. Applications         MOSFET, DirectFET, or IGBT current sensing Over-current protection Industrial applications Motor control Power tools Brick converters Forklifts Induction heating Package Options 5 Lead SOT 23 Typical Connection Diagram Ordering Information Base Part Number Package Type IR25750LPBF SOT23-5L 1 www.irf.com © 2015 International Rectifier Standard Pack Form Quantity Tape and Reel 3000 Orderable Part Number IR25750LTRPBF January 15, 2015 IR25750LPBF Table of Contents Page Description 1 Ordering Information 1 Typical Connection Diagram 1 Absolute Maximum Ratings 3 Recommended Operating Conditions 3 Electrical Characteristics 4 Functional Block Diagram 5 Timing Diagram 6 Pin Definitions 7 Pin Assignments 7 Input / Output Pin Equivalent Circuit Diagrams 8 Functional Description 9 Package Details: 5L SOT-23 13 Tape and Reel Details: 5L SOT-23 14 Part Marking Information 16 Qualification Information 17 2 www.irf.com © 2015 International Rectifier January 15, 2015 IR25750LPBF Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM, all currents are defined positive into any pin. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol VS †† Min VS pin voltage -20 VGATE VCS GATE pin voltage RΘJA Thermal resistance, junction to ambient TJ TS TL † Definition † -0.3 CS pin voltage 5L SOT-23 Junction temperature Storage temperature IC pin temperature (soldering, 10 seconds) Max Units 625 VCLAMP — 191 -55 150 — 300 †† V ºC/W ºC The test condition for the minimum –VS rating is for a pulse width of 1usec. Larger pulse widths will result in a lower –VS voltage rating. This IC contains a 20.8V voltage clamp structure between the GATE and COM pins, and, between the CS and COM pins. Please note that this pin should not be driven by a DC, low impedance power source greater than the VCLAMP specified in the Electrical Characteristics section. Recommended Operating Conditions For proper operation the device should be used within the recommended conditions. Symbol VS VS pin voltage VGATE VCS TJ 3 Definition GATE pin voltage CS pin voltage Junction temperature www.irf.com © 2015 International Rectifier Min Max -5.0 600 COM VCLAMP -40 125 Units V ºC January 15, 2015 IR25750LPBF Electrical Characteristics TA = 25 °C unless otherwise specified. All parameters are referenced to COM. Definition Min Typ Max Units Test Conditions GATE-to-CS rising-edge blank delay time — 200 — nsec VGATE = rising edge 21.1 22.5 24.0 V IGATE = 1mA Symbol GATE Pin Characteristics tDLY VCLAMP1 GATE pin internal Zener clamp voltage High-Voltage Switching Node Input (VS Pin) Characteristics ILK RVS_CS Offset supply leakage current — — 50 A VGATE = COM, VS = 600V VS-to-CS ‘ON’ resistance — 6.2 — kΩ VGATE = 15V COM — CS Pin Characteristics VCS_LOW CS pin voltage during GATE pin ‘low’ state — VCLAMP2 CS pin internal Zener clamp voltage — 4 www.irf.com © 2015 International Rectifier V 20.8 — VGATE = COM ICS = 1mA January 15, 2015 IR25750LPBF Functional Block Diagram CS 1 5K 50K 10pF GATE VS HVFET 1K D1 3 5 R1 Q1 C1 4 COM 5 www.irf.com © 2015 International Rectifier January 15, 2015 IR25750LPBF Timing Diagram GATE t VS 600Vmax CS OFF 6 www.irf.com t tDLY © 2015 International Rectifier ON OFF t January 15, 2015 IR25750LPBF Pin Definitions Pin Symbol Description 1 CS Current sense output 2 N/C No connect 3 GATE VCC supply and on/off sync input 4 COM IC ground 5 VS Switch drain or collector input sensing node Pin Assignments VS 1 5 IR25750L CS N/C 2 GATE 3 COM 4 5-Lead SOT 23 7 www.irf.com © 2015 International Rectifier January 15, 2015 IR25750LPBF Input / Output Pin Equivalent Circuit Diagrams VS 600V GATE 20.8V CS 20.8V COM 8 www.irf.com © 2014 International Rectifier February, 2014 IR25750LPBF Functional Description I. General Description The IR25750L current sensing circuit eliminates the traditional series-connected sensing resistor and is connected instead in parallel to the power switch. The circuit measures the VDS(on) of the switching power MOSFET or VCE(on) of an IGBT. The IC has four external connection nodes (VS, GATE, CS, COM) and includes (Figure 1): a 600V MOSFET (HVFET); an RC-delay circuit (R1, C1, D1); and a PMOS hold-down transistor (Q1). The circuit does not require a VCC supply node and instead utilizes the existing gate drive signal for powering and turning the circuit on and off. During the off-time of the external power switch (M1), the gate drive signal is at COM, the HVFET is off, Q1 is on, and the CS node is held at COM. Since the internal HVFET is off, any high voltage occurring at the drain of the power MOSFET (600Vmax) will be safely blocked by the HVFET from the rest of the low-voltage circuitry. When M1 is turned on by the gate drive signal, the drain voltage of M1 will decrease to a level given by the VDS(on) of M1. After a short delay time (200nsec, typical) set by the internal R-C delay block (R1, C1), the gate voltage of the HVFET rises up and turns the HVFET on. Q1 turns off, therefore releasing the CS output pin. The VDS(on) of M1 is then transmitted from the VS pin, through the HVFET, to the CS output pin. There is an internal voltage divider formed by a 1Kohm resistor at the VS pin, the RDS(on) of the HVFET (0.2Kohm), and a 50Kohm resistor from the source of HVFET to COM. The ratio of this resistor divider is approximately unity (50/51.2), resulting an excellent matching from the VS pin to the CS pin. A small series R-C filter (5K and 10pF) also exists at the CS pin to help suppress high-frequency noise. Also, important to note, to avoid internal high-voltage damage to the IC, the IR25750L must always turn on after a slight delay from M1 (as set by the internal 200nsec delay block). To ensure this delay, the gate resistor (RGATE) must be placed before the GATE pin of the IR25750L and the gate of M1. The GATE pin of the IR25750L and the gate of M1 are then connected together to form a single gate node. When the gate drive signal of M1 goes low again, M1 turns off, and the gate of the HVFET gets discharged quickly through D1. The HVFET turns off again and blocks any high voltage occurring at the drain of M1. The CS output pin is then held at COM again through Q1. Assuming the drain of M1 is a typical high-voltage switching node that is connected to an inductor, the voltage signal produced at the CS output node will be the same sawtooth waveform that would result from using a traditional current sensing resistor placed at the source of M1 (Figure 2). The CS output pin can then be connected to a comparator circuit or used for any other desired current-sensing functions of a PWM controller or MCU circuit. High-Voltage Switching Node IR25750L CS VCS Output 1 5K 50K 10pF GATE VS HVFET 1K D1 3 5 R1 Q1 M1 C1 4 COM Gate Drive Input RGATE Power Ground Figure 1: IR25750L internal circuit diagram. 9 www.irf.com © 2015 International Rectifier January 15, 2015 IR25750LPBF GATE t VS 600Vmax t tDLY CS OFF ON OFF t Figure 2: IR25750L timing diagram. II. PCB Layout Guidelines Since no VCC node is required for this circuit, the pcb layout becomes very simple to design (Figure 3). The IR25750L can be placed conveniently next to the power MOSFET or IGBT and connected easily to the existing pcb traces that are already used for the power switch (GATE, DRAIN, SOURCE). Only the CS trace needs to be routed back to the main PWM controller or MCU of the power supply circuit. Also, important to note, the power ground of the switching circuit must be separate from the COM connection of the IR25750L. The COM pin of the IR25750L should be connected to the source of the power MOSFET with a single trace only, and, the power ground should not be routed through the COM pin of the IR25750L. A typical pcb layout is also shown for a DirectFET footprint (Figure 4). Again, the IR25750L can be placed directly next to the MOSFET and connected to the existing traces. 10 www.irf.com © 2015 International Rectifier January 15, 2015 IR25750LPBF From Inductor Switched Node D IR25750L CS CS OUTPUT Power MOSFET or IGBT (DPAK) VS Single trace from IC COM to source. N/C GATE DRIVE SIGNAL GATE COM G RGATE Power Ground S Keep power ground separate from IC COM connection. Figure 3: IR25750L typical pcb surface-mount layout (DPAK or D2PAK MOSFET or IGBT). Keep power ground separate from IC COM connection. Single trace from IC COM to source. Figure 4: IR25750L typical pcb surface-mount layout (DirectFET). 11 www.irf.com © 2015 International Rectifier January 15, 2015 IR25750LPBF III. Current Sensing Functionality With the IR25750L connected properly in a switching circuit application, the waveforms (Figure 4) show the functionality of the circuit and the desired current sense signal at the CS pin. Compared to the conventional resistor sensing method, both methods match the actual current shape and both exhibit noise spikes due to switching. Proper filtering or digital blanking of the final PWM or MCU current sensing circuit will easily ignore these noise spikes to prevent any false triggering. Figure 4: IR25750L switching waveforms vs. resistor method (green=IDRAIN, red=VCS, blue=GATE). (RCS=0.21 ohms, RDS(on)=0.18 ohms) 12 www.irf.com © 2015 International Rectifier January 15, 2015 IR25750LPBF Package Details: 5L SOT-23 13 www.irf.com © 2015 International Rectifier January 15, 2015 IR25750LPBF Tape and Reel Details: 5L SOT-23 14 www.irf.com © 2015 International Rectifier January 15, 2015 IR25750LPBF Tape and Reel Details: 5L SOT-23 15 www.irf.com © 2015 International Rectifier January 15, 2015 IR25750LPBF Part Marking Information: 5L SOT-23 Top Marking YW LC Lot Code Date Code Bottom Marking D IR Logo Part no. 16 www.irf.com © 2015 International Rectifier January 15, 2015 IR25750LPBF Qualification Information † Qualification Level Moisture Sensitivity Level Machine Model ESD Human Body Model IC Latch-Up Test RoHS Compliant Industrial†† (per JEDEC JESD 47) Comments: This family of ICs has passed JEDEC’s Industrial qualification. IR’s Consumer qualification level is granted by extension of the higher Industrial level. MSL1††† SOT-23 (per IPC/JEDEC J-STD-020) Class A (per JEDEC standard EIA/JESD22-A115-A) Class 1B (per ANSI/ESDA/JEDEC standard JS-001-2012) Class I, Level A (per JESD78) Yes † †† Qualification standards can be found at International Rectifier’s web site http://www.irf.com/ Higher qualification ratings may be available should the user have such requirements. Please contact your International Rectifier sales representative for further information. ††† Higher MSL ratings may be available for the specific package types listed here. Please contact your International Rectifier sales representative for further information. The information provided in this document is believed to be accurate and reliable. However, International Rectifier assumes no responsibility for the consequences of the use of this information. International Rectifier assumes no responsibility for any infringement of patents or of other rights of third parties which may result from the use of this information. No license is granted by implication or otherwise under any patent or patent rights of International Rectifier. The specifications mentioned in this document are subject to change without notice. This document supersedes and replaces all information previously supplied. For technical support, please contact IR’s Technical Assistance Center http://www.irf.com/technical-info/ WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 17 www.irf.com © 2015 International Rectifier January 15, 2015
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