IRFSL3607PBF

PD - 97308C IRFB3607PbF IRFS3607PbF IRFSL3607PbF Applications l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits HEXFET® Power MOSFET D G Benefits l Improved Gate, Avalanche and Dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche SOA l Enhanced body diode dV/dt and dI/dt Capability S VDSS RDS(on) typ. max. ID D 75V 7.34m 9.0m 80A : : D D G D S S G G D2Pak IRFS3607PbF TO-220AB IRFB3607PbF D S TO-262 IRFSL3607PbF G D S Gate Drain Source Absolute Maximum Ratings Symbol Parameter Max. Units c 56c 80 ID @ TC = 25°C Continuous Drain Current, VGS @ 10V ID @ TC = 100°C Continuous Drain Current, VGS @ 10V IDM PD @TC = 25°C Pulsed Drain Current Maximum Power Dissipation 140 W Linear Derating Factor 0.96 VGS TJ Gate-to-Source Voltage Operating Junction and ± 20 -55 to + 175 W/°C V °C TSTG Storage Temperature Range d A 310 300 Soldering Temperature, for 10 seconds (1.6mm from case) Mounting torque, 6-32 or M3 screw Avalanche Characteristics EAS (Thermally limited) Single Pulse Avalanche Energy IAR Avalanche Current EAR Repetitive Avalanche Energy c x x 10lb in (1.1N m) e g 120 mJ 46 14 A mJ Thermal Resistance Symbol Parameter k Typ. Max. R JC Junction-to-Case ––– 1.045 R CS Case-to-Sink, Flat Greased Surface, TO-220 0.50 ––– R JA R JA Junction-to-Ambient, TO-220 ––– ––– 62 40 www.irf.com j 2 Junction-to-Ambient (PCB Mount) , D Pak jk Units °C/W 1 01/20/12 IRFB/S/SL3607PbF Static @ TJ = 25°C (unless otherwise specified) Symbol Parameter V(BR)DSS V(BR)DSS/TJ R DS(on) VGS(th) IDSS Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. Typ. Max. Units 75 ––– ––– 2.0 ––– ––– ––– ––– ––– ––– 0.096 ––– 7.34 9.0 ––– 4.0 ––– 20 ––– 250 ––– 100 ––– -100 V V/°C m V μA nA Conditions VGS = 0V, ID = 250μA Reference to 25°C, ID = 5mA VGS = 10V, ID = 46A VDS = VGS, ID = 100μA VDS = 75V, VGS = 0V VDS = 60V, VGS = 0V, TJ = 125°C VGS = 20V VGS = -20V d g Dynamic @ TJ = 25°C (unless otherwise specified) Symbol gfs Qg Qgs Qgd Qsync R G(int) td(on) tr td(off) tf C iss C oss C rss C oss eff. (ER) C oss eff. (TR) Parameter Min. Typ. Max. Units Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Total Gate Charge Sync. (Qg - Qgd) Internal Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Effective Output Capacitance (Energy Related) Effective Output Capacitance (Time Related) h 115 ––– ––– ––– ––– ––– j ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 56 13 16 40 0.55 16 110 43 96 3070 280 130 380 610 ––– 84 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– S nC Conditions VDS = 50V, ID = 46A ID = 46A VDS = 38V VGS = 10V ID = 46A, VDS =0V, VGS = 10V g  ns pF VDD = 49V ID = 46A R G = 6.8 VGS = 10V VGS = 0V VDS = 50V ƒ = 1.0MHz VGS = 0V, VDS = 0V to 60V VGS = 0V, VDS = 0V to 60V g j h Diode Characteristics Symbol Parameter Min. Typ. Max. Units c IS Continuous Source Current ––– ––– 80 ISM (Body Diode) Pulsed Source Current ––– ––– 310 VSD dv/dt trr (Body Diode) Diode Forward Voltage Peak Diode Recovery Reverse Recovery Time Qrr Reverse Recovery Charge IRRM ton Reverse Recovery Current Forward Turn-On Time d Notes:  Calculated continuous current based on maximum allowable junction temperature. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. ‚ Repetitive rating; pulse width limited by max. junction temperature. ƒ Limited by TJmax, starting TJ = 25°C, L = 0.12mH RG = 25, IAS = 46A, VGS =10V. Part not recommended for use above this value. 2 A Conditions MOSFET symbol showing the integral reverse D G S p-n junction diode. ––– ––– 1.3 V TJ = 25°C, IS = 46A, VGS = 0V ––– 27 ––– V/ns TJ = 175°C, IS = 46A, VDS = 75V ––– 33 50 ns TJ = 25°C VR = 64V, IF = 46A ––– 39 59 TJ = 125°C di/dt = 100A/μs ––– 32 48 nC TJ = 25°C ––– 47 71 TJ = 125°C ––– 1.9 ––– A TJ = 25°C Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) g f g „ ISD  46A, di/dt  1920A/μs, VDD V(BR)DSS, TJ  175°C. … Pulse width  400μs; duty cycle  2%. † Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS . ‡ Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS. ˆ When mounted on 1" square PCB (FR-4 or G-10 Material). For recom- mended footprint and soldering techniques refer to application note #AN-994. ‰ Ris measured at TJ approximately 90°C. www.irf.com IRFB/S/SL3607PbF 1000 1000 100 BOTTOM VGS 15V 10V 8.0V 6.0V 5.5V 5.0V 4.8V 4.5V TOP ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP VGS 15V 10V 8.0V 6.0V 5.5V 5.0V 4.8V 4.5V BOTTOM 100 4.5V 10 4.5V 60μs PULSE WIDTH 60μs PULSE WIDTH Tj = 175°C Tj = 25°C 10 1 0.1 1 10 0.1 100 Fig 1. Typical Output Characteristics 100 Fig 2. Typical Output Characteristics 1000 3.0 100 T J = 175°C 10 T J = 25°C 1 VDS = 25V 60μs PULSE WIDTH ID = 80A 3 4 5 6 7 1.0 -60 -40 -20 0 20 40 60 80 100120140160180 T J , Junction Temperature (°C) Fig 4. Normalized On-Resistance vs. Temperature Fig 3. Typical Transfer Characteristics 12.0 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, C ds SHORTED Crss = Cgd VGS , Gate-to-Source Voltage (V) ID= 46A Coss = Cds + Cgd 10000 Ciss Coss 1000 1.5 8 VGS , Gate-to-Source Voltage (V) 100000 2.0 0.5 0.1 2 VGS = 10V 2.5 (Normalized) RDS(on) , Drain-to-Source On Resistance ID, Drain-to-Source Current (A) 10 V DS, Drain-to-Source Voltage (V) V DS, Drain-to-Source Voltage (V) C, Capacitance (pF) 1 Crss 10.0 VDS= 24V VDS= 15V 8.0 6.0 4.0 2.0 0.0 100 1 10 100 VDS, Drain-to-Source Voltage (V) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage www.irf.com 0 10 20 30 40 50 60 Q G , Total Gate Charge (nC) Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 3 IRFB/S/SL3607PbF 1000 OPERATION IN THIS AREA LIMITED BY R DS(on) ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 1000 100 T J = 175°C 10 T J = 25°C 1 100μsec 100 1msec 10msec 10 Tc = 25°C Tj = 175°C Single Pulse VGS = 0V 0.0 0.5 1.0 1.5 1 2.0 70 ID, Drain Current (A) 60 50 40 30 20 10 0 75 100 125 150 175 V(BR)DSS , Drain-to-Source Breakdown Voltage (V) 80 50 100 Id = 5mA 95 90 85 80 75 70 -60 -40 -20 0 20 40 60 80 100120140160180 T J , Temperature ( °C ) T C , Case Temperature (°C) Fig 10. Drain-to-Source Breakdown Voltage Fig 9. Maximum Drain Current vs. Case Temperature 1.20 EAS , Single Pulse Avalanche Energy (mJ) 500 1.00 0.80 Energy (μJ) 100 Fig 8. Maximum Safe Operating Area Fig 7. Typical Source-Drain Diode Forward Voltage 25 10 VDS, Drain-to-Source Voltage (V) VSD, Source-to-Drain Voltage (V) 0.60 0.40 0.20 0.00 ID 5.6A 11A BOTTOM 46A 450 TOP 400 350 300 250 200 150 100 50 0 -10 0 10 20 30 40 50 60 70 80 VDS, Drain-to-Source Voltage (V) 4 DC 1 0.1 Fig 11. Typical COSS Stored Energy 25 50 75 100 125 150 175 Starting T J , Junction Temperature (°C) Fig 12. Maximum Avalanche Energy vs. DrainCurrent www.irf.com IRFB/S/SL3607PbF Thermal Response ( Z thJC ) °C/W 10.00 1.00 D = 0.50 0.20 0.10 0.05 0.10 J 0.02 0.01 0.01 R1 R1 J 1 R2 R2 R3 R3 C  2 1 2 3 3 Ci= iRi Ci iRi 1E-005 4 4 0.01109 0.000003 0.26925 0.000130 0.49731 0.001301 0.26766 0.008693 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc SINGLE PULSE ( THERMAL RESPONSE ) 0.00 1E-006 Ri (°C/W) i (sec) R4 R4 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case 1000 Avalanche Current (A) Duty Cycle = Single Pulse Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 150°C and Tstart =25°C (Single Pulse) 100 0.01 10 0.05 0.10 1 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming  j = 25°C and Tstart = 150°C. 0.1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 14. Typical Avalanche Current vs.Pulsewidth EAR , Avalanche Energy (mJ) 150 Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 14, 15). tav = Average time in avalanche. D = Duty cycle in avalanche = tav ·f ZthJC(D, tav) = Transient thermal resistance, see Figures 13) TOP Single Pulse BOTTOM 1.0% Duty Cycle ID = 46A 125 100 75 50 25 0 25 50 75 100 125 150 175 Starting T J , Junction Temperature (°C) PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC Iav = 2DT/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav Fig 15. Maximum Avalanche Energy vs. Temperature www.irf.com 5 IRFB/S/SL3607PbF 20 IF = 31A V R = 64V 4.0 TJ = 25°C TJ = 125°C 15 3.5 3.0 2.5 ID = 100μA ID = 250μA 2.0 ID = 1.0mA ID = 1.0A 1.5 IRR (A) VGS(th) , Gate Threshold Voltage (V) 4.5 10 5 1.0 0 -75 -50 -25 0 25 50 75 100 125 150 175 200 0 200 T J , Temperature ( °C ) 600 800 1000 Fig. 17 - Typical Recovery Current vs. dif/dt Fig 16. Threshold Voltage vs. Temperature 560 20 IF = 46A V R = 64V IF = 31A V R = 64V 480 TJ = 25°C TJ = 125°C TJ = 25°C TJ = 125°C 400 Q RR (A) 15 IRR (A) 400 diF /dt (A/μs) 10 320 240 160 5 80 0 0 0 200 400 600 800 0 1000 200 400 600 800 1000 diF /dt (A/μs) diF /dt (A/μs) Fig. 19 - Typical Stored Charge vs. dif/dt Fig. 18 - Typical Recovery Current vs. dif/dt 560 IF = 46A V R = 64V 480 TJ = 25°C TJ = 125°C Q RR (A) 400 320 240 160 80 0 0 200 400 600 800 1000 diF /dt (A/μs) 6 Fig. 20 - Typical Stored Charge vs. dif/dt www.irf.com IRFB/S/SL3607PbF D.U.T Driver Gate Drive ƒ - ‚ „ - - * D.U.T. ISD Waveform Reverse Recovery Current +  RG dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test VDD P.W. Period VGS=10V Circuit Layout Considerations  Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer + D= Period P.W. + + - Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Current Inductor Curent ISD Ripple  5% * VGS = 5V for Logic Level Devices Fig 20. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs V(BR)DSS 15V D.U.T RG VGS 20V DRIVER L VDS tp + V - DD IAS tp A 0.01 I AS Fig 21a. Unclamped Inductive Test Circuit LD Fig 21b. Unclamped Inductive Waveforms VDS VDS 90% + VDD - 10% D.U.T VGS VGS Pulse Width < 1μs Duty Factor < 0.1% td(on) Fig 22a. Switching Time Test Circuit tr td(off) tf Fig 22b. Switching Time Waveforms Id Vds Vgs L DUT 0 VCC Vgs(th) 1K Qgs1 Qgs2 Fig 23a. Gate Charge Test Circuit www.irf.com Qgd Qgodr Fig 23b. Gate Charge Waveform 7 IRFB/S/SL3607PbF TO-220AB Package Outline (Dimensions are shown in millimeters (inches)) TO-220AB Part Marking Information (;$03/( 7+,6,6$1,5) /27&2'( $66(0%/('21:: ,17+($66(0%/