PD - 91693A
IRL3402S
HEXFET® Power MOSFET
l
l
l
l
l
Advanced Process Technology
Surface Mount
Optimized for 4.5V-7.0V Gate Drive
Ideal for CPU Core DC-DC Converters
Fast Switching
D
VDSS = 20V
RDS(on) = 0.01Ω
G
Description
ID = 85A
S
These HEXFET Power MOSFETs were designed
specifically to meet the demands of CPU core DC-DC
converters in the PC environment. Advanced
processing techniques combined with an optimized
gate oxide design results in a die sized specifically to
offer maximum efficiency at minimum cost.
The D2Pak is a surface mount power package capable
of accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible onresistance in any existing surface mount package. The
D2Pak is suitable for high current applications because
of its low internal connection resistance and can
dissipate up to 2.0W in a typical surface mount
application.
D 2 Pak
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
V GS
VGSM
EAS
IAR
EAR
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 4.5V
Continuous Drain Current, VGS @ 4.5V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Gate-to-Source Voltage
(Start Up Transient, tp = 100µs)
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Max.
Units
85
54
340
110
0.91
± 10
14
A
W
W/°C
V
V
290
51
11
5.0
-55 to + 150
mJ
A
mJ
V/ns
300 (1.6mm from case )
°C
Thermal Resistance
Parameter
RθJC
RθJA
Junction-to-Case
Junction-to-Ambient ( PCB Mounted,steady-state)**
Typ.
Max.
Units
1.1
40
°C/W
03/03/04
IRL3402S
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
V(BR)DSS
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
LS
Internal Source Inductance
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
IGSS
Min.
20
0.70
65
Typ.
0.02
10
140
80
120
Max. Units
Conditions
V
VGS = 0V, ID = 250µA
V/°C Reference to 25°C, ID = 1mA
0.010
VGS = 4.5V, ID = 51A
Ω
0.008
VGS = 7.0V, ID = 51A
V
VDS = VGS , ID = 250µA
S
VDS = 10V, ID = 51A
25
VDS = 20V, VGS = 0V
µA
250
VDS = 16V, V GS = 0V, TJ = 150°C
100
VGS = 10V
nA
-100
VGS = -10V
78
ID = 51A
18
nC VDS = 10V
30
VGS = 4.5V, See Fig. 6
VDD = 10V
ID = 51A
ns
RG = 5.0Ω, VGS = 4.5V
RD = 0.19Ω,
Between lead,
nH
7.5
and center of die contact
3300
VGS = 0V
1400
pF
VDS = 15V
510
= 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
I SM
V SD
t rr
Q rr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
85
showing the
A
G
integral reverse
340
S
p-n junction diode.
1.3
V
TJ = 25°C, IS = 51A, VGS = 0V
72 110
ns
TJ = 25°C, IF = 51A
160 240
nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature.
Starting TJ = 25°C, L = 220µH
RG = 25Ω, IAS =51A.
ISD ≤ 51A, di/dt ≤ 82A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 150°C
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Uses IRL3402 data and test conditions
Calculated continuous current based on maximum allowable
junction temperature; for recommended current-handling of the
package refer to Design Tip # 93-4
** When mounted on FR-4 board using minimum recommended footprint.
For recommended footprint and soldering techniques refer to application note #AN-994.
IRL3402S
1000
1000
VGS
7.00V
5.00V
4.50V
3.50V
3.00V
2.70V
2.50V
BOTTOM 2.25V
100
2.25V
20µs PULSE WIDTH
TJ = 25 ° C
10
0.1
1
10
100
2.25V
2.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
TJ = 25 ° C
TJ = 150 ° C
1
V DS = 50V
20µs PULSE WIDTH
3
4
5
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
10
100
Fig 2. Typical Output Characteristics
1000
10
1
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
100
20µs PULSE WIDTH
TJ = 150 °C
10
0.1
100
VDS , Drain-to-Source Voltage (V)
2
VGS
7.00V
5.00V
4.50V
3.50V
3.00V
2.70V
2.50V
BOTTOM 2.25V
TOP
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
6
ID = 85A
1.5
1.0
0.5
0.0
-60 -40 -20
VGS = 4.5V
10V
0
20
40
60
80 100 120 140 160
TJ , Junction Temperature ( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
IRL3402S
VGS = 0V,
f = 1MHz
Ciss = Cgs + Cgd , Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
C, Capacitance (pF)
5000
4000
Ciss
3000
Coss
2000
1000
Crss
15
VGS , Gate-to-Source Voltage (V)
6000
0
1
10
ID = 85 A
VDS = 16V
10
5
FOR TEST CIRCUIT
SEE FIGURE 13
0
100
0
VDS , Drain-to-Source Voltage (V)
40
60
80
100
120
QG , Total Gate Charge (nC)
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
10000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
TJ = 150 ° C
100
1000
ID , Drain Current (A)
ISD , Reverse Drain Current (A)
20
TJ = 25 ° C
10
1
10us
100us
100
1ms
10ms
10
0.1
0.2
V GS = 0 V
0.6
1.0
1.4
1.8
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
TC = 25 ° C
TJ = 150 ° C
Single Pulse
1
2.2
1
10
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
100
IRL3402S
600
EAS , Single Pulse Avalanche Energy (mJ)
100
LIMITED BY PACKAGE
ID , Drain Current (A)
80
60
40
20
0
25
50
75
100
125
150
TC , Case Temperature ( °C)
Fig 9. Maximum Drain Current Vs.
Case Temperature
TOP
500
BOTTOM
ID
23A
32A
51A
400
300
200
100
0
25
50
75
100
125
150
Starting TJ , Junction Temperature ( °C)
Fig 10. Maximum Avalanche Energy
Vs. Drain Current
Thermal Response (Z thJC )
10
1
D = 0.50
0.20
PDM
0.10
0.1
0.05
0.02
0.01
0.01
0.00001
t1
t2
SINGLE PULSE
(THERMAL RESPONSE)
0.0001
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1
0.020
0.015
VGS = 4.5V
0.010
VGS = 7.0V
0.005
0
50
100
150
200
250
300
I D , Drain Current (A)
Fig 12. On-Resistance Vs. Drain Current
350
R DS (on), Drain-to-Source On Resistance ( Ω )
R DS (on), Drain-to-Source On Resistance ( Ω )
IRL3402S
0.012
0.011
0.010
0.009
ID = 85A
0.008
0.007
0.006
2
3
4
5
6
7
VGS , Gate-to-Source Voltage (V)
Fig 13. On-Resistance Vs. Gate Voltage
8
IRL3402S
D2Pak Package Outline
10.54 (.415)
10.29 (.405)
1.40 (.055)
MAX.
-A-
1.32 (.052)
1.22 (.048)
2
1.78 (.070)
1.27 (.050)
1
10.16 (.400)
REF.
-B-
4.69 (.185)
4.20 (.165)
6.47 (.255)
6.18 (.243)
3
15.49 (.610)
14.73 (.580)
2.79 (.110)
2.29 (.090)
2.61 (.103)
2.32 (.091)
5.28 (.208)
4.78 (.188)
3X
1.40 (.055)
1.14 (.045)
5.08 (.200)
0.55 (.022)
0.46 (.018)
0.93 (.037)
3X
0.69 (.027)
0.25 (.010)
M
8.89 (.350)
REF.
1.39 (.055)
1.14 (.045)
B A M
MINIMUM RECOMMENDED FOOTPRINT
11.43 (.450)
NOTES:
1
2
3
4
DIMENSIONS AFTER SOLDER DIP.
DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
CONTROLLING DIMENSION : INCH.
HEATSINK & LEAD DIMENSIONS DO NOT INCLUDE BURRS.
LEAD ASSIGNMENTS
1 - GATE
2 - DRAIN
3 - SOURCE
8.89 (.350)
17.78 (.700)
3.81 (.150)
2.08 (.082)
2X
Part Marking Information
D2Pak
INTERNATIONAL
RECTIFIER
LOGO
ASSEMBLY
LOT CODE
A
PART NUMBER
F530S
9246
9B
1M
DATE CODE
(YYWW)
YY = YEAR
WW = WEEK
2.54 (.100)
2X
IRL3402S
Tape & Reel Information
D2Pak
TRR
1.60 (.063)
1.50 (.059)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
FEED DIRECTION 1.85 (.073)
11.60 (.457)
11.40 (.449)
1.65 (.065)
0.368 (.0145)
0.342 (.0135)
15.42 (.609)
15.22 (.601)
24.30 (.957)
23.90 (.941)
TRL
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039)
24.40 (.961)
3
30.40 (1.197)
MAX.
4
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 03/04
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
工商网监
湘ICP备2023018690号
