6N137S

Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers July 2006 Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers Features ■ ■ ■ ■ ■ ■ ■ ■ tm Description The 6N137, HCPL-2601/2611 single-channel and HCPL-2630/ 2631 dual-channel optocouplers consist of a 850 nm AlGaAS LED, optically coupled to a very high speed integrated photodetector logic gate with a strobable output. This output features an open collector, thereby permitting wired OR outputs. The coupled parameters are guaranteed over the temperature range of -40°C to +85°C. A maximum input signal of 5 mA will provide a minimum output sink current of 13mA (fan out of 8). An internal noise shield provides superior common mode rejection of typically 10kV/µs. The HCPL- 2601 and HCPL- 2631 has a minimum CMR of 5 kV/µs. The HCPL-2611 has a minimum CMR of 10 kV/µs. Very high speed-10 MBit/s Superior CMR-10 kV/µs Double working voltage-480V Fan-out of 8 over -40°C to +85°C Logic gate output Strobable output Wired OR-open collector U.L. recognized (File # E90700) Applications ■ ■ ■ ■ ■ ■ ■ Ground loop elimination LSTTL to TTL, LSTTL or 5-volt CMOS Line receiver, data transmission Data multiplexing Switching power supplies Pulse transformer replacement Computer-peripheral interface Package Schematic N/C 1 8 VCC +1 VF1 8 VCC 8 +2 7 VE _2 1 7 V01 VF _ 3 6 VO _ VF2 N/C 4 5 GND +4 5 GND 3 6 V02 8 1 8 1 6N137 HCPL-2601 HCPL-2611 HCPL-2630 HCPL-2631 Truth Table (Positive Logic) Input H L H L H L Enable H H L L NC NC Output L H H H L H A 0.1µF bypass capacitor must be connected between pins 8 and 5. (See note 1) 1 ©2005 Fairchild Semiconductor Corporation Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.5 www.fairchildsemi.com Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers Absolute Maximum Ratings (TA = 25°C unless otherwise specified) Parameter Storage Temperature Operating Temperature Lead Solder Temperature EMITTER DC/Average Forward Input Current Enable Input Voltage Not to exceed VCC by more than 500 mV Reverse Input Voltage Power Dissipation Single Channel Dual Channel (Each Channel) Single Channel Each Channel Single Channel Dual Channel (Each Channel) DETECTOR Supply Voltage Output Current Single Channel Dual Channel (Each Channel) Output Voltage Collector Output Power Dissipation Each Channel Single Channel Dual Channel (Each Channel) VO PO VCC (1 minute max) IO 7.0 50 50 7.0 85 60 V mW V mA VE VR PI IF 50 30 5.5 5.0 100 V V mW mA Symbol TSTG TOPR TSOL Value -55 to +125 -40 to +85 260 for 10 sec Units °C °C °C 45 Recommended Operating Conditions Parameter Input Current, Low Level Input Current, High Level Supply Voltage, Output Enable Voltage, Low Level Enable Voltage, High Level Low Level Supply Current Fan Out (TTL load) Symbol IFL IFH VCC VEL VEH TA N Min 0 *6.3 4.5 0 2.0 -40 Max 250 15 5.5 0.8 VCC +85 8 Units µA mA V V V °C *6.3mA is a guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value is 5.0 mA or less. 2 Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.5 www.fairchildsemi.com Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers Electrical Characteristics (TA = 0 to 70°C Unless otherwise specified) Individual Component Characteristics Parameter EMITTER Input Forward Voltage Input Reverse Breakdown Voltage Input Capacitance Input Diode Temperature Coefficient DETECTOR High Level Supply Current Single Channel Dual Channel Low Level Supply Current Single Channel Dual Channel Low Level Enable Current High Level Enable Current High Level Enable Voltage Low Level Enable Voltage (VCC = 5.5 V, IF = 0 mA) (VE = 0.5V) (VCC = 5.5 V, IF = 10 mA) (VE = 0.5V) (VCC = 5.5 V, VE = 0.5V) (VCC = 5.5 V, VE = 2.0V) (VCC = 5.5 V, IF = 10 mA) (VCC = 5.5 V, IF = 10 mA)(Note 3) IEL IEH VEH VEL 2.0 0.8 ICCL ICCH 7 10 9 14 -0.8 -0.6 10 15 13 21 -1.6 -1.6 mA mA V V mA mA Test Conditions (IF = 10mA) TA = 25°C (IR = 10µA) (VF = 0, f = 1 MHz) (IF = 10mA) Symbol VF Min Typ** 1.4 Max 1.8 1.75 Unit V BVR CIN ∆VF/∆TA 5.0 60 -1.4 V pF mV/°C Switching Characteristics (TA = -40°C to +85°C, VCC = 5 V, IF = 7.5 mA Unless otherwise specified) AC Characteristics Propagation Delay Time to Output High Level Propagation Delay Time to Output Low Level Pulse Width Distortion Output Rise Time (10-90%) Output Rise Time (90-10%) Enable Propagation Delay Time to Output High Level Enable Propagation Delay Time to Output Low Level Common Mode Transient Immunity (at Output High Level) Test Conditions Symbol (Note 4) (TA = 25°C) (RL = 350Ω, CL = 15 pF) (Fig. 12) (Note 5) (TA = 25°C) (RL = 350Ω, CL = 15 pF) (Fig. 12) (RL = 350Ω, CL = 15 pF) (Fig. 12) (RL = 350Ω, CL = 15 pF) (Note 6) (Fig. 12) (RL = 350Ω, CL = 15 pF) (Note 7) (Fig. 12) (IF = 7.5 mA, VEH = 3.5 V) (RL = 350Ω, CL = 15 pF) (Note 8) (Fig. 13) (IF = 7.5 mA, VEH = 3.5 V) (RL = 350Ω, CL = 15 pF) (Note 9) (Fig. 13) (TA = 25°C) |VCM| = 50V, (Peak) (IF = 0 mA, VOH (Min.) = 2.0V) 6N137, HCPL-2630 HCPL-2601, HCPL-2631 HCPL-2611 (RL = 350Ω) (Note 10) (Fig. 14) |VCM| = 400V |CML| |VCM| = 50V (Peak) |TPHLTPLH| tr tf tELH tEHL |CMH| TPHL TPLH Min 20 Typ** Max Unit 45 75 100 ns 25 45 75 100 ns 3 50 12 20 20 35 ns ns ns ns ns V/µs 5000 10,000 10,000 10,000 15,000 10,000 V/µs Common Mode Transient Immunity (at Output Low Level) (RL = 350Ω) (IF = 7.5 mA, VOL (Max.) = 0.8V 6N137, HCPL-2630 HCPL-2601, HCPL-2631 (TA = 25°C)(Note 11)(Fig. 14) HCPL-2611(TA = 25°C) |VCM| = 400V 5000 10,000 10,000 15,000 3 Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.5 www.fairchildsemi.com Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers Transfer Characteristics (TA = -40 to +85°C Unless otherwise specified) DC Characteristics High Level Output Current Low Level Output Current Input Threshold Current Test Conditions Symbol (VCC = 5.5 V, VO = 5.5 V) (IF = 250 µA, VE = 2.0 V) (Note 2) (VCC = 5.5 V, IF = 5 mA) (VE = 2.0 V, ICL = 13 mA) (Note 2) (VCC = 5.5 V, VO = 0.6 V, VE = 2.0 V, IOL = 13 mA) IOH VOL IFT Min Typ** Max 100 Unit µA V mA .35 3 0.6 5 Isolation Characteristics (TA = -40°C to +85°C Unless otherwise specified.) Characteristics Input-Output Insulation Leakage Current Withstand Insulation Test Voltage Test Conditions Symbol (Relative humidity = 45%) (TA = 25°C, t = 5 s) (VI-O = 3000 VDC) (Note 12) (RH < 50%, TA = 25°C) (II-O ≤ 2 µA) (Note 12) ( t = 1 min.) (VI-O = 500 V) (Note 12) (f = 1 MHz) (Note 12) II-O Min Typ** Max 1.0* Unit µA VISO 2500 VRMS Resistance (Input to Output) Capacitance (Input to Output) ** All Typicals at VCC = 5V, TA = 25°C RI-O CI-O 1012 0.6 Ω pF NOTES 1. The VCC supply to each optoisolator must be bypassed by a 0.1µF capacitor or larger. This can be either a ceramic or solid tantalum capacitor with good high frequency characteristic and should be connected as close as possible to the package V CC and GND pins of each device. 2. Each channel. 3. Enable Input - No pull up resistor required as the device has an internal pull up resistor. 4. tPLH -Propagation delay is measured from the 3.75 mA level on the HIGH to LOW transition of the input current pulse to the 1.5 V level on the LOW to HIGH transition of the output voltage pulse. 5. tPHL -Propagation delay is measured from the 3.75 mA level on the LOW to HIGH transition of the input current pulse to the 1.5 V level on the HIGH to LOW transition of the output voltage pulse. 6. tr -Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse. 7. tf -Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse. 8. tELH -Enable input propagation delay is measured from the 1.5 V level on the HIGH to LOW transition of the input voltage pulse to the 1.5 V level on the LOW to HIGH transition of the output voltage pulse. 9. tEHL -Enable input propagation delay is measured from the 1.5 V level on the LOW to HIGH transition of the input voltage pulse to the 1.5 V level on the HIGH to LOW transition of the output voltage pulse. 10. CMH -The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the high state (i.e., V OUT > 2.0 V). Measured in volts per microsecond (V/µs). 11. CML -The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the low output state (i.e., VOUT < 0.8 V). Measured in volts per microsecond (V/µs). 12. Device considered a two-terminal device: Pins 1,2,3 and 4 shorted together, and Pins 5,6,7 and 8 shorted together. 4 Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.5 www.fairchildsemi.com Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers Fig.1 Low Level Output Voltage vs. Ambient Temperature 0.8 Fig. 2 Input Diode Forward Voltage vs. Forward Current 30 16 10 VOL - Low Level Output Voltage (V) 0.7 0.6 0.5 0.4 0.3 0.2 0.1 IOL = 12.8 mA IF - Forward Current (mA) IOL = 9.6 mA Conditions: IF = 5 mA VE = 2 V VCC = 5.5V IOL = 16 mA 1 0.1 0.01 IOL = 6.4 mA 0.001 40 60 80 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 0.0 -40 -20 0 20 TA - Ambient Temperature (°C) VF - Forward Voltage (V) Fig.3 Switching Time vs. Forward Current 120 50 VCC = 5 V Fig. 4 Low Level Output Current vs. Ambient Temperature IF = 15 mA TP - Propagation Delay (ns) 100 IOL - Low Level Output Current (mA) 45 IF = 10 mA 80 RL = 4 kΩ (TPLH) 40 IF = 5 mA 60 35 40 30 20 RL = 350 Ω (TPLH) 0 RL = 1 kΩ RL = 4 kΩ (TPHL) RL = 350 kΩ RL = 1 kΩ (TPLH) 25 Conditions: VCC = 5 V VE = 2 V VOL = 0.6 V 5 7 9 11 13 15 20 -40 -20 0 20 40 60 80 IF - Forward Current (mA) TA - Ambient Temperature (°C) 4 IFT - Input Threshold Current (mA) Fig. 5 Input Threshold Current vs. Ambient Temperature Conditions: VCC = 5.0 V VO = 0.6 V Fig. 6 Output Voltage vs. Input Forward Current 6 RL = 350 5 VO - Output Voltage (V) RL = 350Ω 3 4 RL =4kΩ RL = 1kΩ 3 2 2 1 RL = 1kΩ RL = 4kΩ 1 -40 0 40 60 80 0 1 2 3 4 5 6 -20 0 20 TA - Ambient Temperature (°C) IF - Forward Current (mA) 5 Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.5 www.fairchildsemi.com Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers Fig. 7 Pulse Width Distortion vs. Temperature 80 600 500 400 300 200 100 0 Fig. 8 Rise and Fall Time vs. Temperature PWD - Pulse Width Distortion (ns) 60 Conditions: IF = 7.5 mA VCC = 5 V Tr/Tf - Rise and Fall Time (ns) RL = 4 kΩ Conditions: IF = 7.5 mA VCC = 5 V RL = 4 kΩ (tr) RL = 1 kΩ (tr) RL = 350Ω (tr) 40 RL = 1 kΩ RL = 350Ω 20 0 RL = 1 kΩ RL = 4 kΩ RL = 350Ω (tf) -60 -40 -20 0 20 40 60 80 100 -60 -40 -20 0 20 40 60 80 100 TA - Temperature (°C) TA - Temperature (°C) Fig. 9 Enable Propagation Delay vs. Temperature 120 RL = 4 kΩ (TELH) Fig. 10 Switching Time vs. Temperature 120 TE - Enable Propagation Delay (ns) 80 TP - Propagation Delay (ns) 100 100 80 RL = 1 kΩ TPLH RL = 4 kΩ TPLH RL = 350Ω TPLH 60 RL = 1 kΩ (TELH) RL = 350Ω (TELH) 60 40 20 40 RL = 1 kΩ RL = 4 kΩ RL = 350Ω TPHL 0 -60 RL = 350Ω RL = 1 kΩ RL = 4 kΩ (TEHL) -40 -20 0 20 40 60 80 100 20 -60 -40 -20 0 20 40 60 80 100 TA - Temperature (°C) TA - Temperature (°C) Fig. 11 High Level Output Current vs. Temperature 20 IOH - High Level Output Current (µA) 15 Conditions: VCC = 5.5 V VO = 5.5 V VE = 2.0 V IF = 250 µA 10 5 0 -60 -40 -20 0 20 40 60 80 100 TA - Temperature (°C) 6 Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.5 www.fairchildsemi.com Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers Pulse Generator tr = 5ns Z O = 50Ω +5V IF = 7.5 mA 1 2 Input Monitor (I F) 47 VCC 8 7 6 CL .1 µf bypass RL Output (VO ) Input (IF ) t PHL Output (VO ) tPLH IF = 3.75 mA 1.5 V 90% 10% tf tr 3 4 GND Output (VO ) 5 Fig. 12 Test Circuit and Waveforms for tPLH, tPHL, tr and tf. Pulse Generator tr = 5ns Z O = 50Ω Input Monitor (V E) +5V 3.0 V VCC 1 7.5 mA 8 7 6 CL RL Output (VO ) Input (VE ) t EHL t ELH 1.5 V 2 3 4 .1 µf bypass Output (VO ) 1.5 V GND 5 Fig. 13 Test Circuit tEHL and tELH. 7 Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.5 www.fairchildsemi.com Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers VCC 1 IF A B VFF 8 7 6 5 .1 µf bypass +5V 2 3 4 350Ω Output (VO) GND VCM Pulse Gen Peak VCM 0V 5V Switching Pos. (A), IF = 0 VO VO (Min) CM H VO (Max) VO 0.5 V Switching Pos. (B), I F = 7.5 mA CM L Fig. 14 Test Circuit Common Mode Transient Immunity 8 Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.5 www.fairchildsemi.com Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers Package Dimensions (Through Hole) Package Dimensions (Surface Mount) 0.390 (9.91) 0.370 (9.40) PIN 1 ID. 4 3 2 1 4 3 2 1 PIN 1 ID. 0.270 (6.86) 0.250 (6.35) 5 6 7 8 0.270 (6.86) 0.250 (6.35) 5 6 7 8 0.390 (9.91) 0.370 (9.40) SEATING PLANE 0.070 (1.78) 0.045 (1.14) 0.200 (5.08) 0.140 (3.55) 0.020 (0.51) MIN 0.070 (1.78) 0.045 (1.14) 0.020 (0.51) MIN 0.300 (7.62) TYP 0.016 (0.41) 0.008 (0.20) 0.154 (3.90) 0.120 (3.05) 0.022 (0.56) 0.016 (0.41) 0.100 (2.54) TYP 0.016 (0.40) 0.008 (0.20) 15° MAX 0.300 (7.62) TYP 0.022 (0.56) 0.016 (0.41) 0.100 (2.54) TYP Lead Coplanarity : 0.004 (0.10) MAX 0.045 [1.14] 0.315 (8.00) MIN 0.405 (10.30) MIN Package Dimensions (0.4"Lead Spacing) PIN 1 ID. Recommended Pad Layout for Surface Mount Leadform 4 3 2 1 0.070 (1.78) 0.270 (6.86) 0.250 (6.35) 0.060 (1.52) 5 6 7 8 0.390 (9.91) 0.370 (9.40) SEATING PLANE 0.100 (2.54) 0.070 (1.78) 0.045 (1.14) 0.295 (7.49) 0.415 (10.54) 0.030 (0.76) 0.200 (5.08) 0.140 (3.55) 0.004 (0.10) MIN 0.154 (3.90) 0.120 (3.05) 0.022 (0.56) 0.016 (0.41) 0.100 (2.54) TYP 0.016 (0.40) 0.008 (0.20) 0° to 15° 0.400 (10.16) TYP NOTE All dimensions are in inches (millimeters) 9 Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.5 www.fairchildsemi.com Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers Ordering Information Option S SD W V WV SV SDV Example Part Number 6N137S 6N137SD 6N137W 6N137V 6N137WV 6N137SV 6N137SDV Description Surface Mount Lead Bend Surface Mount; Tape and reel 0.4" Lead Spacing VDE0884 VDE0884; 0.4” lead spacing VDE0884; surface mount VDE0884; surface mount; tape and reel QT Carrier Tape Specifications (“D” Taping Orientation) 12.0 ± 0.1 4.90 ± 0.20 0.30 ± 0.05 4.0 ± 0.1 4.0 ± 0.1 Ø1.55 ± 0.05 1.75 ± 0.10 7.5 ± 0.1 13.2 ± 0.2 16.0 ± 0.3 10.30 ± 0.20 0.1 MAX 10.30 ± 0.20 Ø1.6 ± 0.1 User Direction of Feed 10 Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.5 www.fairchildsemi.com Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers Marking Information 1 2601 V 3 4 2 6 XX YY T1 5 Definitions 1 2 3 4 5 6 Fairchild logo Device number VDE mark (Note: Only appears on parts ordered with VDE option – See order entry table) Two digit year code, e.g., ‘03’ Two digit work week ranging from ‘01’ to ‘53’ Assembly package code Reflow Profile 300 Temperature (°C) 250 200 150 100 50 0 0 0.5 1 1.5 2 2.5 3 225 C peak 215 C, 10–30 s Time above 183C, 60–150 sec Ramp up = 3C/sec 3.5 4 4.5 Time (Minute) • Peak reflow temperature: 225C (package surface temperature) • Time of temperature higher than 183C for 60–150 seconds • One time soldering reflow is recommended 11 Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.5 www.fairchildsemi.com Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. FACT Quiet Series™ GlobalOptoisolator™ GTO™ HiSeC™ I2C™ i-Lo™ ImpliedDisconnect™ IntelliMAX™ ISOPLANAR™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ Across the board. Around the world.™ The Power Franchise® Programmable Active Droop™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. ACEx™ ActiveArray™ Bottomless™ Build it Now™ CoolFET™ CROSSVOLT™ DOME™ EcoSPARK™ E2CMOS™ EnSigna™ FACT™ FAST® FASTr™ FPS™ FRFET™ OCX™ OCXPro™ OPTOLOGIC® OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerEdge™ PowerSaver™ PowerTrench® QFET® QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ µSerDes™ ScalarPump™ SILENT SWITCHER® SMART START™ SPM™ Stealth™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TCM™ TinyBoost™ TinyBuck™ TinyPWM™ TinyPower™ TinyLogic® TINYOPTO™ TruTranslation™ UHC™ UniFET™ UltraFET® VCX™ Wire™ LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I20 Preliminary First Production No Identification Needed Full Production Obsolete Not In Production 12 Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.5 www.fairchildsemi.com