FAN7621S — PFM Controller for Half-Bridge Resonant Converters
July 2010
FAN7621S
PFM Controller for Half-Bridge Resonant Converters
Features
Variable Frequency Control with 50% Duty Cycle for Half-bridge Resonant Converter Topology High Efficiency through Zero Voltage Switching (ZVS) Fixed Dead Time: 350ns Up to 300kHz Operating Frequency Auto-Restart Operation for All Protections with an External LVCC Protection Functions: Over-Voltage Protection (OVP), Over-Current Protection (OCP), Abnormal Over-Current Protection (AOCP), Internal Thermal Shutdown (TSD)
Description
The FAN7621S is a pulse frequency modulation controller for high-efficiency half-bridge resonant converters. Offering everything necessary to build a reliable and robust resonant converter, the FAN7621S simplifies designs and improves productivity, while improving performance. The FAN7621S includes a highside gate-drive circuit, an accurate current-controlled oscillator, frequency-limit circuit, soft-start, and built-in protection functions. The high-side gate-drive circuit has a common-mode noise cancellation capability, which guarantees stable operation with excellent noise immunity. Using the zero-voltage-switching (ZVS) technique dramatically reduces the switching losses and significantly improves efficiency. The ZVS also reduces the switching noise noticeably, which allows a smallsized Electromagnetic Interference (EMI) filter. The FAN7621S can be applied to various resonant converter topologies; such as series resonant, parallel resonant, and LLC resonant converters.
Applications
PDP and LCD TVs Desktop PCs and Servers Adapters Telecom Power Supplies Video Game Consoles
Related Resources
AN4151 — Half-Bridge LLC Resonant Converter Design TM Using FSFR-Series Fairchild Power Switch (FPS )
Ordering Information
Part Number
FAN7621SSJ FAN7621SSJX
Operating Junction Temperature
-40°C to +130°C
Package
16-Lead, Small Outline Package (SOP)
Packaging Method
Tube Tape & Reel
© 2009 Fairchild Semiconductor Corporation FAN7621S • Rev. 1.0.1
www.fairchildsemi.com
FAN7621S — PFM Controller for Half-Bridge Resonant Converters
Application Circuit Diagram
Cr V IN VCC VO
LVCC HVCC
Rmin Rmax Rss Css
FAN7621S
RT AR CS
HO CTR LO
SG PG
Figure 1. Typical Application Circuit (LLC Resonant Half-Bridge Converter)
Block Diagram
LVCC
12 Vre f IR T IR T 3V 2IR T 2V 1V S R Vre f 1 LV Q L U V+ / L U VCC
HVcc
g o od Vr e f
In tern al B ias H UV+ / H UVLevel S hifter
RT
8
T ime D elay 350ns D ivider
H ig h S id e Gate D river
3 2
HO CTR LO
AR
6 5k VC s s H/ VC s s L
T ime D elay 350ns
B alan cin g D elay
L ow S id e Gate D river
14
S LV g o od R
Q
Sh utd own with o ut d elay
CC
TS D L VC C VO V P VA O C P D elay 50n s VO C P D elay 1.5µs 16
PG SG
-1
10
9
CS
Figure 2. Internal Block Diagram
© 2009 Fairchild Semiconductor Corporation FAN7621S • Rev. 1.0.1
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FAN7621S — PFM Controller for Half-Bridge Resonant Converters
Pin Configuration
(1) H V CC (2) C T R ( 3) H O (4) N C (5) N C (6) A R (7) N C (8) R T
Figure 3. Package Diagram
P G (16 ) N C (15 ) L O (14 )
FAN7 6 21S
N C (13 ) L V C C (12 ) N C (11 ) S G (10 ) CS (9)
Pin Definitions
Pin #
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Name
HVCC CTR HO NC NC AR NC RT CS SG NC LVCC NC LO NC PG
Description
This is the supply voltage of the high-side gate-drive circuit IC. This is the drain of the low-side MOSFET. Typically, a transformer is connected to this pin. This is the high-side gate driving signal. No connection No connection This pin is for discharging the external soft-start capacitor when any protection is triggered. When the voltage of this pin drops to 0.2V, all protections are reset and the controller starts to operate again. No connection This pin programs the switching frequency. Typically, an opto-coupler is connected to control the switching frequency for the output voltage regulation. This pin senses the current flowing through the low-side MOSFET. Typically, negative voltage is applied on this pin. This pin is the control ground. No connection This pin is the supply voltage of the control IC. No connection This is the low-side gate driving signal. No connection This pin is the power ground. This pin is connected to the source of the low-side MOSFET.
© 2009 Fairchild Semiconductor Corporation FAN7621S • Rev. 1.0.1
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FAN7621S — PFM Controller for Half-Bridge Resonant Converters
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA=25°C unless otherwise specified.
Symbol
VHO VLO LVCC VCTR VAR VCS VRT dVCTR/dt PD TJ TSTG
Parameter
High-Side Gate Driving Voltage Low-Side Gate Driving Voltage Low-Side Supply Voltage Center Voltage Auto-Restart Pin Input Voltage Current Sense (CS) Pin Input Voltage RT Pin Input Voltage Allowable Center Voltage Slew Rate Total Power Dissipation Maximum Junction Temperature Storage Temperature Range
(1) (1)
Min.
VCTR-0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -5.0 -0.3
Max.
HVCC LVCC 25.0 25.0 600.0 LVCC 1.0 5.0 50 1.13 +150
Unit
V V V V V V V V/ns W °C °C
HVCC to VCTR High-Side VCC Pin to Center Voltage
Recommended Operating Junction Temperature
-40 -55
+130 +150
Note: 1. The maximum value of the recommended operating junction temperature is limited by thermal shutdown.
Thermal Impedance
Symbol
θJA
Parameter
Junction-to-Ambient Thermal Impedance
Value
110
Unit
ºC/W
© 2009 Fairchild Semiconductor Corporation FAN7621S • Rev. 1.0.1
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FAN7621S — PFM Controller for Half-Bridge Resonant Converters
Electrical Characteristics
TA=25°C and LVCC=17V unless otherwise specified.
Symbol
Supply Section ILK IQHVCC IQLVCC IOHVCC IOLVCC
Parameter
Offset Supply Leakage Current Quiescent HVCC Supply Current Quiescent LVCC Supply Current Operating HVCC Supply Current (RMS Value) Operating LVCC Supply Current (RMS Value)
Test Conditions
HVCC=VCTR (HVCCUV+) - 0.1V (LVCCUV+) - 0.1V fOSC=100kHz, CLoad=1nF No Switching fOSC=100kHz, CLoad=1nF No Switching
Min.
Typ.
Max.
Unit
μA μA μA mA μA mA mA
50 50 100 5 100 6 2 120 200 8 200 9 4
UVLO Section LVCCUV+ LVCCUVLVCCUVH HVCCUV+ HVCCUVHVCCUVH LVCC Supply Under-Voltage Positive-Going Threshold (LVCC Start) LVCC Supply Under-Voltage Negative-Going Threshold (LVCC Stop) LVCC Supply Under-Voltage Hysteresis HVCC Supply Under-Voltage Positive-Going Threshold (HVCC Start) HVCC Supply Under-Voltage Negative-Going Threshold (HVCC Stop) HVCC Supply Under-Voltage Hysteresis 8.2 7.8 11.2 8.9 12.5 10.0 2.5 9.2 8.7 0.5 10.2 9.6 13.8 11.1 V V V V V V
Oscillator & Feedback Section VRT fOSC DC fSS tSS V-I Converter Threshold Voltage Output Oscillation Frequency Output Duty Cycle Internal Soft-Start Initial Frequency Internal Soft-Start Time fSS=fOSC+40kHz, RT=5.2kΩ 2 RT=5.2kΩ 1.5 94 48 2.0 100 50 140 3 4 2.5 106 52 V kHz % kHz ms
Output Section Isource Isink tr tf VHOH VHOL VLOH VLOL Peak Sourcing Current Peak Sinking Current Rising Time Falling Time High Level of High-Side Gate Driving Signal (VHVCC-VHO) Low Level of High-Side Gate Driving Signal High Level of High-Side Gate Driving Signal (VLVCC-VLO) Low Level of High-Side Gate Driving Signal HVCC=17V HVCC=17V CLoad=1nF, HVCC=17V 250 460 360 600 65 35 1.0 0.6 IO=20mA 1.0 0.6 V V mA mA ns ns V V
© 2009 Fairchild Semiconductor Corporation FAN7621S • Rev. 1.0.1
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FAN7621S — PFM Controller for Half-Bridge Resonant Converters
Electrical Characteristics (Continued)
TA=25°C and LVCC=17V unless otherwise specified.
Symbol Protection Section
VCssH VCssL VOVP VAOCP tBAO VOCP tBO tDA TSD
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
Beginning Voltage to Discharge CSS Beginning Voltage to Charge CSS and Reset Protections LVCC Over-Voltage Protection AOCP Threshold Voltage AOCP Blanking Time
(2)
0.9 0.16 LVCC > 21V ΔV/Δt=-0.1V/µs VCS < VAOCP; ΔV/Δt=-0.1V/µs ΔV/Δt=-1V/µs VCS < VOCP; ΔV/Δt=-1V/µs ΔV/Δt=-1V/µs 110 -0.64 1.0 21 -1.0
1.0 0.20 23 -0.9 50 -0.58 1.5 250 130
1.1 0.24 25 -0.8
V V V V ns
OCP Threshold Voltage OCP Blanking Time
(2)
-0.52 2.0 400 150
V μs ns °C
Delay Time (Low-Side) Detecting from (2) VAOCP to Switch Off Thermal Shutdown Temperature
(3) (2)
Dead-Time Control Section DT Dead Time 350 ns
Notes: 2. These parameters, although guaranteed, are not tested in production. 3. These parameters, although guaranteed, are tested only in EDS (wafer test) process.
© 2009 Fairchild Semiconductor Corporation FAN7621S • Rev. 1.0.1
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FAN7621S — PFM Controller for Half-Bridge Resonant Converters
Typical Performance Characteristics
These characteristic graphs are normalized at TA=25ºC.
1.1
1.1
1.05
1.05
Normalized at 25OC
Normalized at 25OC
1
1
0.95
0.95
0.9 -50 -25 0 25 50 75 100
0.9 -50 -25 0 25 50 75 100
Temp (OC)
Temp (OC)
Figure 4. Low-Side MOSFET Duty Cycle
vs. Temperature
1.1
Figure 5. Switching Frequency vs. Temperature
1.1
1.05
1.05
Normalized at 25OC
1
Normalized at 25OC
-50 -25 0 25 50 75 100
1
0.95
0.95
0.9
0.9 -50 -25 0 25 50 75 100
Temp (OC)
Temp (OC)
Figure 6. High-Side VCC (HVCC) Start vs. Temperature
1.1
Figure 7. High-Side VCC (HVCC) Stop vs. Temperature
1.1
1.05
1.05
Normalized at 25OC
Normalized at 25OC
1
1
0.95
0.95
0.9 -50 -25 0 25 50 75 100
0.9 -50 -25 0 25 50 75 100
Temp (OC)
Temp (OC)
Figure 8. Low-Side VCC (LVCC) Start vs. Temperature
Figure 9. Low-Side VCC (LVCC) Stop vs. Temperature
© 2009 Fairchild Semiconductor Corporation FAN7621S • Rev. 1.0.1
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FAN7621S — PFM Controller for Half-Bridge Resonant Converters
Typical Performance Characteristics (Continued)
These characteristic graphs are normalized at TA=25ºC.
1.1
1.1
1.05
1.05
Normalized at 25OC
1
Normalized at 25OC
-50 -25 0 25 50 75 100
1
0.95
0.95
0.9
0.9 -50 -25 0 25 50 75 100
Temp (OC)
Temp (OC)
Figure 10. LVCC OVP Voltage vs. Temperature
1.1 1.1
Figure 11. RT Voltage vs. Temperature
1.05
1.05
Normalized at 25
1
Normalized at 25
-50 -25 0 25 50 Temp( ) 75 100
1
0.95
0.95
0.9
0.9 -50 -25 0 25 50 Temp( ) 75 100
Figure 12. VCssL vs. Temperature
1.1
Figure 13. VCssH vs. Temperature
1.05
Normalized at 25OC
1
0.95
0.9 -50 -25 0 25 50 75 100
Temp (OC)
Figure 14. OCP Voltage vs. Temperature
© 2009 Fairchild Semiconductor Corporation FAN7621S • Rev. 1.0.1
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FAN7621S — PFM Controller for Half-Bridge Resonant Converters
Functional Description
1. Basic Operation: FAN7621S is designed to drive high-side and low-side MOSFETs complementarily with 50% duty cycle. A fixed dead time of 350ns is introduced between consecutive transitions, as shown in Figure 15.
Figure 15. MOSFETs Gate Drive Signal
2. Internal Oscillator: FAN7621S employs a currentcontrolled oscillator, as shown in Figure 16. Internally, the voltage of RT pin is regulated at 2V and the charging / discharging current for the oscillator capacitor, CT, is obtained by copying the current flowing out of RT pin (ICTC) using a current mirror. Therefore, the switching frequency increases as ICTC increases.
V REF I CTC I CTC
3V
Figure 17. Resonant Converter Typical Gain Curve
+
S
-
Q -Q
2I CTC
1V
R
+
CT
F /F
-
+
RT
8
-
2V
C oun te r (1/4)
G ate drive
Figure 18. Frequency Control Circuit
Figure 16. Current Controlled Oscillator
3. Frequency Setting: Figure 17 shows the typical voltage gain curve of a resonant converter, where the gain is inversely proportional to the switching frequency in the ZVS region. The output voltage can be regulated by modulating the switching frequency. Figure 18 shows the typical circuit configuration for RT pin, where the optocoupler transistor is connected to the RT pin to modulate the switching frequency. The minimum switching frequency is determined as:
f min =
5.2k Ω × 100 (kHz ) Rmin
(1)
To prevent excessive inrush current and overshoot of output voltage during startup, increase the voltage gain of the resonant converter progressively. Since the voltage gain of the resonant converter is inversely proportional to the switching frequency, the soft-start is implemented by sweeping down the switching frequency ISS from an initial high frequency (f ) until the output voltage is established. The soft-start circuit is made by connecting R-C series network on the RT pin, as shown in Figure 18. FAN7621S also has an internal soft-start of 3ms to reduce the current overshoot during the initial cycles, which adds 40kHz to the initial frequency of the external soft-start circuit, as shown in Figure 19. The initial frequency of the soft-start is given as:
f ISS = (
Assuming the saturation voltage of the opto-coupler transistor is 0.2V, the maximum switching frequency is determined as:
5.2k Ω 5.2k Ω + ) × 100 + 40 (kHz ) Rmin RSS
FAN7621S
(3)
f max = (
5.2k Ω 4.68k Ω + ) × 100( kHz ) Rmin Rmax
(2)
It is typical to set the initial (soft-start) frequency two ~ three times the resonant frequency (fO) of the resonant network.
© 2009 Fairchild Semiconductor Corporation FAN7621S • Rev. 1.0.1
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FAN7621S — PFM Controller for Half-Bridge Resonant Converters
The soft-start time is three to four times the RC time constant. The RC time constant is as follows:
(a )
(b )
( a)
(b ) (a )
(b )
L V CC V AR
t SS = RSS • CSS
fs f
ISS
(4)
V C ssH V C ssL
40kHz
ICr
Control loop take over
t stop
tS /S
(a ) P r o te ction s a r e tr igge r e d, ( b ) F S F R- U S r e sta r ts
Figure 21. Self Auto-Restart Operation
time
Figure 19. Frequency Sweeping of Soft-Start
4. Self Auto-restart: The FAN7621S can restart automatically even if a built-in protection is triggered with external supply voltage. As shown in Figure 20 and Figure 21; once any protections are triggered, M1 switch turns on and V-I converter is disabled. CSS starts to be discharged until the VCss across CSS drops to VCssL. Then all protections are reset, M1 turns off, and V-I converter resumes. The FAN7621S starts switching again with softstart. If the protections occur while VCss is under VCssL and VCssH level, the switching is terminated immediately, VCss continues to increase until reaching VCssH, then CSS is discharged by M1.
5. Protection Circuits: The FAN7621S has several selfprotective functions, such as Over-Current Protection (OCP), Abnormal Over-Current Protection (AOCP), OverVoltage Protection (OVP), and Thermal Shutdown (TSD). These protections are auto-restart mode protections, as shown in Figure 21.
Once a fault condition is detected, switching is terminated and the MOSFETs remain off. When LVCC falls to the LVCC stop voltage of 10V or the AR signal is HIGH, the protection is reset. FAN7621S resumes normal operation when LVCC reaches the start voltage of 12.5V.
Figure 22. Protection Blocks 5.1 Over-Current Protection (OCP): When the sensing pin voltage drops below -0.58V, OCP is triggered and the MOSFETs remain off. This protection has a shutdown time delay of 1.5µs to prevent premature shutdown during startup. Figure 20. Internal Block of AR Pin 5.2 Abnormal Over-Current Protection (AOCP): If the secondary rectifier diodes are shorted, large current with extremely high di/dt can flow through the MOSFET before OCP is triggered. AOCP is triggered without shutdown delay when the sensing pin voltage drops below -0.9V. 5.3 Over-Voltage Protection (OVP): When the LVCC reaches 23V, OVP is triggered. This protection is used when auxiliary winding of the transformer to supply VCC to the controller is utilized. 5.4 Thermal Shutdown (TSD): If the temperature of the junction exceeds approximately 130°C, the thermal shutdown triggers.
After protections trigger, FAN7621S is disabled during the stop-time, tstop, where VCss decreases and reaches to VCssL. The stop-time of FAN7621S can be estimated as:
tstop =Css ·
Rss +Rmin || 5kΩ
(5)
For the soft-start time, ts/s it can be set as Equation (4).
© 2009 Fairchild Semiconductor Corporation FAN7621S • Rev. 1.0.1
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FAN7621S — PFM Controller for Half-Bridge Resonant Converters
6. Current Sensing Using Resistor: FAN7621S senses drain current as a negative voltage, as shown in Figure 23 and Figure 24. Half-wave sensing allows low power dissipation in the sensing resistor, while full-wave sensing has less switching noise in the sensing signal.
7. PCB Layout Guidelines: Duty imbalance problems may occur due to the radiated noise from the main transformer, the inequality of the secondary-side leakage inductances of main transformer, and so on. It is one of the dominant reasons that the control components in the vicinity of RT pin are enclosed by the primary current flow pattern on PCB layout. The direction of the magnetic field on the components caused by the primary current flow is changed when the high- and low-side MOSFET turns on by turns. The magnetic fields with opposite direction from each other induce a current through, into, or out of the RT pin, which makes the turn-on duration of each MOSFET different. It is strongly recommended to separate the control components in the vicinity of RT pin from the primary current flow pattern on PCB layout. Error! Reference source not found. shows an example for the duty-balanced case. The yellow and blue lines show the primary current flows when the lower-side and higherside MOSFETs turn on, respectively. The primary current does not enclose any component of controller.
Figure 23. Half-Wave Sensing
Figure 24. Full-Wave Sensing
Figure 25. Example for Duty Balancing
© 2009 Fairchild Semiconductor Corporation FAN7621S • Rev. 1.0.1
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FAN7621S — PFM Controller for Half-Bridge Resonant Converters
Physical Dimensions
Figure 26. 16-Lead Small Outline Package (SOP)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/.
© 2009 Fairchild Semiconductor Corporation FAN7621S • Rev. 1.0.1
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FAN7621S — PFM Controller for Half-Bridge Resonant Converters
© 2009 Fairchild Semiconductor Corporation FAN7621S • Rev. 1.0.1
www.fairchildsemi.com 13