FDS8433A_00

FDS8433A September 2000 FDS8433A Single P-Channel 2.5V Specified MOSFET General Description This P-Channel enhancement mode power field effect transistors is produced using Fairchild’s proprietary, high cell density, DMOS technology. This very high density processis especially tailored to minimize on-state resistance and provide superior switching performance. Features • -5 A, -20 V. RDS(on) = 0.047 Ω @ VGS = -4.5 V RDS(on) = 0.070 Ω @ VGS = -2.5 V • • • Fast switching speed. High density cell design for extremely low RDS(on). High power and current handling capability. Applications • • • Load switch DC/DC converter Battery protection D D D D 5 6 7 4 3 2 1 SO-8 S S S G 8 Absolute Maximum Ratings Symbol VDSS VGSS ID PD Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed TA = 25°C unless otherwise noted Parameter FDS8433A -20 (Note 1a) Units V V A W ±8 -5 -50 2.5 1.2 1 -55 to +150 Power Dissipation for Single Operation (Note 1a) (Note 1b) (Note 1c) TJ, Tstg Operating and Storage Junction Temperature Range °C Thermal Characteristics RθJA RθJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) 50 25 °C/W °C/W Package Outlines and Ordering Information Device Marking FDS8433A Device FDS8433A Reel Size 13’’ Tape Width 12mm Quantity 2500 units 2000 Fairchild Semiconductor International FDS8433A Rev. C FDS8433A DMOS Electrical Characteristics Symbol BVDSS BVDSS ∆TJ IDSS IGSSF IGSSR TA = 25°C unless otherwise noted Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward Gate-Body Leakage Current, Reverse (Note 2) Test Conditions VGS = 0 V, ID = -250 µA ID = -250 µA, Referenced to 25°C VDS = -16 V, VGS = 0 V VGS = 8 V, VDS = 0 V VGS = -8 V, VDS = 0 V VDS = VGS, ID = -250 µA ID = -250 µA, Referenced to 25°C VGS = -4.5 V, ID = -5 A VGS = -4.5 V, ID = -5 A, TJ=125°C VGS = -2.5 V, ID = -4.3 A VGS = -4.5 V, VDS = -5 V VDS = -5 V, ID = -5 A Min -20 Typ Max Units V Off Characteristics -25 -1 100 -100 mV/°C µA nA nA On Characteristics VGS(th) ∆VGS(th) ∆TJ RDS(on) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance On-State Drain Current Forward Transconductance -0.4 -0.6 4 0.036 0.050 0.047 -1 V mV/°C 0.047 0.085 0.070 ID(on) gFS -25 16 Ω Ω Ω A S Dynamic Characteristics Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance (Note 2) VDS = -10 V, VGS = 0 V, f = 1.0 MHz 1130 480 120 pF pF pF Switching Characteristics td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD = -10 V, ID = -1 A, VGS = -4.5 V, RGEN = 6 Ω 8 23 260 90 16 37 360 125 28 ns ns ns ns nC nC nC VDS = -5 V, ID = -5 A, VGS = -5 V, 20 2.8 3.2 Drain-Source Diode Characteristics and Maximum Ratings IS VSD Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = -2.1 A (Note 2) -2.1 -0.8 -1.2 A V Notes: 1: RθJA is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 50° C/W when mounted on a 1 in2 pad of 2 oz. copper. b) 105° C/W when mounted on a 0.04 in2 pad of 2 oz. copper. c) 125° C/W on a minimum mounting pad of 2 oz. copper. Scale 1 : 1 on letter size paper 2: Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0% FDS8433A Rev. C FDS8433A Typical Characteristics 50 - I D , DRAIN-SOURCE CURRENT (A) -3.5V 40 R DS(on) , NORMALIZ ED DRAIN-SOURCE ON-RESISTANCE VGS = -4.5V -3.0V -2.5V 2 1.8 VGS = -2 .0 V 1.6 30 -2 .5 V 1.4 20 -3 .0 V 1.2 1 0.8 -2.0V 10 -3 .5 V -4 .0 V -4 .5 V -1.5V 0 0 1 2 3 4 5 -VDS , DRAIN-SOURCE VOLTAGE (V) 0 10 20 30 40 50 - I D , DRAIN CURRENT (A) Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.15 R D S(ON) , ON-RESISTANCE (OHM) 1.6 R DS(ON) , NORMALIZED DRAIN-SOURCE ON-RESISTANCE 1.4 ID = -5A VGS = -4.5V ID = -2.5A 0.12 1.2 0.09 1 0.06 TJ = 1 25° C 0.8 0.03 25° C 0.6 -50 -25 0 25 50 75 100 T J , JUNCTION TEMPERATURE (°C) 125 150 0 1 2 3 4 5 -VGS , GATE TO SOURCE VOLT AG E (V) Figure 3. On-Resistance Variation with Temperature. 10 Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 10 - IS , REVERSE DRAIN CURRENT (A) VDS = -5V - ID , DRAIN CURRENT (A) 8 TJ = -55° C 25°C 1 25° C VGS= 0V 3 1 6 TJ =1 25°C 0.1 25°C -55°C 4 2 0.01 0 0.4 0.8 1.2 1.6 2 0.001 0 0.2 0.4 0.6 0.8 1 1.2 -VGS , GATE TO SOURCE VOLTAGE (V) -VS D , BODY DIODE F ORWARD VOLTAGE (V) Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDS8433A Rev. C FDS8433A Typical Characteristics 5 -VGS , GATE-SOURCE VOLTAGE (V) (continued) 3000 I D =-5.0A VDS = -5V -15V CAPACITANCE (pF) 2000 4 -10V Ciss 1000 500 3 Coss 2 200 1 C ss r 100 50 0.1 f = 1 MHz V GS = 0 V 0.2 0.5 1 2 5 -V DS, DRAIN TO SOURCE VOLTAGE (V) 10 20 0 0 4 8 12 Q g , GATE CHARGE (nC) 16 20 Figure 7. Gate-Charge Characteristics. 100 IT LIM N) S(O RD Figure 8. Capacitance Characteristics. 50 100 1m s 10m s 10 0m s 1s 10s DC us 40 POWER (W) -ID, DRAIN CURRENT (A) 10 SINGLE PULSE R θJA=125°C/W TA = 25°C 30 1 0.1 V GS = -4.5V SINGLE PULSE R θJA = 125°C/W T A = 25°C 0.2 20 10 0.01 0.1 0.5 1 2 5 10 -VDS , DRAIN-SOURCE VOLTAGE (V) 20 50 0 0.001 0.01 0.1 1 10 SINGLE PULSE TIME (SEC) 100 300 Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. 1 TRANSIENT THERMAL RESISTANCE 0.5 0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 0.0001 0.001 0.01 0.1 t1 , TIME (sec) 1 10 D = 0.5 0 .2 0.1 0 .05 0.02 0.01 Single Pulse P(pk) r(t), NORMALIZED EFFECTIVE R θJA (t) = r(t) * R θJA RθJA =125°C/W t1 t2 TJ - TA = P * RθJA (t) Duty Cycle, D = t1 /t2 100 300 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1. Transient themal response will change depending on the circuit board design. FDS8433A Rev. C TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DOME™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ FAST® DISCLAIMER FASTr™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ POP™ PowerTrench® QFET™ QS™ QT Optoelectronics™ Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ VCX™ FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. F1