FKN2L60
FKN2L60
Application Explanation
• • • • Switching mode power supply, light dimmer, electric flasher unit, hair drier TV sets, stereo, refrigerator, washing machine Electric blanket, solenoid driver, small motor control Photo copier, electric tool
3 1: T1 2: Gate 3: T2
2
TO-92
123
1
Bi-Directional Triode Thyristor Planar Silicon
Absolute Maximum Ratings TC=25°C unless otherwise noted
Symbol VDRM Parameter Repetitive Peak Off-State Voltage (Note1 ) Rating 600 Units V
Symbol IT (RMS) ITSM I2t di/dt PGM PG (AV) VGM IGM TJ TSTG
Parameter RMS On-State Current Surge On-State Current I2t for Fusing Critical Rate of Rise of On-State Current Peak Gate Power Dissipation Average Gate Power Dissipation Peak Gate Voltage Peak Gate Current Junction Temperature Storage Temperature
Conditions Commercial frequency, sine full wave 360° conduction, Tc=65℃ Sinewave 1 full cycle, peak value, non-repetitive 50Hz 60Hz
Rating 1.5 9 10 0.4 50 1 0.1 6 0.5 - 40 ~ 125 - 40 ~ 125
Units A A A A2s A/µs W W V A °C °C
Value corresponding to 1 cycle of halfwave, surge on-state current, tp=10ms IG = 2x IGT, tr ≤ 100ns
Thermal Characteristic
Symbol Rth(J-C) Parameter Thermal Resistance Test Condition Junction to case (Note 4) Min. Typ. Max. 40 Units °C/W
©2004 Fairchild Semiconductor Corporation
Rev. A, April 2004
FKN2L60
Electrical Characteristics TC=25°C unless otherwise noted
Symbol IDRM VTM Parameter Repetieive Peak Off-State Current On-State Voltage I VGT Gate Trigger Voltage (Note 2) II III I IGT VGD IH IL dv/dt (dv/dt)C Gate Trigger Current (Note 2) Gate Non-Trigger Voltage Holding Current Latching Current Critical Rate of Rise of Off-State Voltag Critical-Rate of Rise of Off-State Commutating Voltage (Note 3) I, III II VDRM = Rated, Tj = 125°C, Exponential Rise II III TJ=125°C, VD=1/2VDRM VD = 12V, ITM = 1A VD = 12V, IG = 1.2IGT VD=12V, RL=20Ω VD=12V, RL=20Ω Test Condition VDRM applied TC=25°C, ITM=3A Instantaneous measurement T2(+), Gate (+) T2(+), Gate (-) T2(-), Gate (-) T2(+), Gate (+) T2(+), Gate (-) T2(-), Gate (-) Min. 0.2 500 5 Typ. Max. 20 1.6 1.5 1.5 1.5 5 5 5 10 10 10 Units µA V V V V mA mA mA V mA mA mA V/µs V/µs
Notes: 1. Gate Open 2. Measurement using the gate trigger characteristics measurement circuit 3. The critical-rate of rise of the off-state commutating voltage is shown in the table below 4. Case temperature is measured at the T2 terminal 1.5mm away from the molded case.
VDRM (V) FKN2L60
Test Condition 1. Junction Temperature TJ=125°C 2. Rate of decay of on-state commutating current (di/dt)C = - 0.5A/ms 3. Peak off-state voltage VD = 400V
Commutating voltage and current waveforms (inductive load)
Supply Voltage (di/dt)C Main Current
Time
Time
Main Voltage (dv/dt)C
Time VD
Quadrant Definitions for a Triac
T2 Positive + (+) T2 (+) T2
Quadrant II
(-) IGT GATE T1
(+) IGT GATE T1
Quadrant I
IGT (-) T2 (-) T2
+ IGT
Quadrant III
(-) IGT GATE T1
(+) IGT GATE T1
Quadrant IV
T2 Negative
©2004 Fairchild Semiconductor Corporation
Rev. A, April 2004
FKN2L60
Typical Curves
12
12 11
SURGE ON-STATE CURRENT [A]
10
10 9 8 7 6 5 4 3 2 1
60Hz
ON-STATE CURRENT [A]
25 C
8
o
6
125 C
o
50Hz
4
2
0 0.0
0 0.5 1.0 1.5 2.0 2.5 3.0 1 10 100
ON-STATE VOLTAGE [V]
NUMBER OF CYCLES AT 50Hz AND 60Hz
Figure 1. Maximum On-state Characteristics
Figure 2. Rated Surge On-state Current
VGM=10V
NORMALIZED GATE TRIGGER CURRENT [%]
100
1000
IⅡ, IⅢ
GATE VOLTAGE [V]
10
PGM=3W VGT=1.5V
100
IⅠ
1
PG(AV)=0.3W
IGT=10mA
0.1 1 10
VGD=0.2V
100 1000
IGM=1.6A
10 -60
-40
-20
0
20
40
60
80
o
100
120
140
GATE CURRENT [mA]
JUNCTION TEMPERATURE [ C]
Figure 3. Gate Characteristics
Figure 4. Gate Trigger Current vs Tj
NORMALIZED GATE TRIGGER VOLTAGE [%]
1000
1000
TRANSIENT THERMAL IMPEDANCE
100
10
100
[ C/W]
VGTⅡ, VGTⅢ
1
VGTⅠ
o
0.1
0.01
10 -60
-40
-20
0
20
40
60
80
o
100
120
140
1E-3 1E-5
1E-4
1E-3
0.01
0.1
1
10
100
1000
JUNCTION TEMPERATURE [ C]
CONDUCTION TIME [sec]
Figure 5. Gate Trigger Voltage vs Tj
Figure 6. Transient Thermal Impedance
©2004 Fairchild Semiconductor Corporation
Rev. A, April 2004
FKN2L60
Typical Curves (Continues)
140 4.0
MAXIMUM ALLOWABLE CASE, AMBIENT o TEMPERATURE TCMAX, TaMAX [ C/W]
ON-STATE POWER DISSIPATION [W]
1.0 1.2 1.4 1.6 1.8 2.0
120
3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0.0
TC
100
80
60
Ta
40
20
0 0.0
0.2
0.4
0.6
0.8
0.2
0.4
0.6 0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
2.6 2.8
3.0
ON-STATE CURRENT [A]
RMS ON-STATE CURRENT [A]
Figure 7. Allowable Case, Ambient Temperature vs Rms On-state Current
Figure 8. Maximum On-state Power Dissipation
NORMALIZED REPETIVITE OFF-STATE CURRENT [%]
10
5
1000
10
4
NORMALIZED HOLDING CURRENT [%]
140
TYPICAL EXAMPLE
100
10
3
10
2
-60
-40
-20
0
20
40
60
80
o
100
120
10 -60
-40
-20
0
20
40
60
80
o
100
120
140
JUNCTION TEMPERATURE [ C]
JUNCTION TEMPERATURE [ C]
Figure 9. Repetitive Peak Off-state Current vs Junction Temperature
Figure 10. Holding Current vs Junction Temperature
160
1000
NORMALIZED BREAKOVER VOLTAGE [%]
140 120 100 80 60 40 20 0 -60
NORMALIZED GATE TRIGGER CURRENT [%]
TYPICAL EXAMPLE
IⅡ IⅢ
100
IⅠ
-40
-20
0
20
40
60
80
o
100
120
140
10 1 10 100
JUNCTION TEMPERATURE [ C]
GATE CURRENT PULSE WIDTH [µs]
Figure 11. Breakover Voltage vs Junction Temperature
Figure 12. Gate Trigger Current vs Gate Current Pulse Width
©2004 Fairchild Semiconductor Corporation
Rev. A, April 2004
FKN2L60
Typical Curves (Continues)
160
NORMALIZED BREAKOVER VOLTAGE [%]
140 120 100 80 60 40 20
TYPICAL EXAMPLE Tj=125℃
Ⅰ QUADRANT
Ⅲ QUADRANT
10
1
10
2
10
3
10
4
RATE OF RISE OF-STATE VOLTAGE [V/us]
Figure 13. Breakover Voltage vs Rate of Rise of Off-state Voltage
©2004 Fairchild Semiconductor Corporation
Rev. A, April 2004
FKN2L60
Package Dimension
TO-92
4.58 –0.15
+0.25
0.46
14.47 ±0.40
±0.10
4.58 ±0.20
1.27TYP [1.27 ±0.20] 3.60
±0.20
1.27TYP [1.27 ±0.20]
0.38 –0.05
+0.10
3.86MAX
1.02 ±0.10
0.38 –0.05
+0.10
(R2.29)
(0.25)
Dimensions in Millimeters
©2004 Fairchild Semiconductor Corporation Rev. A, April 2004
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACEx™ FACT Quiet Series™ ActiveArray™ FAST Bottomless™ FASTr™ CoolFET™ FPS™ CROSSVOLT™ FRFET™ DOME™ GlobalOptoisolator™ EcoSPARK™ GTO™ E2CMOS™ HiSeC™ EnSigna™ I2C™ FACT™ i-Lo™ Across the board. Around the world.™ The Power Franchise Programmable Active Droop™
DISCLAIMER
ImpliedDisconnect™ PACMAN™ POP™ ISOPLANAR™ Power247™ LittleFET™ MICROCOUPLER™ PowerSaver™ PowerTrench MicroFET™ QFET MicroPak™ QS™ MICROWIRE™ QT Optoelectronics™ MSX™ Quiet Series™ MSXPro™ RapidConfigure™ OCX™ RapidConnect™ OCXPro™ SILENT SWITCHER OPTOLOGIC SMART START™ OPTOPLANAR™
SPM™ Stealth™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic TINYOPTO™ TruTranslation™ UHC™ UltraFET VCX™
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. I10