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NC7WZ02L8X

NC7WZ02L8X

  • 厂商:

    FAIRCHILD(仙童半导体)

  • 封装:

  • 描述:

    NC7WZ02L8X - TinyLogic UHS Dual 2-Input NOR Gate - Fairchild Semiconductor

  • 数据手册
  • 价格&库存
NC7WZ02L8X 数据手册
NC7WZ02 TinyLogic® UHS Dual 2-Input NOR Gate January 2006 NC7WZ02 TinyLogic® UHS Dual 2-Input NOR Gate General Description The NC7WZ02 is a dual 2-Input NOR Gate from Fairchild’s Ultra High Speed Series of TinyLogic®. The device is fabricated with advanced CMOS technology to achieve ultra high speed with high output drive while maintaining low static power dissipation over a very broad VCC operating range. The device is specified to operate over the 1.65V to 5.5V VCC range. The inputs and output are high impedance when VCC is 0V. Inputs tolerate voltages up to 7V independent of VCC operating voltage. Features ■ Space saving US8 surface mount package ■ MicroPak™ Pb-Free leadless package ■ Ultra High Speed: tPD 2.4ns typ into 50pF at 5V VCC ■ High Output Drive: ±24mA at 3V VCC ■ Broad VCC Operating Range: 1.65V to 5.5V ■ Matches the performance of LCX when operated at 3.3V VCC ■ Power down high impedance inputs/output ■ Overvoltage tolerant inputs facilitate 5V to 3V translation ■ Patented noise/EMI reduction circuitry implemented Ordering Information Order Number NC7WZ02K8X NC7WZ02L8X Package Number MAB08A MAC08A Package Code Top Mark WZ02 P5 Package Description 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide Pb-Free 8-Lead MicroPak, 1.6 mm Wide Supplied As 3k Units on Tape and Reel 5k Units on Tape and Reel Pb-Free package per JEDEC J-STD-020B. Logic Symbol IEEE/IEC A1 B1 A2 B2 ≥1 Y1 Y2 TinyLogic® is a registered trademark of Fairchild Semiconductor Corporation. MicroPak™ is a trademark of Fairchild Semiconductor Corporation. ©2006 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com NC7WZ02 Rev. 1.0.0 NC7WZ02 TinyLogic® UHS Dual 2-Input NOR Gate Connection Diagrams Pin Assignment for US8 Pin Descriptions Pin Name An, Bn Yn Description Inputs Outputs A1 B1 Y2 GND 1 8 VCC Y1 B2 A2 2 7 3 6 Function Table Y=A+B Inputs Outputs B L H L H L = LOW Logic Level 4 5 (Top View) US8 Pin One Orientation Diagram A L L H H H = HIGH Logic Level Y H L L L (Top View) AAA Pin One AAA represents Product Code Top Mark – see ordering code Note: Orientation of Top Mark determines Pin One location. Read the top product code mark left to right, Pin One is the lower left pin (see diagram). Pad Assignments for MicroPak A1 7 B1 6 Y2 5 VCC 8 4 GND 1 2 3 Y1 B2 A2 (Top Through View) 2 www.fairchildsemi.com NC7WZ02 Rev. 1.0.0 NC7WZ02 TinyLogic® UHS Dual 2-Input NOR Gate Absolute Maximum Ratings (The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation.) Symbol VCC VIN VOUT IIK IOK IOUT ICC/IGND TSTG TJ TL PD Supply Voltage DC Input Voltage DC Output Voltage Parameter Rating −0.5V to +7V −0.5V to +7V −0.5V to +7V −50mA −50mA ±50mA ±100mA −65°C to +150°C 150°C 260°C 250mW DC Input Diode Current @ VIN ≤ -0.5V DC Output Diode Current @ VOUT ≤ -0.5V DC Output Current DC VCC/GND Current Storage Temperature Junction Temperature under Bias Junction Lead Temperature (Soldering, 10 seconds) Power Dissipation @ +85°C Recommended Operating Conditions1 Symbol VCC VCC VIN VOUT TA tr, tf Supply Voltage Operating Supply Voltage Data Retention Input Voltage Output Voltage Operating Temperature Input Rise and Fall Time VCC @ 1.8V±0.15V, 2.5V±0.2V VCC @ 3.3V±0.3V VCC @ 5.0V±0.5V θJA Thermal Resistance 0ns/V to 20ns/V 0ns/V to 10ns/V 0ns/V to 5ns/V 250°C/W Parameter Rating 1.65V to 5.5V 1.5V to 5.5V 0V to 5.5V 0V to VCC −40°C to +85°C Notes: 1. Unused inputs must be held HIGH or LOW. They may not float. 3 www.fairchildsemi.com NC7WZ02 Rev. 1.0.0 NC7WZ02 TinyLogic® UHS Dual 2-Input NOR Gate DC Electrical Characteristics TA = 25°C Symbol VIH VIL VOH –40°C to +85°C Max Min 0.75 VCC 0.7 VCC 0.25 VCC 0.3 VCC 0.25 VCC 0.3 VCC 1.55 2.2 2.9 4.4 1.29 1.9 2.4 2.3 3.8 0.1 0.1 0.1 0.1 0.24 0.3 0.4 0.55 0.55 ±0.1 1 0.1 0.1 0.1 0.1 0.24 0.3 0.4 0.55 0.55 ±1.0 10 µA µA V V V Parameter HIGH Level Input Voltage LOW Level Input Voltage High Level Output Voltage Conditions VCC (V) 1.65 to 1.95 2.3 to 5.5 1.65 to 1.95 2.3 to 5.5 Min 0.75 VCC 0.7 VCC Typ Max Units V VIN = VIL, IOH = –100µA 1.65 2.3 3.0 4.5 1.55 2.2 2.9 4.4 1.29 1.9 2.4 2.3 3.8 1.65 2.3 3.0 4.5 1.52 2.15 2.80 2.68 4.20 0.0 0.0 0.0 0.0 0.08 0.10 0.15 0.22 0.22 IOH = –4mA IOH = –8mA IOH = –16mA IOH = –24mA IOH = –32mA VOL Low Level Output Voltage VIN = VIH, IOL = 100µA 1.65 2.3 3.0 3.0 4.5 1.65 2.3 3.0 4.5 IOL = 4mA IOL = 8mA IOL = 16mA IOL = 24mA IOL = 32mA IIN IOFF Input Leakage Current Power OFF Leakage Current Quiescent Supply Current VIN = 5.5V, GND VIN or VOUT = 5.5V VIN = 5.5V, GND 1.65 2.3 3.0 3.0 4.5 0 to 5.5 0.0 ICC 1.65 to 5.5 1 10 µA 4 www.fairchildsemi.com NC7WZ02 Rev. 1.0.0 NC7WZ02 TinyLogic® UHS Dual 2-Input NOR Gate AC Electrical Characteristics TA = +25˚C –40°C to +85°C Symbol Parameter Conditions RL = 1MΩ, CL = 15pF VCC (V) 1.8 ± 0.15 2.5 ± 0.2 3.3 ± 0.3 5.0 ± 0.5 Min 2.0 1.2 0.8 0.5 1.2 0.8 Typ 5.4 3.3 2.5 2.0 3.1 2.4 2.5 13.5 17.5 Max 9.8 5.4 3.8 3.0 4.6 3.7 Min 2.0 1.2 0.8 0.5 1.2 0.8 Max 10 5.8 4.1 3.3 5.0 4.0 Figure Units Number ns Figure 1 Figure 3 tPLH, tPHL Propagation Delay tPLH, tPHL Propagation Delay CIN CPD Input Capacitance Power Dissipation Capacitance RL = 500Ω, CL = 50pF 3.3 ± 0.3 5.0 ± 0.5 0 3.3 5.0 ns pF pF Figure 1 Figure 3 Note 2 Figure 2 Notes: 2. CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD) at no output loading and operating at 50% duty cycle. (See Figure 2.) CPD is related to ICCD dynamic operating current by the expression: CPD = ICCD / (VCC) (F). AC Loading and Waveforms VCC Input CL* RL Output *CL includes load and stray capacitance. Input PRR = 1.0MHz; tW = 500ns tRISE = 3ns VCC Input GND 10% tFALL = 3ns Figure 1. AC Test Circuit 90% 50% 90% 50% 10% VCC A Input Output VOL VOH tPHL tPLH 50% 50% Input = AC Waveform; tr, tf = 1.8ns; PRR = 10MHz; Duty Cycle = 50% Figure 3. AC Waveforms Figure 2. ICCD Test Circuit 5 www.fairchildsemi.com NC7WZ02 Rev. 1.0.0 NC7WZ02 TinyLogic® UHS Dual 2-Input NOR Gate Tape and Reel Specification Tape Format for MircoPak Package Designator L8X Tape Section Leader (Start End) Carrier Trailer (Hub End) Number Cavities 125 (typ) 3000 75 (typ) Cavity Status Empty Filled Empty Cover Tape Status Sealed Sealed Sealed Tape Dimension inches (millimeters) 6 www.fairchildsemi.com NC7WZ02 Rev. 1.0.0 NC7WZ02 TinyLogic® UHS Dual 2-Input NOR Gate Reel Dimension for MircoPak inches (millimeters) Tape Size 8 mm A 7.0 (177.8) B 0.059 (1.50) C 0.512 (13.00) D 0.795 (20.20) N 2.165 (55.00) W1 0.331 + 0.059/−0.000 (8.40 + 1.50/−0.00) W2 0.567 (14.40) W3 W1 + 0.078/−0.039 (W1 + 2.00/−1.00) 7 www.fairchildsemi.com NC7WZ02 Rev. 1.0.0 NC7WZ02 TinyLogic® UHS Dual 2-Input NOR Gate Tape Format for US8 Package Designator K8X Tape Section Leader (Start End) Carrier Trailer (Hub End) Number Cavities 125 (typ) 3000 75 (typ) Cavity Status Empty Filled Empty Cover Tape Status Sealed Sealed Sealed Tape Dimension inches (millimeters) 8 www.fairchildsemi.com NC7WZ02 Rev. 1.0.0 NC7WZ02 TinyLogic® UHS Dual 2-Input NOR Gate Physical Dimensions inches (millimeters) unless otherwise noted 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide Package Number MAB08A 9 www.fairchildsemi.com NC7WZ02 Rev. 1.0.0 NC7WZ02 TinyLogic® UHS Dual 2-Input NOR Gate Pb-Free 8-Lead MicroPak, 1.6 mm Wide Package Number MAC08A 10 www.fairchildsemi.com NC7WZ02 Rev. 1.0.0 NC7WZ02 TinyLogic® UHS Dual 2-Input NOR Gate TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ FAST® ActiveArray™ FASTr™ Bottomless™ FPS™ Build it Now™ FRFET™ CoolFET™ GlobalOptoisolator™ CROSSVOLT™ GTO™ DOME™ HiSeC™ EcoSPARK™ I2C™ E2CMOS™ i-Lo™ EnSigna™ ImpliedDisconnect™ FACT™ IntelliMAX™ FACT Quiet Series™ Across the board. Around the world.™ The Power Franchise® Programmable Active Droop™ DISCLAIMER ISOPLANAR™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC® OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerEdge™ PowerSaver™ PowerTrench® QFET® QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ µSerDes™ ScalarPump™ SILENT SWITCHER® SMART START™ SPM™ Stealth™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic® TINYOPTO™ TruTranslation™ UHC™ UltraFET® UniFET™ VCX™ Wire™ FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILDíS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I17 11 www.fairchildsemi.com NC7WZ02 Rev. 1.0.0
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