SI4467DY

Si4467DY January 2001 Si4467DY P-Channel 1.8V Specified PowerTrench MOSFET General Description This P-Channel 1.8V specified MOSFET is a rugged gate version of Fairchild Semiconductor’s advanced PowerTrench process. It has been optimized for power management applications with a wide range of gate drive voltage (1.8V – 8V). Features • –13.5 A, –20 V. RDS(ON) = 8.5 mΩ @ VGS = –4.5 V RDS(ON) = 10.5 mΩ @ VGS = –2.5 V RDS(ON) = 14 mΩ @ VGS = –1.8 V • Fast switching speed • High performance trench technology for extremely low RDS(ON) • High current and power handling capability Applications • Power management • Load switch • Battery protection D D D D SO-8 DD D D 5 6 7 4 3 2 1 Pin 1 SO-8 G SG S S SS S TA=25oC unless otherwise noted 8 Absolute Maximum Ratings Symbol VDSS VGSS ID PD Drain-Source Voltage Gate-Source Voltage Drain Current – Continuous – Pulsed Parameter Ratings –20 ±8 (Note 1a) Units V V A W –13.5 –50 2.5 1.5 1.2 -55 to +175 Power Dissipation for Single Operation (Note 1a) (Note 1b) (Note 1c) TJ, TSTG Operating and Storage Junction Temperature Range °C Thermal Characteristics RθJA RθJA RθJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1c) (Note 1) 50 125 25 °C/W °C/W °C/W Package Marking and Ordering Information Device Marking 4467 Device Si4467DY Reel Size 13’’ Tape width 12mm Quantity 2500 units 2001 Fairchild Semiconductor International Si4467DY Rev A Si4467DY Electrical Characteristics Symbol BVDSS ∆BVDSS ∆TJ IDSS IGSSF IGSSR TA = 25°C unless otherwise noted Parameter Drain–Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate–Body Leakage, Forward Gate–Body Leakage, Reverse (Note 2) Test Conditions VGS = 0 V, ID = –250 µA ID = –250 µA, Referenced to 25°C VDS = –16 V, VGS = 8 V, VGS = –8 V, VGS = 0 V VDS = 0 V VDS = 0 V Min –20 Typ Max Units V Off Characteristics –12 –1 100 –100 mV/°C µA nA nA On Characteristics VGS(th) ∆VGS(th) ∆TJ RDS(on) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance VDS = VGS, ID = –250 µA ID = –250 µA, Referenced to 25°C VGS = –4.5 V, ID = –13.5 A ID = –12 A VGS = –2.5 V, ID = –10.5 A VGS = –1.8 V, VGS=–4.5 V, ID =–13.5A, TJ=125°C VGS = –4.5 V, VDS = –5 V, VDS = –5 V ID = –13.5 A –0.4 –0.6 3 6.7 8.0 9.8 9.0 –1.5 V mV/°C 8.5 10.5 14 13 mΩ ID(on) gFS On–State Drain Current Forward Transconductance –50 70 A S Dynamic Characteristics Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance (Note 2) VDS = –10 V, f = 1.0 MHz V GS = 0 V, 8237 1497 750 pF pF pF Switching Characteristics td(on) tr td(off) tf Qg Qgs Qgd Turn–On Delay Time Turn–On Rise Time Turn–Off Delay Time Turn–Off Fall Time Total Gate Charge Gate–Source Charge Gate–Drain Charge VDD = –10V, VGS = –4.5 V, ID = –1 A, RGEN = 6 Ω 20 24 300 140 36 38 480 224 120 ns ns ns ns nC nC nC VDS = –10 V, VGS = –4.5 V ID = –13.5 A, 86 20 11 Drain–Source Diode Characteristics and Maximum Ratings IS VSD Maximum Continuous Drain–Source Diode Forward Current Drain–Source Diode Forward VGS = 0 V, IS = –2.1 A Voltage –2.1 (Note 2) A V –0.6 –1.2 Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 50 °C/W when mounted on a 1in2 pad of 2 oz copper b) 105 °C/W when mounted on a .04 in2 pad of 2 oz copper c) 125 °C/W when mounted on a minimum pad. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% Si4467DY Rev A Si4467DY Typical Characteristics 50 -2.0V -ID, DRAIN CURRENT (A) 40 -2.5V -1.8V 30 -1.5V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE VGS = -4.5V 3 2.6 2.2 VGS = -1.5V 1.8 -1.8V 1.4 1 0.6 -2.0V -2.5V -4.5V 20 10 0 0 0.5 1 1.5 -VDS, DRAIN TO SOURCE VOLTAGE (V) 0 10 20 30 40 50 -ID, DRAIN CURRENT (A) Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.025 RDS(ON), ON-RESISTANCE (OHM) 1.6 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE ID = -13.5A VGS = -10V 1.4 ID = -6.3A 0.02 1.2 0.015 TA = 125oC 0.01 TA = 25oC 0.005 1 0.8 0.6 -50 -25 0 25 50 75 100 125 150 175 TJ, JUNCTION TEMPERATURE (oC) 0 0 1 2 3 4 5 -VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Temperature. 50 VDS = -5.0V -ID, DRAIN CURRENT (A) 40 -IS, REVERSE DRAIN CURRENT (A) Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 VGS = 0V 10 1 0.1 0.01 0.001 0.0001 TA = 125oC 25oC -55oC 30 20 TA = 125oC 10 -55oC 0 0 0.5 1 1.5 2 -VGS, GATE TO SOURCE VOLTAGE (V) 25 C o 0 0.2 0.4 0.6 0.8 1 1.2 -VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. Si4467DY Rev A Si4467DY Typical Characteristics 5 -VGS, GATE-SOURCE VOLTAGE (V) ID = -13.5A 4 VDS = -5V -10V 10000 CISS 8000 CAPACITANCE (pF) -15V f = 1 MHz VGS = 0 V 3 6000 2 4000 1 2000 COSS CRSS 0 0 20 40 60 80 100 Qg, GATE CHARGE (nC) 0 0 5 10 15 20 -VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. 100 1ms -ID, DRAIN CURRENT (A) RDS(ON) LIMIT 10 100ms 1s 1 VGS = -4.5V SINGLE PULSE RθJA = 125oC/W TA = 25oC 0.01 0.1 1 10 100 -VDS, DRAIN-SOURCE VOLTAGE (V) 10s DC 10ms 100µs 50 P(pk), PEAK TRANSIENT POWER (W) Figure 8. Capacitance Characteristics. 40 SINGLE PULSE RθJA = 125°C/W TA = 25°C 30 20 0.1 10 0 0.001 0.01 0.1 1 10 100 t1, TIME (sec) Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 D = 0.5 0.2 RθJA(t) = r(t) + RθJA RθJA = 125 C/W P(pk) t1 t2 SINGLE PULSE o 0.1 0.1 0.05 0.02 0.01 0.01 TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2 0.001 0.0001 0.001 0.01 0.1 t1, TIME (sec) 1 10 100 1000 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design. Si4467DY Rev A TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ DISCLAIMER FAST  FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ PowerTrench  QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER  SMART START™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ UltraFET  VCX™ FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H2