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MRF1517N

MRF1517N

  • 厂商:

    FREESCALE(飞思卡尔)

  • 封装:

  • 描述:

    MRF1517N - RF Power Field Effect Transistor - Freescale Semiconductor, Inc

  • 数据手册
  • 价格&库存
MRF1517N 数据手册
Freescale Semiconductor Technical Data Document Number: MRF1517N Rev. 6, 6/2008 RF Power Field Effect Transistor N - Channel Enhancement - Mode Lateral MOSFET Designed for broadband commercial and industrial applications at frequencies to 520 MHz. The high gain and broadband performance of this device makes it ideal for large- signal, common source amplifier applications in 7.5 volt portable FM equipment. D • Specified Performance @ 520 MHz, 7.5 Volts Output Power — 8 Watts Power Gain — 14 dB Efficiency — 70% • Capable of Handling 20:1 VSWR, @ 9.5 Vdc, 520 MHz, 2 dB Overdrive Features • Characterized with Series Equivalent Large - Signal G Impedance Parameters • Excellent Thermal Stability • N Suffix Indicates Lead - Free Terminations. RoHS Compliant. S • In Tape and Reel. T1 Suffix = 1,000 Units per 12 mm, 7 inch Reel. MRF1517NT1 520 MHz, 8 W, 7.5 V LATERAL N - CHANNEL BROADBAND RF POWER MOSFET CASE 466 - 03, STYLE 1 PLD - 1.5 PLASTIC Table 1. Maximum Ratings Rating Drain - Source Voltage Gate - Source Voltage Drain Current — Continuous Total Device Dissipation @ TC = 25°C Derate above 25°C Storage Temperature Range Operating Junction Temperature (2) (1) Symbol VDSS VGS ID PD Tstg TJ Value - 0.5, +25 ± 20 4 62.5 0.50 - 65 to +150 150 Unit Vdc Vdc Adc W W/°C °C °C Table 2. Thermal Characteristics Characteristic Thermal Resistance, Junction to Case Symbol RθJC Value (3) 2 Unit °C/W Table 3. Moisture Sensitivity Level Test Methodology Per JESD 22 - A113, IPC/JEDEC J - STD - 020 Rating 1 Package Peak Temperature 260 Unit °C 1. Not designed for 12.5 volt applications. T T 2. Calculated based on the formula PD = J – C RθJC 3. MTTF calculator available at http://www.freescale.com/rf . Select Software & Tools/Development Tools/Calculators to access MTTF calculators by product. NOTE - CAUTION - MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and packaging MOS devices should be observed. © Freescale Semiconductor, Inc., 2008. All rights reserved. MRF1517NT1 1 RF Device Data Freescale Semiconductor Table 4. Electrical Characteristics (TC = 25°C unless otherwise noted) Characteristic Off Characteristics Zero Gate Voltage Drain Current (VDS = 35 Vdc, VGS = 0) Gate - Source Leakage Current (VGS = 10 Vdc, VDS = 0) On Characteristics Gate Threshold Voltage (VDS = 7.5 Vdc, ID = 120 μAdc) Drain - Source On - Voltage (VGS = 10 Vdc, ID = 1 Adc) Forward Transconductance (VDS = 10 Vdc, ID = 2 Adc) Dynamic Characteristics Input Capacitance (VDS = 7.5 Vdc, VGS = 0, f = 1 MHz) Output Capacitance (VDS = 7.5 Vdc, VGS = 0, f = 1 MHz) Reverse Transfer Capacitance (VDS = 7.5 Vdc, VGS = 0, f = 1 MHz) Functional Tests (In Freescale Test Fixture) Common - Source Amplifier Power Gain (VDD = 7.5 Vdc, Pout = 8 Watts, IDQ = 150 mA, f = 520 MHz) Drain Efficiency (VDD = 7.5 Vdc, Pout = 8 Watts, IDQ = 150 mA, f = 520 MHz) Gps η — — 14 70 — — dB % Ciss Coss Crss — — — 66 38 6 — — — pF pF pF VGS(th) VDS(on) gfs 1 — — 1.7 0.5 0.9 2.1 — — Vdc Vdc S IDSS IGSS — — — — 1 1 μAdc μAdc Symbol Min Typ Max Unit MRF1517NT1 2 RF Device Data Freescale Semiconductor VGG C9 C8 + C7 R3 B1 R2 C18 B2 C17 C16 + C15 VDD L1 C6 R1 Z6 N1 RF INPUT C1 C2 C3 C4 C5 DUT Z1 Z2 Z3 Z4 Z5 C10 C11 C12 C13 Z7 Z8 Z9 Z10 C14 N2 RF OUTPUT B1, B2 C1 C2, C3, C4, C10, C12, C13 C5, C11 C6, C18 C7, C15 C8, C16 C9, C17 C14 L1 N1, N2 Short Ferrite Beads, Fair Rite Products (2743021446) 300 pF, 100 mil Chip Capacitor 0 to 20 pF, Trimmer Capacitors 43 pF, 100 mil Chip Capacitors 120 pF, 100 mil Chip Capacitors 10 μF, 50 V Electrolytic Capacitors 0.1 μF, 100 mil Chip Capacitors 1,000 pF, 100 mil Chip Capacitors 330 pF, 100 mil Chip Capacitor 55.5 nH, 5 Turn, Coilcraft Type N Flange Mounts R1 R2 R3 Z1 Z2 Z3 Z4 Z5, Z6 Z7 Z8 Z9 Z10 Board 15 Ω, 0805 Chip Resistor 1.0 kΩ, 1/8 W Resistor 33 kΩ, 1/2 W Resistor 0.315″ x 0.080″ Microstrip 1.415″ x 0.080″ Microstrip 0.322″ x 0.080″ Microstrip 0.022″ x 0.080″ Microstrip 0.260″ x 0.223″ Microstrip 0.050″ x 0.080″ Microstrip 0.625″ x 0.080″ Microstrip 0.800″ x 0.080″ Microstrip 0.589″ x 0.080″ Microstrip Glass Teflon®, 31 mils, 2 oz. Copper Figure 1. 480 - 520 MHz Broadband Test Circuit TYPICAL CHARACTERISTICS, 480 - 520 MHz 10 Pout , OUTPUT POWER (WATTS) 0 500 MHz 480 MHz 520 MHz IRL, INPUT RETURN LOSS (dB) −5 8 6 −10 520 MHz 480 MHz 4 −15 500 MHz −20 VDD = 7.5 Vdc −25 2 VDD = 7.5 Vdc 0 0 0.2 0.4 0.6 Pin, INPUT POWER (WATTS) 0.8 1.0 1 2 3 4 5 6 7 8 Pout, OUTPUT POWER (WATTS) 9 10 Figure 2. Output Power versus Input Power Figure 3. Input Return Loss versus Output Power MRF1517NT1 RF Device Data Freescale Semiconductor 3 TYPICAL CHARACTERISTICS, 480 - 520 MHz 18 500 MHz 16 520 MHz 14 GAIN (dB) 12 10 8 VDD = 7.5 Vdc 6 1 2 3 4 5 6 7 8 Pout, OUTPUT POWER (WATTS) 9 10 10 1 2 3 5 6 7 8 4 Pout, OUTPUT POWER (WATTS) 9 10 11 Eff, DRAIN EFFICIENCY (%) 480 MHz 70 60 50 40 30 20 VDD = 7.5 Vdc 520 MHz 500 MHz 480 MHz 80 Figure 4. Gain versus Output Power Figure 5. Drain Efficiency versus Output Power 12 Pout , OUTPUT POWER (WATTS) 10 8 520 MHz 6 4 2 0 0 200 400 600 IDQ, BIASING CURRENT (mA) 800 1000 Pin = 27 dBm VDD = 7.5 Vdc 480 MHz 500 MHz 80 70 480 MHz 500 MHz 60 520 MHz 50 Pin = 27 dBm VDD = 7.5 Vdc 0 200 400 600 IDQ, BIASING CURRENT (mA) 800 1000 Eff, DRAIN EFFICIENCY (%) 40 30 Figure 6. Output Power versus Biasing Current Figure 7. Drain Efficiency versus Biasing Current 12 Pout , OUTPUT POWER (WATTS) 10 8 6 480 MHz 4 2 0 5 6 7 8 9 10 VDD, SUPPLY VOLTAGE (VOLTS) Pin = 27 dBm IDQ = 150 mA 500 MHz 520 MHz Eff, DRAIN EFFICIENCY (%) 80 70 500 MHz 60 520 MHz 50 480 MHz 40 Pin = 27 dBm IDQ = 150 mA 5 6 7 8 9 10 30 VDD, SUPPLY VOLTAGE (VOLTS) Figure 8. Output Power versus Supply Voltage Figure 9. Drain Efficiency versus Supply Voltage MRF1517NT1 4 RF Device Data Freescale Semiconductor VGG C8 C7 + C6 R3 B1 R2 C17 B2 + C16 C15 C14 VDD L1 C5 R1 Z5 N1 RF INPUT C1 C2 C3 C4 DUT Z1 Z2 Z3 Z4 C10 C9 C11 C12 Z6 Z7 Z8 Z9 C13 N2 RF OUTPUT B1, B2 C1, C13 C2, C3, C4, C10, C11, C12 C5, C17 C6, C14 C7, C15 C8, C16 C9 L1 N1, N2 Short Ferrite Beads, Fair Rite Products (2743021446) 300 pF, 100 mil Chip Capacitors 0 to 20 pF, Trimmer Capacitors 130 pF, 100 mil Chip Capacitors 10 μF, 50 V Electrolytic Capacitors 0.1 μF, 100 mil Chip Capacitors 1,000 pF, 100 mil Chip Capacitors 33 pF, 100 mil Chip Capacitor 55.5 nH, 5 Turn, Coilcraft Type N Flange Mounts R1 R2 R3 Z1 Z2 Z3 Z4, Z5 Z6 Z7 Z8 Z9 Board 12 Ω, 0805 Chip Resistor 1.0 kΩ, 1/8 W Resistor 33 kΩ, 1/2 W Resistor 0.617″ x 0.080″ Microstrip 0.723″ x 0.080″ Microstrip 0.513″ x 0.080″ Microstrip 0.260″ x 0.223″ Microstrip 0.048″ x 0.080″ Microstrip 0.577″ x 0.080″ Microstrip 1.135″ x 0.080″ Microstrip 0.076″ x 0.080″ Microstrip Glass Teflon®, 31 mils, 2 oz. Copper Figure 10. 400 - 440 MHz Broadband Test Circuit TYPICAL CHARACTERISTICS, 400 - 440 MHz 10 9 Pout , OUTPUT POWER (WATTS) 8 7 6 5 4 3 2 1 0 0 0.1 0.2 0.3 Pin, INPUT POWER (WATTS) 0.4 0.5 VDD = 7.5 Vdc −25 1 2 3 4 5 6 7 Pout, OUTPUT POWER (WATTS) 8 9 10 420 MHz 440 MHz 400 MHz IRL, INPUT RETURN LOSS (dB) −5 400 MHz 420 MHz −15 440 MHz 0 −10 −20 VDD = 7.5 Vdc Figure 11. Output Power versus Input Power Figure 12. Input Return Loss versus Output Power MRF1517NT1 RF Device Data Freescale Semiconductor 5 TYPICAL CHARACTERISTICS, 400 - 440 MHz 17 15 13 GAIN (dB) 11 9 7 VDD = 7.5 Vdc 5 1 2 3 4 5 6 7 8 Pout, OUTPUT POWER (WATTS) 9 10 0 1 2 3 5 6 7 8 4 Pout, OUTPUT POWER (WATTS) 400 MHz 440 MHz 420 MHz Eff, DRAIN EFFICIENCY (%) 70 60 50 40 400 MHz 30 20 10 VDD = 7.5 Vdc 9 10 11 440 MHz 420 MHz Figure 13. Gain versus Output Power Figure 14. Drain Efficiency versus Output Power 12 Pout , OUTPUT POWER (WATTS) 10 8 6 4 2 0 0 200 400 600 IDQ, BIASING CURRENT (mA) 800 1000 Pin = 25.5 dBm VDD = 7.5 Vdc 400 MHz 420 MHz 440 MHz Eff, DRAIN EFFICIENCY (%) 80 70 440 MHz 60 400 MHz 420 MHz 50 40 Pin = 25.5 dBm VDD = 7.5 Vdc 0 200 400 600 IDQ, BIASING CURRENT (mA) 800 1000 30 Figure 15. Output Power versus Biasing Current Figure 16. Drain Efficiency versus Biasing Current 12 Pout , OUTPUT POWER (WATTS) 10 8 440 MHz 6 4 2 0 5 6 7 8 9 10 VDD, SUPPLY VOLTAGE (VOLTS) Pin = 25.5 dBm IDQ = 150 mA 420 MHz Eff, DRAIN EFFICIENCY (%) 400 MHz 80 70 420 MHz 60 440 MHz 50 400 MHz 40 Pin = 25.5 dBm IDQ = 150 mA 5 6 7 8 9 10 30 VDD, SUPPLY VOLTAGE (VOLTS) Figure 17. Output Power versus Supply Voltage Figure 18. Drain Efficiency versus Supply Voltage MRF1517NT1 6 RF Device Data Freescale Semiconductor VGG C8 C7 + C6 R3 B1 R2 C17 B2 C16 C15 VDD + C14 L1 C5 R1 Z5 N1 RF INPUT C1 C2 C3 C4 DUT Z1 Z2 Z3 Z4 C10 C9 C11 C12 Z6 Z7 Z8 Z9 C13 N2 RF OUTPUT B1, B2 C1 C2, C3, C4, C10, C11, C12 C5, C17 C6, C14 C7, C15 C8, C16 C9 C13 L1 N1, N2 Short Ferrite Beads, Fair Rite Products (2743021446) 240 pF, 100 mil Chip Capacitor 0 to 20 pF, Trimmer Capacitors 130 pF, 100 mil Chip Capacitors 10 mF, 50 V Electrolytic Capacitors 0.1 mF, 100 mil Chip Capacitors 1,000 pF, 100 mil Chip Capacitors 39 pF, 100 mil Chip Capacitor 330 pF, 100 mil Chip Capacitor 55.5 nH, 5 Turn, Coilcraft Type N Flange Mounts R1 R2 R3 Z1 Z2 Z3 Z4, Z5 Z6 Z7 Z8 Z9 Board 15 Ω, 0805 Chip Resistor 1.0 kΩ, 1/8 W Resistor 33 kΩ, 1/2 W Resistor 0.471″ x 0.080″ Microstrip 1.082″ x 0.080″ Microstrip 0.372″ x 0.080″ Microstrip 0.260″ x 0.223″ Microstrip 0.050″ x 0.080″ Microstrip 0.551″ x 0.080″ Microstrip 0.825″ x 0.080″ Microstrip 0.489″ x 0.080″ Microstrip Glass Teflon®, 31 mils, 2 oz. Copper Figure 19. 440 - 480 MHz Broadband Test Circuit TYPICAL CHARACTERISTICS, 440 - 480 MHz 10 9 Pout , OUTPUT POWER (WATTS) 8 7 6 5 4 3 2 1 0 0.0 0.2 0.4 0.6 Pin, INPUT POWER (WATTS) 0.8 VDD = 7.5 Vdc −25 1 2 3 4 5 6 7 Pout, OUTPUT POWER (WATTS) 8 9 10 480 MHz 460 MHz IRL, INPUT RETURN LOSS (dB) 440 MHz −5 0 −10 460 MHz 440 MHz −15 480 MHz −20 VDD = 7.5 Vdc Figure 20. Output Power versus Input Power Figure 21. Input Return Loss versus Output Power MRF1517NT1 RF Device Data Freescale Semiconductor 7 TYPICAL CHARACTERISTICS, 440 - 480 MHz 17 440 MHz 15 Eff, DRAIN EFFICIENCY (%) 460 MHz 13 GAIN (dB) 480 MHz 11 9 7 VDD = 7.5 Vdc 5 1 2 3 6 7 8 4 5 Pout, OUTPUT POWER (WATTS) 9 10 0 1 2 3 70 60 50 40 30 20 10 VDD = 7.5 Vdc 5 6 7 8 4 Pout, OUTPUT POWER (WATTS) 9 10 11 480 MHz 440 MHz 460 MHz Figure 22. Gain versus Output Power Figure 23. Drain Efficiency versus Output Power 12 Pout , OUTPUT POWER (WATTS) 10 8 460 MHz 6 4 2 Pin = 27.5 dBm 0 0 200 400 600 IDQ, BIASING CURRENT (mA) 800 1000 440 MHz 480 MHz 80 70 480 MHz 60 460 MHz 440 MHz Eff, DRAIN EFFICIENCY (%) 50 40 Pin = 27.5 dBm 30 0 200 400 600 IDQ, BIASING CURRENT (mA) 800 1000 Figure 24. Output Power versus Biasing Current Figure 25. Drain Efficiency versus Biasing Current 12 Pout , OUTPUT POWER (WATTS) 10 8 6 4 2 Pin = 27.5 dBm 0 5 6 7 8 9 10 VDD, SUPPLY VOLTAGE (VOLTS) 440 MHz 460 MHz 480 MHz 80 Eff, DRAIN EFFICIENCY (%) 70 480 MHz 60 460 MHz 440 MHz 50 40 Pin = 27.5 dBm 30 5 6 7 8 9 10 VDD, SUPPLY VOLTAGE (VOLTS) Figure 26. Output Power versus Supply Voltage Figure 27. Drain Efficiency versus Supply Voltage MRF1517NT1 8 RF Device Data Freescale Semiconductor TYPICAL CHARACTERISTICS 109 MTTF FACTOR (HOURS X AMPS2) 108 107 106 90 100 110 120 130 140 150 160 170 180 190 200 210 TJ, JUNCTION TEMPERATURE (°C) This above graph displays calculated MTTF in hours x ampere2 drain current. Life tests at elevated temperatures have correlated to better than ±10% of the theoretical prediction for metal failure. Divide MTTF factor by ID2 for MTTF in a particular application. Figure 28. MTTF Factor versus Junction Temperature MRF1517NT1 RF Device Data Freescale Semiconductor 9 f = 440 MHz 520 Zin f = 480 MHz 520 ZOL* Z o = 10 Ω f = 480 MHz ZOL* f = 480 MHz Zin 480 f = 440 MHz Zin 400 440 f = 440 MHz ZOL* 400 Z o = 10 Ω Z o = 10 Ω VDD = 7.5 V, IDQ = 150 mA, Pout = 8 W f MHz 480 500 520 Zin Zin Ω 1.06 +j1.82 0.97 +j2.01 ZOL* Ω 3.51 +j0.99 2.82 +j0.75 VDD = 7.5 V, IDQ = 150 mA, Pout = 8 W f MHz 440 460 480 Zin Zin Ω 1.62 +j3.41 1.85 +j3.35 1.91 +j3.31 ZOL* Ω 3.25 +j0.98 3.05 +j0.93 2.54 +j0.84 Zin VDD = 7.5 V, IDQ = 150 mA, Pout = 8 W f MHz 400 420 440 Zin Ω 1.96 +j3.32 2.31 +j3.56 1.60 +j3.45 ZOL* Ω 2.52 +j0.39 2.61 +j0.64 2.37 +j1.04 0.975 +j2.37 1.87 +j1.03 = Complex conjugate of source impedance. = Complex conjugate of source impedance. = Complex conjugate of source impedance. ZOL* = Complex conjugate of the load impedance at given output power, voltage, frequency, and ηD > 50 %. ZOL* = Complex conjugate of the load impedance at given output power, voltage, frequency, and ηD > 50 %. ZOL* = Complex conjugate of the load impedance at given output power, voltage, frequency, and ηD > 50 %. Note: ZOL* was chosen based on tradeoffs between gain, drain efficiency, and device stability. Input Matching Network Device Under Test Output Matching Network Z in Z * OL Figure 29. Series Equivalent Input and Output Impedance MRF1517NT1 10 RF Device Data Freescale Semiconductor Table 5. Common Source Scattering Parameters (VDD = 7.5 Vdc) IDQ = 150 mA f MHz MH 50 100 200 300 400 500 600 700 800 900 1000 S11 |S11| 0.84 0.84 0.86 0.88 0.90 0.92 0.94 0.95 0.96 0.96 0.97 ∠φ - 152 - 164 - 170 - 171 - 172 - 172 - 173 - 173 - 174 - 175 - 175 |S21| 17.66 8.86 4.17 2.54 1.72 1.28 0.98 0.76 0.61 0.50 0.40 S21 ∠φ 97 85 72 62 55 50 46 41 38 33 31 |S12| 0.016 0.016 0.015 0.014 0.013 0.013 0.014 0.010 0.011 0.011 0.006 S12 ∠φ 0 5 -5 -8 - 25 - 10 - 22 - 30 - 14 - 31 55 |S22| 0.77 0.78 0.79 0.80 0.83 0.84 0.86 0.86 0.86 0.85 0.88 S22 ∠φ - 167 - 172 - 173 - 172 - 172 - 172 - 171 - 172 - 171 - 172 - 171 IDQ = 800 mA f MHz MH 50 100 200 300 400 500 600 700 800 900 1000 S11 |S11| 0.90 0.89 0.90 0.90 0.91 0.92 0.93 0.94 0.94 0.95 0.96 ∠φ - 165 - 172 - 175 - 176 - 176 - 176 - 176 - 176 - 176 - 177 - 177 |S21| 20.42 10.20 4.96 3.17 2.26 1.75 1.39 1.14 0.93 0.78 0.65 S21 ∠φ 94 87 79 73 67 63 59 55 51 45 43 |S12| 0.018 0.015 0.015 0.017 0.013 0.011 0.012 0.015 0.008 0.007 0.008 S12 ∠φ 1 -7 - 12 -2 1 -6 - 31 - 34 - 22 2 - 40 |S22| 0.76 0.77 0.77 0.80 0.82 0.83 0.85 0.88 0.87 0.87 0.90 S22 ∠φ - 164 - 170 - 172 - 171 - 172 - 171 - 171 - 171 - 171 - 172 - 170 IDQ = 1.5 A f MHz MH 50 100 200 300 400 500 600 700 800 900 1000 S11 |S11| 0.92 0.90 0.91 0.91 0.92 0.93 0.94 0.94 0.95 0.96 0.97 ∠φ - 165 - 172 - 176 - 176 - 176 - 176 - 176 - 176 - 176 - 177 - 177 |S21| 19.90 9.93 4.84 3.10 2.22 1.73 1.39 1.12 0.93 0.78 0.64 S21 ∠φ 95 88 80 74 68 64 61 56 52 46 44 |S12| 0.017 0.018 0.016 0.014 0.014 0.016 0.013 0.013 0.009 0.008 0.012 S12 ∠φ 3 2 -4 - 11 - 14 -8 - 24 - 24 - 12 10 4 |S22| 0.76 0.77 0.77 0.80 0.81 0.83 0.85 0.87 0.87 0.87 0.89 S22 ∠φ - 164 - 170 - 172 - 172 - 172 - 171 - 171 - 171 - 171 - 173 - 169 MRF1517NT1 RF Device Data Freescale Semiconductor 11 APPLICATIONS INFORMATION DESIGN CONSIDERATIONS This device is a common - source, RF power, N - Channel enhancement mode, Lateral Metal - Oxide Semiconductor Field - Effect Transistor (MOSFET). Freescale Application Note AN211A, “FETs in Theory and Practice”, is suggested reading for those not familiar with the construction and characteristics of FETs. This surface mount packaged device was designed primarily for VHF and UHF portable power amplifier applications. Manufacturability is improved by utilizing the tape and reel capability for fully automated pick and placement of parts. However, care should be taken in the design process to insure proper heat sinking of the device. The major advantages of Lateral RF power MOSFETs include high gain, simple bias systems, relative immunity from thermal runaway, and the ability to withstand severely mismatched loads without suffering damage. MOSFET CAPACITANCES The physical structure of a MOSFET results in capacitors between all three terminals. The metal oxide gate structure determines the capacitors from gate - to - drain (Cgd), and gate - to - source (Cgs). The PN junction formed during fabrication of the RF MOSFET results in a junction capacitance from drain - to - source (Cds). These capacitances are characterized as input (Ciss), output (Coss) and reverse transfer (Crss) capacitances on data sheets. The relationships between the inter - terminal capacitances and those given on data sheets are shown below. The Ciss can be specified in two ways: 1. Drain shorted to source and positive voltage at the gate. 2. Positive voltage of the drain in respect to source and zero volts at the gate. In the latter case, the numbers are lower. However, neither method represents the actual operating conditions in RF applications. drain - source voltage under these conditions is termed VDS(on). For MOSFETs, VDS(on) has a positive temperature coefficient at high temperatures because it contributes to the power dissipation within the device. BVDSS values for this device are higher than normally required for typical applications. Measurement of BVDSS is not recommended and may result in possible damage to the device. GATE CHARACTERISTICS The gate of the RF MOSFET is a polysilicon material, and is electrically isolated from the source by a layer of oxide. The DC input resistance is very high - on the order of 109 Ω — resulting in a leakage current of a few nanoamperes. Gate control is achieved by applying a positive voltage to the gate greater than the gate - to - source threshold voltage, VGS(th). Gate Voltage Rating — Never exceed the gate voltage rating. Exceeding the rated VGS can result in permanent damage to the oxide layer in the gate region. Gate Termination — The gates of these devices are essentially capacitors. Circuits that leave the gate open - circuited or floating should be avoided. These conditions can result in turn - on of the devices due to voltage build - up on the input capacitor due to leakage currents or pickup. Gate Protection — These devices do not have an internal monolithic zener diode from gate - to - source. If gate protection is required, an external zener diode is recommended. Using a resistor to keep the gate - to - source impedance low also helps dampen transients and serves another important function. Voltage transients on the drain can be coupled to the gate through the parasitic gate - drain capacitance. If the gate - to - source impedance and the rate of voltage change on the drain are both high, then the signal coupled to the gate may be large enough to exceed the gate - threshold voltage and turn the device on. DC BIAS Since this device is an enhancement mode FET, drain current flows only when the gate is at a higher potential than the source. RF power FETs operate optimally with a quiescent drain current (IDQ), whose value is application dependent. This device was characterized at IDQ = 150 mA, which is the suggested value of bias current for typical applications. For special applications such as linear amplification, IDQ may have to be selected to optimize the critical parameters. The gate is a dc open circuit and draws no current. Therefore, the gate bias circuit may generally be just a simple resistive divider network. Some special applications may require a more elaborate bias system. GAIN CONTROL Power output of this device may be controlled to some degree with a low power dc control signal applied to the gate, thus facilitating applications such as manual gain control, ALC/AGC and modulation systems. This characteristic is very dependent on frequency and load line. Drain Cgd Gate Cds Cgs Source Ciss = Cgd + Cgs Coss = Cgd + Cds Crss = Cgd DRAIN CHARACTERISTICS One critical figure of merit for a FET is its static resistance in the full - on condition. This on - resistance, RDS(on), occurs in the linear region of the output characteristic and is specified at a specific gate - source voltage and drain current. The MRF1517NT1 12 RF Device Data Freescale Semiconductor MOUNTING The specified maximum thermal resistance of 2°C/W assumes a majority of the 0.065″ x 0.180″ source contact on the back side of the package is in good contact with an appropriate heat sink. As with all RF power devices, the goal of the thermal design should be to minimize the temperature at the back side of the package. Refer to Freescale Application Note AN4005/D, “Thermal Management and Mounting Method for the PLD - 1.5 RF Power Surface Mount Package,” and Engineering Bulletin EB209/D, “Mounting Method for RF Power Leadless Surface Mount Transistor” for additional information. AMPLIFIER DESIGN Impedance matching networks similar to those used with bipolar transistors are suitable for this device. For examples see Freescale Application Note AN721, “Impedance Matching Networks Applied to RF Power Transistors.” Large - signal impedances are provided, and will yield a good first pass approximation. Since RF power MOSFETs are triode devices, they are not unilateral. This coupled with the very high gain of this device yields a device capable of self oscillation. Stability may be achieved by techniques such as drain loading, input shunt resistive loading, or output to input feedback. The RF test fixture implements a parallel resistor and capacitor in series with the gate, and has a load line selected for a higher efficiency, lower gain, and more stable operating region. Two - port stability analysis with this device’s S - parameters provides a useful tool for selection of loading or feedback circuitry to assure stable operation. See Freescale Application Note AN215A, “RF Small - Signal Design Using Two - Port Parameters” for a discussion of two port network theory and stability. MRF1517NT1 RF Device Data Freescale Semiconductor 13 PACKAGE DIMENSIONS A F 3 0.146 3.71 0.095 2.41 0.115 2.92 B D 1 2 R L 0.115 2.92 0.020 0.51 4 N K Q ZONE V 0.35 (0.89) X 45_" 5 _ 10_DRAFT inches mm SOLDER FOOTPRINT DIM A B C D E F G H J K L N P Q R S U ZONE V ZONE W ZONE X INCHES MIN MAX 0.255 0.265 0.225 0.235 0.065 0.072 0.130 0.150 0.021 0.026 0.026 0.044 0.050 0.070 0.045 0.063 0.160 0.180 0.273 0.285 0.245 0.255 0.230 0.240 0.000 0.008 0.055 0.063 0.200 0.210 0.006 0.012 0.006 0.012 0.000 0.021 0.000 0.010 0.000 0.010 MILLIMETERS MIN MAX 6.48 6.73 5.72 5.97 1.65 1.83 3.30 3.81 0.53 0.66 0.66 1.12 1.27 1.78 1.14 1.60 4.06 4.57 6.93 7.24 6.22 6.48 5.84 6.10 0.00 0.20 1.40 1.60 5.08 5.33 0.15 0.31 0.15 0.31 0.00 0.53 0.00 0.25 0.00 0.25 U H 4 P C Y Y E ZONE W 1 G MRF1517NT1 14 RF Device Data Freescale Semiconductor ÉÉÉÉÉÉ ÉÉ ÉÉÉÉ É ÉÉÉÉÉÉ ÉÉ ÉÉÉÉÉÉ ÉÉÉÉ É ÉÉÉÉÉÉ ÉÉ 2 3 NOTES: 1. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1984. 2. CONTROLLING DIMENSION: INCH 3. RESIN BLEED/FLASH ALLOWABLE IN ZONE V, W, AND X. STYLE 1: PIN 1. 2. 3. 4. DRAIN GATE SOURCE SOURCE S ZONE X VIEW Y - Y CASE 466 - 03 ISSUE D PLD- 1.5 PLASTIC PRODUCT DOCUMENTATION Refer to the following documents to aid your design process. Application Notes • AN211A: Field Effect Transistors in Theory and Practice • AN215A: RF Small - Signal Design Using Two - Port Parameters • AN721: Impedance Matching Networks Applied to RF Power Transistors • AN4005: Thermal Management and Mounting Method for the PLD 1.5 RF Power Surface Mount Package Engineering Bulletins • EB212: Using Data Sheet Impedances for RF LDMOS Devices REVISION HISTORY The following table summarizes revisions to this document. Revision 6 Date June 2008 Description • Corrected specified performance values for power gain and efficiency on p. 1 to match typical performance values in the functional test table on p. 2 • Added Product Documentation and Revision History, p. 15 MRF1517NT1 RF Device Data Freescale Semiconductor 15 How to Reach Us: Home Page: www.freescale.com Web Support: http://www.freescale.com/support USA/Europe or Locations Not Listed: Freescale Semiconductor, Inc. Technical Information Center, EL516 2100 East Elliot Road Tempe, Arizona 85284 1 - 800 - 521 - 6274 or +1 - 480 - 768 - 2130 www.freescale.com/support Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen 7 81829 Muenchen, Germany +44 1296 380 456 (English) +46 8 52200080 (English) +49 89 92103 559 (German) +33 1 69 35 48 48 (French) www.freescale.com/support Japan: Freescale Semiconductor Japan Ltd. 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