APT100M50J

APT100M50J 500V, 100A, 0.038Ω Max N-Channel MOSFET Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET. A proprietary planar stripe design yields excellent reliability and manufacturability. Low switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. Reliability in flyback, boost, forward, and other circuits is enhanced by the high avalanche energy capability. S G D S SO 2 T- 27 ISOTOP ® "UL Recognized" file # E145592 APT100M50J G D Single die MOSFET S FEATURES • Fast switching with low EMI/RFI • Low RDS(on) • Ultra low Crss for improved noise immunity • Low gate charge • Avalanche energy rated • RoHS compliant TYPICAL APPLICATIONS • PFC and other boost converter • Buck converter • Two switch forward (asymmetrical bridge) • Single switch forward • Flyback • Inverters Absolute Maximum Ratings Symbol ID IDM VGS EAS IAR Parameter Continuous Drain Current @ TC = 25°C Continuous Drain Current @ TC = 100°C Pulsed Drain Current Gate-Source Voltage Single Pulse Avalanche Energy 2 Avalanche Current, Repetitive or Non-Repetitive 1 Ratings 100 64 490 ±30 3350 75 Unit A V mJ A Thermal and Mechanical Characteristics Symbol PD RθJC RθCS TJ,TSTG VIsolation WT Characteristic Total Power Dissipation @ TC = 25°C Junction to Case Thermal Resistance Case to Sink Thermal Resistance, Flat, Greased Surface Operating and Storage Junction Temperature Range RMS Voltage (50-60hHz Sinusoidal Waveform from Terminals to Mounting Base for 1 Min.) Package Weight -55 2500 1.03 29.2 10 1.1 0.15 150 Min Typ Max 960 0.13 Unit W °C/W °C V oz g in·lbf N·m 12-2006 050-8102 Rev A Torque Terminals and Mounting Screws. Microsemi Website - http://www.microsemi.com Static Characteristics Symbol VBR(DSS) ∆VBR(DSS)/∆TJ RDS(on) VGS(th) ∆VGS(th)/∆TJ IDSS IGSS TJ = 25°C unless otherwise specified Test Conditions VGS = 0V, ID = 250µA Reference to 25°C, ID = 250µA VGS = 10V, ID = 75A APT100M50J Typ 0.60 0.030 4 -10 Max Unit V V/°C Ω V mV/°C µA nA Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Drain-Source On Resistance 3 Min 500 Gate-Source Threshold Voltage Threshold Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Source Leakage Current VGS = VDS, ID = 5mA VDS = 500V VGS = 0V TJ = 25°C TJ = 125°C 3 0.038 5 100 500 ±100 VGS = ±30V Dynamic Characteristics Symbol gfs Ciss Crss Coss Co(cr) Co(er) Qg Qgs Qgd td(on) tr td(off) tf 4 TJ = 25°C unless otherwise specified Test Conditions VDS = 50V, ID = 75A VGS = 0V, VDS = 25V f = 1MHz Parameter Forward Transconductance Input Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance, Charge Related Min Typ 115 24600 330 2645 1535 Max Unit S pF 5 VGS = 0V, VDS = 0V to 333V Effective Output Capacitance, Energy Related Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Current Rise Time Turn-Off Delay Time Current Fall Time VGS = 0 to 10V, ID = 75A, VDS = 250V Resistive Switching VDD = 333V, ID = 75A RG = 2.2Ω 6 , VGG = 15V 775 620 140 280 105 125 280 90 nC ns Source-Drain Diode Characteristics Symbol IS ISM VSD trr Qrr dv/dt Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Peak Recovery dv/dt Test Conditions MOSFET symbol showing the integral reverse p-n junction diode (body diode) Min D Typ Max 100 Unit A G S 490 1.0 855 35 8 V ns µC V/ns ISD = 75A, TJ = 25°C, VGS = 0V ISD = 75A 3 diSD/dt = 100A/µs, TJ = 25°C ISD ≤ 75A, di/dt ≤1000A/µs, VDD = 100V, TJ = 125°C 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25°C, L = 1.19mH, RG = 2.2Ω, IAS = 75A. 3 Pulse test: Pulse Width < 380µs, duty cycle < 2%. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -5.71E-7/VDS^2 + 1.33E-7/VDS + 3.80E-10. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) Microsemi reserves the right to change, without notice, the specifications and information contained herein. 050-8102 Rev A 12-2006 600 500 ID, DRAIN CURRENT (A) V GS = 10V 300 250 ID, DRIAN CURRENT (A) TJ = -55°C APT100M50J T = 125°C J V GS = 7,8 & 10V 400 TJ = 25°C 200 150 100 50 0 6V 300 200 100 TJ = 125°C TJ = 150°C 5V 4.5V 0 25 20 15 10 5 0 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) Figure 1, Output Characteristics NORMALIZED TO VGS = 10V @ 75A 0 30 25 20 15 10 5 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 2, Output Characteristics RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE 2.5 500 VDS> ID(ON) x RDS(ON) MAX. 250µSEC. PULSE TEST @