NTGS3441, NVGS3441
Power MOSFET
1 Amp, 20 Volts, P−Channel TSOP−6
Features
•
•
•
•
•
Ultra Low RDS(on)
Higher Efficiency Extending Battery Life
Miniature TSOP−6 Surface Mount Package
NV Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC−Q101 Qualified and
PPAP Capable
These Devices are Pb−Free and are RoHS Compliant
http://onsemi.com
1 AMPERE
20 VOLTS
RDS(on) = 90 mW
P−Channel
Applications
1 2 5 6
• Power Management in Portable and Battery−Powered Products,
i.e.: Cellular and Cordless Telephones, and PCMCIA Cards
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol
3
Value
Unit
Drain−to−Source Voltage
VDSS
−20
V
Gate−to−Source Voltage − Continuous
VGS
"8.0
V
Thermal Resistance
Junction−to−Ambient (Note 1)
Total Power Dissipation @ TA = 25°C
Drain Current − Continuous @ TA = 25°C
− Pulsed Drain Current (Tp t 10 mS)
RqJA
Pd
ID
IDM
244
0.5
−1.65
−10
°C/W
W
A
A
Thermal Resistance
Junction−to−Ambient (Note 2)
Total Power Dissipation @ TA = 25°C
Drain Current − Continuous @ TA = 25°C
− Pulsed Drain Current (Tp t 10 mS)
RqJA
Pd
ID
IDM
128
1.0
−2.35
−14
°C/W
W
A
A
Thermal Resistance
Junction−to−Ambient (Note 3)
Total Power Dissipation @ TA = 25°C
Drain Current − Continuous @ TA = 25°C
− Pulsed Drain Current (Tp t 10 mS)
RqJA
Pd
ID
IDM
62.5
2.0
−3.3
−20
°C/W
W
A
A
Operating and Storage Temperature Range
TJ, Tstg
−55 to 150
°C
Maximum Lead Temperature for Soldering
Purposes for 10 Seconds
TL
260
°C
4
MARKING DIAGRAM &
PIN ASSIGNMENT
Drain Drain Source
6 5 4
1
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Minimum FR−4 or G−10 PCB, operating to steady state.
2. Mounted onto a 2″ square FR−4 board (1 in sq, 2 oz. Cu. 0.06″ thick single
sided), operating to steady state.
3. Mounted onto a 2″ square FR−4 board (1 in sq, 2 oz. Cu. 0.06″ thick single
sided), t t 5.0 seconds.
TSOP−6
CASE 318G
STYLE 1
PT
M
G
PT MG
G
1 2 3
Drain Drain Gate
= Specific Device Code
= Date Code*
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
ORDERING INFORMATION
Package
Shipping†
NTGS3441T1G
TSOP−6
(Pb−Free)
3000 / Tape & Reel
NVGS3441T1G
TSOP−6
(Pb−Free)
3000 / Tape& Reel
Device
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2012
October, 2012 − Rev. 6
1
Publication Order Number:
NTGS3441T1/D
NTGS3441, NVGS3441
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Notes 4 & 5)
Symbol
Characteristic
Min
Typ
Max
Unit
−20
−
−
−
−
−
−
−1.0
−5.0
−
−
−100
−
−
100
−0.45
−1.05
−1.50
−
−
0.069
0.117
0.090
0.135
−
6.8
−
Ciss
−
480
−
pF
Coss
−
265
−
pF
Crss
−
100
−
pF
td(on)
−
13
25
ns
tr
−
23.5
45
ns
td(off)
−
27
50
ns
tf
−
24
45
ns
Qtot
−
6.2
14
nC
OFF CHARACTERISTICS
Drain−Source Breakdown Voltage
(VGS = 0 Vdc, ID = −10 mA)
V(BR)DSS
Zero Gate Voltage Drain Current
(VGS = 0 Vdc, VDS = −20 Vdc, TJ = 25°C)
(VGS = 0 Vdc, VDS = −20 Vdc, TJ = 70°C)
IDSS
Gate−Body Leakage Current
(VGS = −8.0 Vdc, VDS = 0 Vdc)
IGSS
Gate−Body Leakage Current
(VGS = +8.0 Vdc, VDS = 0 Vdc)
IGSS
Vdc
mAdc
nAdc
nAdc
ON CHARACTERISTICS
Gate Threshold Voltage
(VDS = VGS, ID = −250 mAdc)
VGS(th)
Static Drain−Source On−State Resistance
(VGS = −4.5 Vdc, ID = −3.3 Adc)
(VGS = −2.5 Vdc, ID = −2.9 Adc)
RDS(on)
Forward Transconductance
(VDS = −10 Vdc, ID = −3.3 Adc)
gFS
Vdc
W
Mhos
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
(VDS = −5.0 Vdc, VGS = 0 Vdc,
f = 1.0 MHz)
Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
(VDD = −20 Vdc, ID = −1.6 Adc,
VGS = −4.5 Vdc, Rg = 6.0 W)
Fall Time
Total Gate Charge
Gate−Source Charge
Gate−Drain Charge
(VDS = −10 Vdc, VGS = −4.5 Vdc,
ID = −3.3 Adc)
Qgs
−
1.3
−
nC
Qgd
−
2.5
−
nC
BODY−DRAIN DIODE RATINGS
Diode Forward On−Voltage
(IS = −1.6 Adc, VGS = 0 Vdc)
VSD
−
−0.88
−1.2
Vdc
Diode Forward On−Voltage
(IS = −3.3 Adc, VGS = 0 Vdc)
VSD
−
−0.98
−
Vdc
(IS = −1.6 Adc, dIS/dt = 100 A/ms)
trr
−
30
60
ns
Reverse Recovery Time
4. Indicates Pulse Test: P.W. = 300 msec max, Duty Cycle = 2%.
5. Handling precautions to protect against electrostatic discharge are mandatory.
http://onsemi.com
2
NTGS3441, NVGS3441
TYPICAL ELECTRICAL CHARACTERISTICS
TJ = 25°C
20
VGS = −2.7 V
8
−ID, DRAIN CURRENT (AMPS)
−ID, DRAIN CURRENT (AMPS)
10
VGS = −2.5 V
6
VGS = −3 V
VGS = −3.5 V
VGS = −4 V
VGS = −4.5 V
VGS = −6 V
V
4
GS
= −2 V
2
VGS = −10 V
0
0.4
0
VGS = −1.5 V
0.8
1.2
1.6
TJ = −55°C
12
TJ = 100°C
8
4
1.2
1.6
2
2.4
2.8
3.2
3.6
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
4
0.28
ID = −3.3 A
TJ = 25°C
0.3
0.2
0.1
3
2
4
6
5
7
8
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
TJ = 25°C
0.24
VGS = −2.5 V
0.2
0.16
0.12
VGS = −4.5 V
0.08
0.04
0
0
1
0.8
−25
0
12
16
20
VGS = 0 V
TJ = 125°C
1.2
0.6
−50
8
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
ID = −3.3 A
VGS = −4.5 V
−IDSS, LEAKAGE (nA)
1.4
4
−ID, DRAIN CURRENT (AMPS)
100
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
0.8
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (W)
TJ = 25°C
16
0
0.4
2
0.4
0
VDS> = −10 V
25
50
75
100
125
150
10
TJ = 100°C
1
0.1
TJ = 25°C
0
4
8
12
16
TJ, JUNCTION TEMPERATURE (°C)
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
http://onsemi.com
3
20
NTGS3441, NVGS3441
TYPICAL ELECTRICAL CHARACTERISTICS
VDS = 0 V
VGS = 0 V
8
TJ = 25°C
−VGS, GATE−TO−SOURCE VOLTAGE
(VOLTS)
1200
C, CAPACITANCE (pF)
Ciss
900
Crss
600
Ciss
300
Coss
Crss
0
8
4
−VGS
0
4
8
12
16
20
6
QT
4
Qgs
0
0
−IS, SOURCE CURRENT (AMPS)
VGS(th), GATE THRESHOLD VOLTAGE
(NORMALIZED)
10
ID = −250 mA
1.1
1
0.9
0.8
0.7
25
6
8
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
1.3
0
4
Qg, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
−25
2
−VDS
1.2
VDD = −20 V
ID = −3.3 A
TJ = 25°C
2
GATE−TO−SOURCE OR DRAIN−TO−SOURCE
VOLTAGE (VOLTS)
0.6
−50
Qgd
50
75
100
125
150
VGS = 0 V
TJ = 25°C
8
6
4
2
0
0.5
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3
TJ, JUNCTION TEMPERATURE (°C)
−VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 9. Gate Threshold Voltage Variation
with Temperature
Figure 10. Diode Forward Voltage vs. Current
http://onsemi.com
4
1.4
NTGS3441, NVGS3441
TYPICAL ELECTRICAL CHARACTERISTICS
20
POWER (W)
16
12
8
4
0
0.01
0.10
1.00
10.00
100.00
TIME (sec)
NORMALIZED EFFECTIVE TRANSIENT
THERMAL IMPEDANCE
Figure 11. Single Pulse Power
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
0.01
1E−04
Single Pulse
1E−03
1E−02
1E−01
1E+00
1E+01
1E+02
SQUARE WAVE PULSE DURATION (sec)
Figure 12. Normalized Thermal Transient Impedance, Junction−to−Ambient
http://onsemi.com
5
1E+03
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TSOP−6
CASE 318G−02
ISSUE V
1
SCALE 2:1
D
H
ÉÉ
ÉÉ
6
E1
1
NOTE 5
5
2
L2
4
GAUGE
PLANE
E
3
L
b
SEATING
PLANE
C
DETAIL Z
e
DIM
A
A1
b
c
D
E
E1
e
L
L2
M
c
A
0.05
M
DATE 12 JUN 2012
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM
LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR
GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSIONS D
AND E1 ARE DETERMINED AT DATUM H.
5. PIN ONE INDICATOR MUST BE LOCATED IN THE INDICATED ZONE.
A1
DETAIL Z
MIN
0.90
0.01
0.25
0.10
2.90
2.50
1.30
0.85
0.20
0°
MILLIMETERS
NOM
MAX
1.00
1.10
0.06
0.10
0.38
0.50
0.18
0.26
3.00
3.10
2.75
3.00
1.50
1.70
0.95
1.05
0.40
0.60
0.25 BSC
10°
−
STYLE 1:
PIN 1. DRAIN
2. DRAIN
3. GATE
4. SOURCE
5. DRAIN
6. DRAIN
STYLE 2:
PIN 1. EMITTER 2
2. BASE 1
3. COLLECTOR 1
4. EMITTER 1
5. BASE 2
6. COLLECTOR 2
STYLE 3:
PIN 1. ENABLE
2. N/C
3. R BOOST
4. Vz
5. V in
6. V out
STYLE 4:
PIN 1. N/C
2. V in
3. NOT USED
4. GROUND
5. ENABLE
6. LOAD
STYLE 5:
PIN 1. EMITTER 2
2. BASE 2
3. COLLECTOR 1
4. EMITTER 1
5. BASE 1
6. COLLECTOR 2
STYLE 6:
PIN 1. COLLECTOR
2. COLLECTOR
3. BASE
4. EMITTER
5. COLLECTOR
6. COLLECTOR
STYLE 7:
PIN 1. COLLECTOR
2. COLLECTOR
3. BASE
4. N/C
5. COLLECTOR
6. EMITTER
STYLE 8:
PIN 1. Vbus
2. D(in)
3. D(in)+
4. D(out)+
5. D(out)
6. GND
STYLE 9:
PIN 1. LOW VOLTAGE GATE
2. DRAIN
3. SOURCE
4. DRAIN
5. DRAIN
6. HIGH VOLTAGE GATE
STYLE 10:
PIN 1. D(OUT)+
2. GND
3. D(OUT)−
4. D(IN)−
5. VBUS
6. D(IN)+
STYLE 11:
PIN 1. SOURCE 1
2. DRAIN 2
3. DRAIN 2
4. SOURCE 2
5. GATE 1
6. DRAIN 1/GATE 2
STYLE 12:
PIN 1. I/O
2. GROUND
3. I/O
4. I/O
5. VCC
6. I/O
STYLE 13:
PIN 1. GATE 1
2. SOURCE 2
3. GATE 2
4. DRAIN 2
5. SOURCE 1
6. DRAIN 1
STYLE 14:
PIN 1. ANODE
2. SOURCE
3. GATE
4. CATHODE/DRAIN
5. CATHODE/DRAIN
6. CATHODE/DRAIN
STYLE 15:
PIN 1. ANODE
2. SOURCE
3. GATE
4. DRAIN
5. N/C
6. CATHODE
STYLE 16:
PIN 1. ANODE/CATHODE
2. BASE
3. EMITTER
4. COLLECTOR
5. ANODE
6. CATHODE
STYLE 17:
PIN 1. EMITTER
2. BASE
3. ANODE/CATHODE
4. ANODE
5. CATHODE
6. COLLECTOR
GENERIC
MARKING DIAGRAM*
RECOMMENDED
SOLDERING FOOTPRINT*
6X
0.60
XXXAYWG
G
1
6X
3.20
XXX
A
Y
W
G
0.95
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB14888C
TSOP−6
1
IC
0.95
XXX MG
G
= Specific Device Code
=Assembly Location
= Year
= Work Week
= Pb−Free Package
STANDARD
XXX = Specific Device Code
M
= Date Code
G
= Pb−Free Package
*This information is generic. Please refer to device data sheet
for actual part marking. Pb−Free indicator, “G” or microdot “
G”, may or may not be present.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems
or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should
Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Email Requests to: orderlit@onsemi.com
onsemi Website: www.onsemi.com
◊
TECHNICAL SUPPORT
North American Technical Support:
Voice Mail: 1 800−282−9855 Toll Free USA/Canada
Phone: 011 421 33 790 2910
Europe, Middle East and Africa Technical Support:
Phone: 00421 33 790 2910
For additional information, please contact your local Sales Representative