MPC9447FA

MOTOROLA Freescale SEMICONDUCTOR TECHNICAL DATA Semiconductor, Inc. 3.3V/2.5V 1:9 LVCMOS Clock Fanout Buffer The MPC9447 is a 3.3V or 2.5V compatible, 1:9 clock fanout buffer targeted for high performance clock tree applications. With output frequencies up to 350 MHz and output skews less than 150 ps, the device meets the needs of most demanding clock applications. Freescale Semiconductor, Inc... Features 9 LVCMOS Compatible Clock Outputs • • • • • 2 Selectable, LVCMOS Compatible Inputs Maximum Clock Frequency of 350 MHz Maximum Clock Skew of 150 ps Order Number: MPC9447/D Rev 2, 04/2003 MPC9447 LOW VOLTAGE 3.3 V/2.5 V LVCMOS 1:9 CLOCK FANOUT BUFFER Synchronous Output Stop in Logic Low State Eliminates Output Runt Pulses • High--Impedance Output Control • • • • • 3.3V or 2.5V Power Supply Drives up to 18 Series Terminated Clock Lines Ambient Temperature Range --40_C to +85_C 32 Lead LQFP Packaging Supports Clock Distribution in Networking, Telecommunications, and Computer Applications • Pin and Function Compatible to MPC947 FA SUFFIX 32--LEAD LQFP PACKAGE CASE 873A Functional Description MPC9447 is specifically designed to distribute LVCMOS compatible clock signals up to a frequency of 350 MHz. Each output provides a precise copy of the input signal with a near zero skew. The outputs buffers support driving of 50Ω terminated transmission lines on the incident edge: each is capable of driving either one parallel terminated or two series terminated transmission lines. Two selectable independent LVCMOS compatible clock inputs are available, providing support of redundant clock source systems. The MPC9447 CLK_STOP control is synchronous to the falling edge of the input clock. It allows the start and stop of the output clock signal only in a logic low state, thus eliminating potential output runt pulses. Applying the OE control will force the outputs into high--impedance mode. All inputs have an internal pull--up or pull--down resistor preventing unused and open inputs from floating. The device supports a 2.5V or 3.3V power supply and an ambient temperature range of --40_C to +85_C. The MPC9447 is pin and function compatible but performance--enhanced to the MPC947. © Motorola, Inc. 2003 For More Information On This Product, Go to: www.freescale.com GND Q3 VCC Q4 GND Q5 VCC GND Freescale Semiconductor, Inc. MPC9447 24 23 22 21 20 19 18 17 Q0 25 16 GND Q2 26 15 Q6 VCC 27 14 VCC Q1 28 13 Q7 GND 29 12 GND Q0 30 11 Q8 Q6 VCC 31 10 VCC GND 32 9 GND VCC Q5 SYNC Freescale Semiconductor, Inc... CLK_STOP Q7 VCC MPC9447 1 2 3 4 5 6 7 8 GND Q4 VCC CLK_SEL OE Q3 CLK_STOP Q2 VCC CCLK1 1 Q1 GND CCLK0 CCLK1 CLK STOP CLK_SEL 0 GND CCLK0 Q8 (all input resistors have a value of 25kΩ) OE Figure 1. Logic Diagram Figure 2. 32--Lead Pinout (Top View) Table 1. Function Table Control Default 0 1 CLK_SEL 1 CLK0 input selected CLK1 input selected OE 1 Outputs disabled (high--impedance state)a Outputs enabled CLK_STOP 1 Outputs synchronously stopped in logic low state Outputs active a. OE = 0 will high--impedance tristate all outputs independent on CLK_STOP Table 2. Pin Configuration Pin I/O Type CCLK0 Input LVCMOS Clock signal input Function CCLK1 Input LVCMOS Alternative clock signal input CLK_SEL Input LVCMOS Clock input select CLK_STOP Input LVCMOS Clock output enable/disable OE Input LVCMOS Output enable/disable (high--impedance tristate) Q0--8 Output LVCMOS Clock outputs GND Supply Ground VCC Supply VCC Negative power supply (GND) Positive power supply for I/O and core. All VCC pins must be connected to the positive power supply for correct operation Table 3. General Specifications Symbol Characteristics Min VTT Output termination voltage MM ESD protection (Machine model) 200 HBM Typ Max VCC ÷ 2 Unit Condition V V ESD protection (Human body model) 2000 V LU Latch-up immunity 200 mA CPD Power dissipation capacitance 10 pF Per output CIN Input capacitance 4.0 pF Inputs MOTOROLA 2 For More Information On This Product, Go to: www.freescale.com TIMING SOLUTIONS Freescale Semiconductor, Inc. MPC9447 Table 4. Absolute Maximum Ratingsa Symbol Min Max Unit VCC Supply Voltage -0.3 3.9 V VIN DC Input Voltage -0.3 VCC + 0.3 V DC Output Voltage -0.3 VCC + 0.3 V ±20 mA ±50 mA 125 °C VOUT IIN IOUT TS Characteristics DC Input Current DC Output Current Storage temperature -65 Condition a. Absolute maximum continuous ratings are those maximum values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation at absolute-maximum-rated conditions is not implied. Table 5. DC Characteristics (VCC = 3.3V ± 5%, TA = 40°C to +85°C) Freescale Semiconductor, Inc... Symbol Characteristics Min Typ Max Unit Condition VIH Input High Voltage 2.0 VCC + 0.3 V LVCMOS VIL Input Low Voltage --0.3 0.8 V LVCMOS VOH Output High Voltage 2.4 V IOH = -24 mAa VOL Output Low Voltage 0.55 0.30 V V IOL = 24 mA IOL = 12 mA ZOUT Output Impedance ±300 µA VIN = VCC or GND 2.0 mA All VCC Pins IIN ICCQ 17 Ω Input Currentb Maximum Quiescent Supply Currentc a. The MPC9447 is capable of driving 50Ω transmission lines on the incident edge. Each output drives one 50Ω parallel terminated transmission line to a termination voltage of VTT. Alternatively, the device drives up to two 50Ω series terminated transmission lines (for VCC=3.3V). b. Inputs have pull-down or pull-up resistors affecting the input current. c. ICCQ is the DC current consumption of the device with all outputs open and the input in its default state or open. Table 6. AC Characteristics (VCC = 3.3V ± 5%, TA = --40°C to +85°C)a Symbol Max Unit fref Input Frequency 0 350 MHz fmax Output Frequency 0 350 MHz fP,REF tr, tf 5Characteristics Min Reference Input Pulse Width 1.4 Propagation Delay tPLZ, HZ Output Disable Time tPZL, ZH Output Enable Time CCLK0 or CCLK1 to any Q 1.3 tS Setup Time CCLK0 or CCLK1 to CLK_STOPc 0.0 tH Hold Time CCLK0 or CCLK1 to CLK_STOPc 1.0 tsk(O) Output-to-Output Skew tsk(PP) tSK(P) DCQ tr, tf Condition ns CCLK0, CCLK1 Input Rise/Fall Time tPLH/HL tJIT(CC) Typ 1.0b ns 3.3 ns 11 ns 11 ns 0.8 to 2.0V ns ns 150 ps Device-to-Device Skew 2.0 ns Output Pulse Skewd Output Duty Cycle 300 55 ps % DCREF = 50% 1.0 ns 0.55 to 2.4V fQ