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TJA1102HN/0Z

TJA1102HN/0Z

  • 厂商:

    NXP(恩智浦)

  • 封装:

    VQFN56

  • 描述:

    IC TRANSCEIVER 2/2 56HVQFN

  • 数据手册
  • 价格&库存
TJA1102HN/0Z 数据手册
TJA1102 100BASE-T1 dual/single PHY for automotive Ethernet Rev. 1 — 1 November 2017 Product short data sheet 1. General description The TJA1102 is a 100BASE-T1 compliant dual-port Ethernet PHY optimized for automotive use cases such as gateways, IP camera links, driver assistance systems and back-bone networks. The device provides 100 Mbit/s transmit and receive capability over two unshielded twisted-pair cables, supporting a cable length of up to at least 15 m. The TJA1102 has been designed for automotive robustness, while minimizing power consumption and system costs. For added flexibility, a single PHY version is available (TJA1102S) in which one of the PHYs is disabled. For the full data sheet and application hints, please register with DocStore at https://www.docstore.nxp.com. 2. Features and benefits 2.1 General     Dual-port 100BASE-T1 PHY Single-port operation possible MII- and RMII-compliant interfaces to the bus HVQFN 56-pin package (8  8 mm) 2.2 Optimized for automotive use cases         Transmitter optimized for capacitive coupling to unshielded twisted-pair cable Adaptive receive equalizer optimized for automotive cable length of up to at least 15 m Enhanced integrated PAM-3 pulse shaping for low RF emissions EMC-optimized output driver strength for MII and RMII MDI pins protected against transients in automotive environment MDI pins do not need external filtering or ESD protection Automotive-grade temperature range from 40 C to +125 C Automotive product qualification in accordance with AEC-Q100 2.3 Low-power mode  Dedicated PHY enable/disable input pin to minimize power consumption  Inhibit output for voltage regulator control  OPEN Alliance-compliant wake-up concept (global wake-up support)  Robust remote wake-up detection via bus lines  Wake-up forwarding on PHY level  OPEN Alliance-compliant sleep concept TJA1102 NXP Semiconductors 100BASE-T1 Dual PHY for Automotive Ethernet  Local wake-up pin  Wake-up via SMI-access 2.4 Diagnosis     Real-time monitoring of link stability and transmitted data quality Diagnosis of cable errors (shorts and opens) Gap-free supply undervoltage detection with fail-silent behavior Internal, external and remote loopback modes for diagnosis 2.5 Miscellaneous      Internal reverse MII mode for repeater operation On-chip regulators to provide 3.3 V single-supply operation Supports optional 1.8 V external supply for digital core On-chip termination resistors for the differential cable pair Jumbo frame support up to 16 kB 3. Ordering information Table 1. Ordering information Type number TJA1102HN[1] Package Name Description Version HVQFN56 plastic thermal enhanced very thin quad flat package; no leads; 56 terminals; body 8  8  0.85 mm SOT684-13 TJA1102SHN[2] [1] Dual PHY. [2] Single PHY. TJA1102_SDS Product short data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 November 2017 © NXP Semiconductors N.V. 2017. All rights reserved. 2 of 19 TJA1102 NXP Semiconductors 100BASE-T1 Dual PHY for Automotive Ethernet 4. Block diagram A block diagram of the TJA1102 is shown in Figure 1. The 100BASE-T1 sections contain the functional blocks specified in the 100BASE-T1 standard that make up the Physical Coding Sublayer (PCS) and the Physical Medium Attachment (PMA) layer for both the transmit and receive signal paths. The MII/RMII interface (including the Serial Management Interface (SMI)) conforms to IEEE802.3 clause 22. Additional blocks are defined for mode control, register configuration, interrupt control, system configuration, reset control, local wake-up, remote wake-up, undervoltage detection and configuration control. A number of power-supply-related functional blocks are defined: an internal 1.8 V regulator for the digital core, a Very Low Power (VLP) supply for Sleep mode, the reset circuit, supply monitoring and inhibit control. The clock signals needed for the operation of the PHY are generated in the PLL block, derived from an external crystal or an oscillator input signal. Pin strapping allows a number of default PHY settings (e.g. Master or Slave configuration) to be hardware-configured at power-up. TJA1102_SDS Product short data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 November 2017 © NXP Semiconductors N.V. 2017. All rights reserved. 3 of 19 TJA1102 NXP Semiconductors 100BASE-T1 Dual PHY for Automotive Ethernet 3B7;(5 30$ 75$160,77(5 3&67; 3B7;(1 %$6(7 3B9''$ 7; 3B9''$ 7; 3B7;'>@ 3B7;& 3B5;'>@ 50,,0,, /2*,& 3+@ 50,,0,, /2*,& 3+@ 7;(5 7;& 7;(1 7;'>@ 7;(5 7;& 5;& 5;(5 5;'9 0$& 6:,7&+ 3+< &/.B,1B287 ;2 5;& 5;(5 5;'9 5;'>@ 5;'>@ 7;(1 7;'>@ 7;(5 7;& 7;(1 7;'>@ 7;(5 7;& 0$& 6:,7&+ ;, &/.B,1B287 0+] 0+]FORFNWR RWKHU3+@ 5;(5 7;(1 7;'>@ 7;(1 7;'>@ 0$& 6:,7&+ 3+< 5()B&/. &56'9 5;'>@ 5;(5 7;(1 7;'>@ 7;(1 7;'>@ 0$& 6:,7&+ 5()B&/. &/.B,1B287 ;2 &56'9 5;'>@ 5;(5 5()B&/. 5()B&/. ;, 0+] ;2 0+]FORFNWR RWKHU3+@ 5;(5 5;(5 7;(1 7;(1 7;'>@ 5()B&/. DDD 7;'>@ 0$& 6:,7&+ 5()B&/. &/.B,1B287 ;2 ;, 0+]FORFNIURP RWKHU3+@ 3B5;(5 3B7;(5 3B5;& 3B7;& DDD Fig 6. 100BASE-T1 repeater with TJA1102 Reverse MII The TJA1102S can be configured in reverse MII mode by connecting the MII pins externally to a fast Ethernet product, is illustrated in Figure 7. 7;& 7;(5 7;(1 7;'>@ 0', )DVW(WKHUQHW 3+@ 5;(5 5;& ;2 ;, 0+] ;7$/ 3B5;& 3B5;(5 3B5;'9 3B5;'>@ 7-$6 5HYHUVH0,, 3B7;(1 3B7;'>@ 3B7;(5 3B7;& ;, 0', %DVH7 ;2 0+] ;7$/ DDD Fig 7. Fast Ethernet to 100BASE-T1 media converter with TJA1102S in Reverse MII 5.3 Sleep and wake-up forwarding concept The sleep and wake-up forwarding concept of the TJA1102 is compliant with the OPEN Alliance Sleep wake-up specification. The TJA1102 features a wake-up request forwarding function that enables fast wake-up forwarding without the need for a switch, MAC or C action. The wake-forwarding principle is illustrated in Figure 8. The wake-up can be forwarded via non-active (gray PHYs in the figure) or active links (white PHY). In the case of a non-active link, a wake-up pulse (WUP; duration tw(wake)) is transmitted to be detected as activity at the link partner. For an active link, wake up request (WUR) scrambler code groups are sent. TJA1102_SDS Product short data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 November 2017 © NXP Semiconductors N.V. 2017. All rights reserved. 10 of 19 TJA1102 NXP Semiconductors 100BASE-T1 Dual PHY for Automotive Ethernet The wake-up behavior of the PHYs can be configured individually. This arrangement allows WAKE_IN_OUT to be used as a local wake-up or to have a mixed system with only some ports forwarding a wake-up request. The following configuration options are available and are selected via the SMI Configuration register 1: REMWUPHY determines whether a PHY reacts to a remote wake-up request. FWDPHYREM determines whether a PHY forwards a wake-up request (from another port or via WAKE_IN_OUT) to its MDI. A WUP or WUR is sent, depending on the link status. LOCWUPHY determines whether a PHY should be woken up in response to a local wake-up event (forwarded from another port or via WAKE_IN_OUT) FWDPHYLOC determines whether wake-up event should be forwarded to other ports (i.e. should the second PHY be informed and/or the WAKE_IN_OUT signal activated). The WAKE_IN_OUT signal features a programmable timeout to enable it to support a number of wake-up concepts (e.g. wake-up line). It reacts on a rising edge. 9 9%$7 ,1+ :83SXOVHV 3+< —&21752//(5 :85FRGHV 3+< 0$&V 6:,7&+ :83SXOVHV :$.(B,1B287 9 3+<  Fig 8. DDD Wake request forwarding 6. Application information The MDI circuit used for each PHY port is shown in Figure 9. The common mode termination depends on OEM requirements and might vary, depending on the application. The common mode choke is expected to be compliant with the OPEN Alliance CMC specification. The 100 nF coupling capacitors should have a voltage range  50 V with 10 % (max) tolerance. TJA1102_SDS Product short data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 November 2017 © NXP Semiconductors N.V. 2017. All rights reserved. 11 of 19 TJA1102 NXP Semiconductors 100BASE-T1 Dual PHY for Automotive Ethernet FRPPRQ PRGHFKRNH 75;B3 3+< Q) %,B'$ 75;B0 %,B'$ —+ Q) DFFRUGLQJWR 23(1$OOLDQFH&0&6SHF Nȍ Nȍ Nȍ Q) RSWLRQDO DDD Fig 9. MDI circuit diagram Further information can be found in the TJA1102 application hints [Ref. 2]. 7. Package information The TJA1102 comes in the HVQFN-56 package as shown in Figure 10. Measuring just 64 mm2 with a pitch of 0.5 mm, it is particularly suited to PCB space-constrained applications, such as an integrated IP camera module. The package features wettable sides/flanks to allow for optical inspection of the soldering process. The exposed die pad shown in the package diagram should be connected to ground. TJA1102_SDS Product short data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 November 2017 © NXP Semiconductors N.V. 2017. All rights reserved. 12 of 19 TJA1102 NXP Semiconductors 100BASE-T1 Dual PHY for Automotive Ethernet 8. Package outline +94)1SODVWLFWKHUPDOHQKDQFHGYHU\WKLQTXDGIODWSDFNDJHQROHDGV WHUPLQDOVERG\[[PP ' % 627 $ WHUPLQDO LQGH[DUHD ( $ $ F GHWDLO; H Y Z E H H & \ & E /  \    . & $ % & H (K H H  WHUPLQDO LQGH[DUHD    . ; 'K   'LPHQVLRQV PPDUHWKHRULJLQDOGLPHQVLRQV 8QLW $  $ E E PD[     QRP     PLQ     PP PP VFDOH F '  'K (  (K H H H / .                     Y  Z \   1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 2XWOLQH YHUVLRQ 627 5HIHUHQFHV ,(& -('(& -(,7$ \  VRWBSR (XURSHDQ SURMHFWLRQ ,VVXHGDWH    Fig 10. Package outline SOT684-13 (HVQFN56) TJA1102_SDS Product short data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 November 2017 © NXP Semiconductors N.V. 2017. All rights reserved. 13 of 19 TJA1102 NXP Semiconductors 100BASE-T1 Dual PHY for Automotive Ethernet 9. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description”. 9.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both the mechanical and the electrical connection. There is no single soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high densities that come with increased miniaturization. 9.2 Wave and reflow soldering Wave soldering is a joining technology in which the joints are made by solder coming from a standing wave of liquid solder. The wave soldering process is suitable for the following: • Through-hole components • Leaded or leadless SMDs, which are glued to the surface of the printed circuit board Not all SMDs can be wave soldered. Packages with solder balls, and some leadless packages which have solder lands underneath the body, cannot be wave soldered. Also, leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered, due to an increased probability of bridging. The reflow soldering process involves applying solder paste to a board, followed by component placement and exposure to a temperature profile. Leaded packages, packages with solder balls, and leadless packages are all reflow solderable. Key characteristics in both wave and reflow soldering are: • • • • • • Board specifications, including the board finish, solder masks and vias Package footprints, including solder thieves and orientation The moisture sensitivity level of the packages Package placement Inspection and repair Lead-free soldering versus SnPb soldering 9.3 Wave soldering Key characteristics in wave soldering are: • Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave • Solder bath specifications, including temperature and impurities TJA1102_SDS Product short data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 November 2017 © NXP Semiconductors N.V. 2017. All rights reserved. 14 of 19 TJA1102 NXP Semiconductors 100BASE-T1 Dual PHY for Automotive Ethernet 9.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see Figure 11) than a SnPb process, thus reducing the process window • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board • Reflow temperature profile; this profile includes preheat, reflow (in which the board is heated to the peak temperature) and cooling down. It is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic). In addition, the peak temperature must be low enough that the packages and/or boards are not damaged. The peak temperature of the package depends on package thickness and volume and is classified in accordance with Table 2 and 3 Table 2. SnPb eutectic process (from J-STD-020D) Package thickness (mm) Package reflow temperature (C) Volume (mm3) < 350  350 < 2.5 235 220  2.5 220 220 Table 3. Lead-free process (from J-STD-020D) Package thickness (mm) Package reflow temperature (C) Volume (mm3) < 350 350 to 2000 > 2000 < 1.6 260 260 260 1.6 to 2.5 260 250 245 > 2.5 250 245 245 Moisture sensitivity precautions, as indicated on the packing, must be respected at all times. Studies have shown that small packages reach higher temperatures during reflow soldering, see Figure 11. TJA1102_SDS Product short data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 November 2017 © NXP Semiconductors N.V. 2017. All rights reserved. 15 of 19 TJA1102 NXP Semiconductors 100BASE-T1 Dual PHY for Automotive Ethernet temperature maximum peak temperature = MSL limit, damage level minimum peak temperature = minimum soldering temperature peak temperature time 001aac844 MSL: Moisture Sensitivity Level Fig 11. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. 10. References [1] IEEE Std 802.3bw-2015, 26 October 2015 [2] AH1508_TJA1102 Application Hints 11. Revision history Table 4. Revision history Document ID Release date Data sheet status Change notice Supersedes TJA1102_SDS v.1 20171101 Product short data sheet - - TJA1102_SDS Product short data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 November 2017 © NXP Semiconductors N.V. 2017. All rights reserved. 16 of 19 TJA1102 NXP Semiconductors 100BASE-T1 Dual PHY for Automotive Ethernet 12. Legal information 12.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 12.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 12.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. TJA1102_SDS Product short data sheet Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 November 2017 © NXP Semiconductors N.V. 2017. All rights reserved. 17 of 19 TJA1102 NXP Semiconductors 100BASE-T1 Dual PHY for Automotive Ethernet No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. 12.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 13. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com TJA1102_SDS Product short data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 November 2017 © NXP Semiconductors N.V. 2017. All rights reserved. 18 of 19 TJA1102 NXP Semiconductors 100BASE-T1 Dual PHY for Automotive Ethernet 14. Contents 1 2 2.1 2.2 2.3 2.4 2.5 3 4 5 5.1 5.1.1 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Optimized for automotive use cases. . . . . . . . . 1 Low-power mode . . . . . . . . . . . . . . . . . . . . . . . 1 Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Miscellaneous . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 5 System configuration . . . . . . . . . . . . . . . . . . . . 5 Clocking scheme with MII and clock provided by the switch and one of the TJA1102 devices . . . 6 5.1.2 Clocking scheme with RMII and clock provided by the switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5.2 MII and RMII . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5.2.1 MII. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5.2.2 RMII . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5.2.2.1 Signaling and encoding . . . . . . . . . . . . . . . . . . 8 5.2.3 Reverse MII . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5.3 Sleep and wake-up forwarding concept . . . . . 10 6 Application information. . . . . . . . . . . . . . . . . . 11 7 Package information . . . . . . . . . . . . . . . . . . . . 12 8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13 9 Soldering of SMD packages . . . . . . . . . . . . . . 14 9.1 Introduction to soldering . . . . . . . . . . . . . . . . . 14 9.2 Wave and reflow soldering . . . . . . . . . . . . . . . 14 9.3 Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 14 9.4 Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 15 10 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 16 12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 17 12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17 12.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 12.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 12.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 18 13 Contact information. . . . . . . . . . . . . . . . . . . . . 18 14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP Semiconductors N.V. 2017. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 1 November 2017 Document identifier: TJA1102_SDS
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