CM1223-02SO

CM1223 Industry First Low Capacitance ESD Protection Arrays with Backdrive Protection Product Description The CM1223 family of diode arrays has been designed to provide ESD protection for electronic components or subsystems requiring minimal capacitive loading. These devices are ideal for protecting systems with high data and clock rates or for circuits requiring low capacitive loading. Each ESD channel consists of a pair of diodes in series, which steer the positive or negative ESD current pulse to either the positive (VP) or negative (VN) supply rail. A Zener diode is embedded between VP and VN, to absorb positive ESD strikes and provide ESD protection for the VP rail. An additional diode is integrated to serve as backdrive current protection. The CM1223 protects against ESD pulses up to ±8 kV per the IEC 61000−4−2 standard. In addition, all pins are protected from contact discharges of greater than ±15 kV as outlined by the MIL−STD−883D (Method 3015) specification for Human Body Model (HBM) ESD. These devices are particularly well−suited for protecting systems using high−speed ports such as USB2.0, IEEE1394 (Firewire®, iLink™), serial ATA, DVI, HDMI and corresponding ports in removable storage, digital camcorders, DVD−RW drives, as well as other applications where extremely low loading capacitance with ESD protection are required in a small package footprint. http://onsemi.com SOT23−5 SO SUFFIX CASE 527AH SOT−143 SR SUFFIX CASE 318A (see page 2) MARKING DIAGRAM XXX MG G Backdrive Protection on all Lines • Provides ESD Protection to IEC61000−4−2 Level 4: • • • • • ±8 kV Contact Discharge & ±15 kV Air Discharge Low Channel Input Capacitance of 1.0 pF (typical) Minimal Capacitance Change with Temperature and Voltage Channel I/O to GND Capacitance Difference of 0.02 pF Typical is Ideal for Differential Signals Mutual Capacitance between Signal Pin and Adjacent Signal Pin at 0.11 pF (typical) Zener Diode Protects Supply Rail and Eliminates the Need for External Bypass Capacitors Pin Compatible with CM1213−02, −04, and −08 Each I/O Pin Can Withstand over 1000 ESD Strikes Available in SOT, and MSOP Packages These Devices are Pb−Free and are RoHS Compliant Applications • USB 2.0 Ports at 480 Mbps in Desktop PCs, Notebooks • • • • and Peripherals • IEEE1394 Firewire® Ports at 400 Mbps / 800 Mbps • DVI Ports, HDMI Ports in Notebooks, Set Top Boxes, Digital TVs, LCD Displays © Semiconductor Components Industries, LLC, 2012 July, 2012 − Rev. 6 XXX MG G XXX MG G 1 • Two, Four, and Eight Channels of ESD Protection with Integrated • MSOP 10 MR SUFFIX CASE 846AE BLOCK DIAGRAM Features • • • SOT23−6 SO SUFFIX CASE 527AJ 1 SOT143−4 SOT23−6 MSOP−10 XXX = Specific Device Code M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION Device Package CM1223−02SO SOT23−5 (Pb−Free) 3000/Tape & Reel CM1223−02SR SOT143−4 (Pb−Free) 3000/Tape & Reel CM1223−04SO SOT23−6 (Pb−Free) MSOP−10 (Pb−Free) MSOP−10 (Pb−Free) 3000/Tape & Reel CM1223−04MR CM1223−08MR Shipping 4000/Tape & Reel 4000/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. UDI and Display Ports Serial ATA Ports in Desktop PCs and Hard Disk Drives PCI Express Ports General Purpose High−speed Data Line ESD Protection Publication Order Number: CM1223/D CM1223 BLOCK DIAGRAM VP CH1 CH4 VP CH3 CH1 VN CH2 CH8 CH7 CH6 CH5 VP CH2 VN CM1223−02SO CM1223−02SR CH1 CH2 CM1223−04SO CM1223−04MR VN CH3 CM1223−08MR http://onsemi.com 2 CH4 CM1223 Table 1. PIN DESCRIPTIONS 2−Channel, 4−Lead SOT143−4 Package 2−Channel, 5−Lead SOT23−5 Package Pin Name Type No Connect 1 VN GND Negative voltage supply rail 2 CH1 I/O ESD Channel I/O ESD Channel 3 CH2 I/O ESD Channel CH2 I/O ESD Channel 4 VP PWR VP PWR Pin Name Type 1 NC 2 VN GND 3 CH1 4 5 Description Name Type 1 CH1 I/O Negative voltage supply rail Positive voltage supply rail Positive voltage supply rail PACKAGE / PINOUT DIAGRAMS 4−Channel, 6−Lead SOT23−6 Package Pin Description Description Top View ESD Channel VN GND CH2 I/O ESD Channel 4 CH3 I/O ESD Channel 5 VP PWR 6 CH4 I/O 1 CH1 2 Negative voltage supply rail 4 VP 3 CH2 D337 2 3 VN 4−Lead SOT143−4 Positive voltage supply rail ESD Channel Top View Pin Name Type 1 CH1 I/O 2 NC Description ESD Channel NC 1 VN 2 CH1 3 No Connect VP PWR 4 CH2 I/O 5 NC 6 CH3 7 NC 8 VN GND 9 CH4 I/O 10 NC 4 CH2 Positive voltage supply rail ESD Channel Top View No Connect I/O VP 5−Lead SOT23−5 ESD Channel No Connect Negative voltage supply rail CH1 1 VN 2 CH2 3 D335 3 5 D334 4−Channel, 10−Lead MSOP−10 Package 6 CH4 5 VP 4 CH3 6−Lead SOT23−6 ESD Channel No Connect Top View 8−Channel, 10−Lead MSOP−10 Package Type 1 CH1 I/O 2 CH2 I/O ESD Channel 3 CH3 I/O ESD Channel 4 CH4 I/O ESD Channel 5 VN GND 6 CH5 I/O ESD Channel 7 CH6 I/O ESD Channel 8 VP PWR 9 CH7 I/O ESD Channel 10 CH8 I/O ESD Channel CH1 NC VP CH2 NC Description ESD Channel 1 2 3 4 5 10 9 8 7 6 NC CH4 VN NC CH3 10−Lead MSOP−10 Negative voltage supply rail Top View CH1 CH2 CH3 CH4 VN Positive voltage supply rail 1 2 3 4 5 D336 Name D338 Pin 10 9 8 7 6 CH8 CH7 VP CH6 CH5 10−Lead MSOP−10 http://onsemi.com 3 CM1223 SPECIFICATIONS Table 2. ABSOLUTE MAXIMUM RATINGS Parameter Rating Units 6.0 V Operating Temperature Range –40 to +85 °C Storage Temperature Range –65 to +150 °C (VN − 0.5) to (VP + 0.5) V Operating Supply Voltage (VP − VN) DC Voltage at any channel input Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Table 3. STANDARD OPERATING CONDITIONS Parameter Operating Temperature Range Package Power Rating SOT143−4 Package (CM1223−02SR) SOT23−5 Package (CM1223−02SO) SOT23−6 Package (CM1223−04SO) MSOP−10 Package (CM1223−04MR) MSOP−10 Package (CM1223−08MR) Rating Units –40 to +85 °C mW 225 225 225 400 400 Table 4. ELECTRICAL OPERATING CHARACTERISTICS (Note1) Symbol Parameter Conditions Min Typ Max Units 3.3 5.5 V 8.0 mA VP Operating Supply Voltage (VP−VN) IP Operating Supply Current (VP−VN) = 3.3 V VSCL Signal Clamp Voltage Positive Transients Negative Transients IF = 8 mA; TA = 25°C ILEAK Channel Leakage Current TA = 25°C; VP = 5 V, VN = 0 V ±0.1 ±1.0 mA Channel Input Capacitance At 1 MHz, VP = 3.3 V, VN = 0 V, VIN = 1.65 V 1.0 1.5 pF Channel Input Capacitance Matching At 1 MHz, VP = 3.3 V, VN = 0 V, VIN = 1.65 V 0.02 pF CMUTUAL Mutual Capacitance between signal pin and adjacent signal pin At 1 MHz, VP = 3.3 V, VN = 0 V, VIN = 1.65 V 0.11 pF VESD ESD Protection − Peak Discharge Voltage at any channel input, in system a) Contact discharge per IEC 61000−4−2 standard b) Human Body Model, MIL−STD−883, Method 3015 CIN DCIN 1. 2. 3. 4. 6.7 0.60 V 8.2 0.80 kV TA = 25°C; (Notes 3 and 4) ±8 TA = 25°C; (Notes 2 and 4) ±15 VCL Channel Clamp Voltage Positive Transients Negative Transients TA = 25°C, IPP = 1A, tP = 8/20 mS (Note 4) RDYN Dynamic Resistance Positive Transients Negative Transients TA = 25°C, IPP = 1A, tP = 8/20 mS Any I/O pin to Ground (Note 4) +8.8 –1.4 0.7 0.4 All parameters specified at TA = –40°C to +85°C unless otherwise noted. Human Body Model per MIL−STD−883, Method 3015, CDischarge = 100 pF, RDischarge = 1.5 kW, VP = 3.3 V, VN grounded. Standard IEC 61000−4−2 with CDischarge = 150 pF, RDischarge = 330 W, VP = 3.3 V, VN grounded. These measurements performed with no external capacitor on VP (VP floating). http://onsemi.com 4 V W CM1223 PERFORMANCE INFORMATION Input Channel Capacitance Performance Curves http://onsemi.com 5 CM1223 PERFORMANCE INFORMATION (Cont’d) Typical Filter Performance (nominal conditions unless specified otherwise, 50 Ohm Environment) Figure 1. Insertion Loss (S21) vs. Frequency (0 V DC Bias, VP=3.3 V, MSOP−10 Package) Figure 2. Insertion Loss (S21) vs. Frequency (2.5 V DC Bias, VP=3.3 V, MSOP−10 Package) http://onsemi.com 6 CM1223 BACKDRIVE PROTECTION Backdrive protection is needed to block against backdrive current flowing from a high potential voltage node toward a lower potential voltage node through the interface cable. For example, consider a DVD player connected to a TV via an HDMI interface. If the DVD player is switched off and the TV is left on, there is a possibility of reverse current flow back into the main power supply rail of the DVD player. Typically, the DVD’s power supply has some form of associated bulk supply capacitance, and it is possible over time to charge that bulk supply capacitance to some intermediate level. If that level rises above the power−on−reset (POR) voltage level of some of the integrated circuits, the DVD player may not reset properly when the DVD player is turned back on. This is largely because all CMOS logic exhibits a very high impedance on the power rail node even when ”off”. To avoid this situation, the CM1223 with integrated backdrive protection diode was designed to block backdrive current, guaranteeing no more than 5 mA on any I/O pin when the I/O pin voltage is greater than the CM1223 supply voltage. APPLICATION INFORMATION Design Considerations To realize the maximum protection against ESD pulses, care must be taken in the PCB layout to minimize parasitic series inductances on the Supply/Ground rails as well as the signal trace segments between the signal input (typically a connector) and the ESD protection device. Application of Positive ESD Pulse between Input Channel and Ground illustrates an example of a positive 8 kV ESD pulse striking an input channel. The 8 kV ESD current pulse will divert along the path as indicated in Application of Positive ESD Pulse between Input Channel and Ground, through the D1 diode and the Zener diode back to the ground rail. An ESD current pulse can rise from zero to its peak value in a very short time. For example, a level 4 contact discharge per the IEC61000−4−2 standard results in a current pulse that rises from zero to 30 Amps in 1ns. The CM1223 has a fast response time of less than 1ns and low clamp voltage to handle this pulse scenario. Similarly for negative ESD pulses, parasitic series inductance from the VN pin to the ground rail will lead to drastically increased negative voltage on the line being protected. The CM1223 also has an integrated backdrive diode between VP and VN to prevent backdrive current flow from the powered sources. As a general rule, the ESD Protection Array should be located as close as possible to the point of entry of expected electrostatic discharges. http://onsemi.com 7 CM1223 ADDITIONAL INFORMATION See also ON Semiconductor Application Note “Design Considerations for ESD Protection”, in the Applications section. VP Positive Supply VCC One Channel of CM1223 30A 0A 8 kV ESD Pulse PATH OF POSI TIVE ESD CURRENT PULSE IESD Line Being Protected SYSTEM OR CIR CUITRY I/O pin PATH OF NEGA TIVE ESD VN Ground Rail Chassis Ground Figure 3. Application of Positive ESD Pulse between Input Channel and Ground Figure 4. Application of Positive ESD Pulse between Input Channel and Ground http://onsemi.com 8 CM1223 MECHANICAL DETAILS The CM1223 is available in SOT143−4, SOT23−5, SOT23−6, and MSOP−10 packages with a lead−free finishing. The various package drawings are presented below. SOT143 Mechanical Specifications The CM1223−02SR is supplied in 4−pin SOT143 package, the CM1223−02SO in a 5−pin SOT23 package, the CM1223−04SO in a 6−pin SOT23 package, and the CM1223−08MR in a 10−lead MSOP package. Dimensions are presented below. Table 5. TAPE AND REEL SPECIFICATIONS Part Number Chip Size (mm) Pocket Size (mm) B0 X A0 X K0 Tape Width W Reel Diameter Qty per Reel P0 P1 CM1223−02SR 2.92 X 2.37 X 1.01 2.60 X 3.15 X1.20 8 mm 178 mm (7″) 3000 4 mm 4 mm CM1223−02SO 2.90 X 2.80 X 1.45 3.20 X 3.20 X1.40 8 mm 178 mm (7″) 3000 4 mm 4 mm CM1223−04SO 2.90 X 2.80 X 1.45 3.20 X 3.20 X1.40 8 mm 178 mm (7″) 3000 4 mm 4 mm CM1223−08MR 3.00 X 3.00 X 0.85 3.30 X 5.30 X1.30 12 mm 330 mm (13″) 4000 4 mm 8 mm 10 Pitches Cumulative P0 Top Î Î Î Î ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ Tolerance On Tape ±0.2 mm Cover Tape K0 For Tape Feeder Reference Only Including Draft Concentric Around B A0 W B0 Embossment P1 User Direction of Feed iLinkt is a trademark of S.J.Electro Systems, Inc. FireWire® is a registered trademark of Apple Computer, Inc. http://onsemi.com 9 Center Lines of Cavity MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SOT−143 CASE 318A−06 ISSUE U DATE 07 SEP 2011 SCALE 4:1 D NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIM­ UM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PRO­ TRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, AND GATE BURRS SHALL NOT EXCEED 0.25 PER SIDE. DI­ MENSION E1 DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH AND PROTRUSION SHALL NOT EXCEED 0.25 PER SIDE. 5. DIMENSIONS D AND E1 ARE DETERMINED AT DATUM H. 6. DATUMS A AND B ARE DETERMINED AT DATUM H. e D A GAUGE PLANE E L2 DETAIL A E1 b1 e1 B 3X b 0.20 TOP VIEW A1 H c 0.10 C C SIDE VIEW C A-B D M c A SEATING PLANE L DETAIL A SEATING PLANE END VIEW MILLIMETERS MIN MAX 0.80 1.12 0.01 0.15 0.30 0.51 0.76 0.94 0.08 0.20 2.80 3.05 2.10 2.64 1.20 1.40 1.92 BSC 0.20 BSC 0.35 0.70 0.25 BSC DIM A A1 b b1 c D E E1 e e1 L L2 GENERIC MARKING DIAGRAM* RECOMMENDED SOLDERING FOOTPRINT 1.92 XXX MG G 1 4X 0.75 XXX = Specific Device Code M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) 2.70 0.20 3X 0.96 *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. 0.54 DIMENSIONS: MILLIMETERS STYLE 1: PIN 1. 2. 3. 4. COLLECTOR EMITTER EMITTER BASE STYLE 2: PIN 1. 2. 3. 4. SOURCE DRAIN GATE 1 GATE 2 STYLE 3: PIN 1. 2. 3. 4. GROUND SOURCE INPUT OUTPUT STYLE 4: PIN 1. 2. 3. 4. STYLE 7: PIN 1. 2. 3. 4. SOURCE GATE DRAIN SOURCE STYLE 8: PIN 1. 2. 3. 4. SOURCE GATE DRAIN N/C STYLE 9: PIN 1. 2. 3. 4. GND IOUT VCC VREF STYLE 10: PIN 1. DRAIN 2. N/C 3. SOURCE 4. GATE DOCUMENT NUMBER: DESCRIPTION: 98ASB42227B SOT−143 OUTPUT GROUND GROUND INPUT STYLE 5: PIN 1. 2. 3. 4. SOURCE DRAIN GATE 1 SOURCE STYLE 6: PIN 1. 2. 3. 4. GND RF IN VREG RF OUT STYLE 11: PIN 1. SOURCE 2. GATE 1 3. GATE 2 4. DRAIN Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SOT−23, 5 Lead CASE 527AH ISSUE A DATE 09 JUN 2021 q q q q q q1 q2 GENERIC MARKING DIAGRAM* XXXM XXX = Specific Device Code M = Date Code *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. DOCUMENT NUMBER: DESCRIPTION: 98AON34320E SOT−23, 5 LEAD Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SOT−23, 6 Lead CASE 527AJ ISSUE B DATE 29 FEB 2012 SCALE 2:1 D A NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DATUM C IS THE SEATING PLANE. B 6 5 4 1 2 3 E E1 DIM A A1 A2 b c D E E1 e L L2 GAGE PLANE 6X e L2 TOP VIEW b 0.20 SEATING PLANE L M C A S B S DETAIL A A2 c A 6X 0.10 C A1 C SIDE VIEW SEATING PLANE DETAIL A 3.30 END VIEW 1 XXX = Specific Device Code M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) 6X 0.85 0.56 GENERIC MARKING DIAGRAM* XXX MG G RECOMMENDED SOLDERING FOOTPRINT* 6X MILLIMETERS MIN MAX --1.45 0.00 0.15 0.90 1.30 0.20 0.50 0.08 0.26 2.70 3.00 2.50 3.10 1.30 1.80 0.95 BSC 0.20 0.60 0.25 BSC *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. 0.95 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98AON34321E SOT−23, 6 LEAD Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS MSOP10, 3x3 CASE 846AE ISSUE A SCALE 1:1 A 10 E PIN ONE INDICATOR D 6 ÉÉ ÉÉ e 1 F B q E1 L L2 L1 DETAIL A 5 10X TOP VIEW b 0.08 C B M S A S DETAIL A A A1 0.10 C C c END VIEW SEATING PLANE SIDE VIEW RECOMMENDED SOLDERING FOOTPRINT* 10X 10X 0.29 0.85 C DATE 20 JUN 2017 NOTES: 1. DIMENSIONS AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSIONS: MILLIMETERS. 3. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.10 MM IN EXCESS OF MAXIMUM MATERIAL CONDITION. 4. DIMENSION D DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.15 MM PER SIDE. DIMENSION E DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 MM PER SIDE. DIMENSIONS D AND E ARE DETERMINED AT DATUM F. 5. DATUMS A AND B TO BE DETERMINED AT DATUM F. 6. A1 IS DEFINED AS THE VERTICAL DISTANCE FROM THE SEATING PLANE TO THE LOWEST POINT ON THE PACKAGE BODY. MILLIMETERS MIN NOM MAX −−− −−− 1.10 0.00 0.05 0.15 0.75 0.85 0.95 0.17 −−− 0.27 0.13 −−− 0.23 2.90 3.00 3.10 4.75 4.90 5.05 2.90 3.00 3.10 0.50 BSC 0.40 0.70 0.80 0.95 REF 0.25 BSC 0° −−− 8° DIM A A1 A2 b c D E E1 e L L1 L2 q GENERIC MARKING DIAGRAM* 10 5.35 XXXX AYWG G 1 0.50 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. XXXX A Y W G = Specific Device Code = Assembly Location = Year = Work Week = Pb−Free Package (Note: Microdot may be in either location) *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present and may be in either location. Some products may not follow the Generic Marking. DOCUMENT NUMBER: DESCRIPTION: 98AON34098E MSOP10, 3X3 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Email Requests to: orderlit@onsemi.com onsemi Website: www.onsemi.com ◊ TECHNICAL SUPPORT North American Technical Support: Voice Mail: 1 800−282−9855 Toll Free USA/Canada Phone: 011 421 33 790 2910 Europe, Middle East and Africa Technical Support: Phone: 00421 33 790 2910 For additional information, please contact your local Sales Representative