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CS8221YDFR8G

CS8221YDFR8G

  • 厂商:

    ONSEMI(安森美)

  • 封装:

    SOIC8_150MIL

  • 描述:

    IC REG LDO 5V 0.1A 8SOIC

  • 数据手册
  • 价格&库存
CS8221YDFR8G 数据手册
CS8221 Micropower 5.0 V, 100 mA Low Dropout Linear Regulator The CS8221 is a precision 5.0 V, 100 mA micropower voltage regulator with very low quiescent current (60 mA typical at 100 mA load). The 5.0 V output is accurate within ±2.0% and supplies 100 mA of load current with a maximum dropout voltage of only 600 mV. The regulator is protected against reverse battery, short circuit, overvoltage, and over temperature conditions. The device can withstand 74 V peak transients making it suitable for use in automotive environments. The CS8221 is pin for pin compatible with the LM2931. Features http://onsemi.com SO−8 DF SUFFIX CASE 751 D2PAK−3 DP SUFFIX CASE 418AB 3 8 1 • • • • • • Low Quiescent Current (60 mA @ 100 mA Load) 5.0 V ±2.0% Output 100 mA Output Current Capability Internally Fused Leads in SO−8 Package Fault Protection − +74 V Peak Transient Voltage − −15 V Reverse Voltage − Short Circuit − Thermal Shutdown Pb−Free Package is Available 12 PIN CONNECTIONS AND MARKING INDIAGRAM VOUT GND GND NC D2PAK−3 Tab = GND CS Pin 1. VIN 8221 2. GND AWLYWWG 3. VOUT 1 CS8221 = Specific Device Code A = Assembly Location WL, L = Wafer Lot Y = Year WW, W = Work Week G or G = Pb−Free Package 1 SO−8 CS822 ALYW1 G 8 VIN GND GND NC ORDERING INFORMATION* Device CS8221YDF8 CS8221YDFR8 CS8221YDFR8G CS8221YDP3 CS8221YDPR3 Package SO−8 SO−8 SO−8 (Pb−Free) D2PAK−3 D2PAK−3 Shipping † 95 Units/Rail 2500/Tape & Reel 2500/Tape & Reel 50 Units/Rail 750/Tape & Reel *Contact your local sales representative for TO−92 package option. †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2006 1 February, 2006 − Rev. 8 Publication Order Number: CS8221/D CS8221 VOUT VIN Current Source (Circuit Bias) Over Voltage Shutdown Current Limit Sense + Thermal Protection − Error Amplifier GND Bandgap Reference Figure 1. Block Diagram ABSOLUTE MAXIMUM RATINGS* Rating Junction Temperature Range, TJ Storage Temperature Range, TSTORAGE Power Dissipation Peak Transient Voltage (60 V Load Dump @ VIN = 14 V) Input Operating Range Output Current Electrostatic Discharge (Human Body Model) Lead Temperature Soldering: 1. 60 seconds maximum above 183°. *The maximum package power dissipation must be observed. Reflow (Note 1) Value −40 to +150 −55 to +150 Internally Limited −15, 74 −0.5 to 26 Internally Limited 2.0 230 peak Unit °C °C − V V − kV °C http://onsemi.com 2 CS8221 ELECTRICAL CHARACTERISTICS (6.0 ≤ VIN ≤ 26 V, IOUT = 1.0 mA, −40°C ≤ TJ ≤ 125°C unless otherwise noted.) Characteristic Output Stage Output Voltage, VOUT Dropout Voltage (VIN − VOUT) Load Regulation Line Regulation Quiescent Current, (IQ) 9.0 V < VIN < 26 V, 100 mA ≤ IOUT ≤ 100 mA 6.0 V ≤ VIN ≤ 26 V, 100 mA ≤ IOUT ≤ 100 mA IOUT = 100 mA IOUT = 100 mA VIN = 14 V, 100 mA ≤ IOUT ≤ 100 mA, 6.0 V < V < 26 V, IOUT = 1.0 mA IOUT = 100 mA, VIN = 6.0 V IOUT = 50 mA IOUT = 100 mA 7.0 ≤ VIN ≤ 17 V, IOUT = 100 mA, f = 120 Hz − VOUT = 0 V − VOUT ≤ 1.0 V 4.9 4.85 − − − − − − − 60 125 40 150 30 5.0 5.0 400 100 5.0 5.0 60 4.0 12 75 200 125 180 34 5.1 5.15 600 150 50 50 120 6.0 20 − − − − 38 V V mV mV mV mV mA mA mA dB mA mA °C V Test Conditions Min Typ Max Unit Ripple Rejection Current Limit Short Circuit Output Current Thermal Shutdown (Note 2) Overvoltage Shutdown 2. This parameter is guaranteed by design, but not parametrically tested in production. PACKAGE LEAD DESCRIPTION PACKAGE LEAD # SO−8 1 2, 3, 6, 7 4 5 8 D2PAK−3 3 2 − − 1 LEAD SYMBOL VOUT GND NC NC VIN 5.0 V, ±2.0%, 100 mA Output. Ground. No Connection. No Connection. Input Voltage. FUNCTION TYPICAL PERFORMANCE CHARACTERISTICS 1000 Unstable Region 100 CVOUT = 1 mF / 10 mF Stable Region ESR (W) 10 CVOUT = 1 mF 1 CVOUT = 10 mF 0.1 Unstable Region 0.01 0 10 20 30 40 50 60 70 IOUT OUTPUT CURRENT 80 90 100 Figure 2. CS8221 Output Stability http://onsemi.com 3 CS8221 CIRCUIT DESCRIPTION VOLTAGE REFERENCE AND OUTPUT CIRCUITRY Output Stage Protection The output stage is protected against overvoltage, short circuit and thermal runaway conditions (Figure 3). > 30 V Should the junction temperature of the power device exceed 180°C (typ) the power transistor is turned off. Thermal shutdown is an effective means to prevent die overheating since the power transistor is the principle heat source in the IC. VIN VOUT CS8221 C2** 10 mF VIN VOUT C1* 0.1 mF GND IOUT Load Dump Short Circuit Thermal Shutdown *C1 is required if regulator is far from the power source filter. **C2 is required for stability. Figure 3. Typical Circuit Waveforms for Output Stage Protection Figure 4. Application and Test Diagram If the input voltage rises above 30 V, the output shuts down. This response protects the internal circuitry and enables the IC to survive unexpected voltage transients. APPLICATION NOTES STABILITY CONSIDERATIONS The output or compensation capacitor helps determine three main characteristics of a linear regulator: start−up delay, load transient response and loop stability. The capacitor value and type should be based on cost, availability, size and temperature constraints. A tantalum or aluminum electrolytic capacitor is best, since a film or ceramic capacitor with almost zero ESR can cause instability. The aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures (−25°C to −40°C), both the value and ESR of the capacitor will vary considerably. The capacitor manufacturers data sheet usually provides this information. The value for the output capacitor COUT shown in Figure 4 should work for most applications, however it is not necessarily the optimized solution. To determine an acceptable value for COUT for a particular application, start with a tantalum capacitor of the recommended value and work towards a less expensive alternative part. Step 1: Place the completed circuit with a tantalum capacitor of the recommended value in an environmental chamber at the lowest specified operating temperature and monitor the outputs with an oscilloscope. A decade box connected in series with the capacitor will simulate the higher ESR of an aluminum capacitor. Leave the decade box outside the chamber, the small resistance added by the longer leads is negligible. Step 2: With the input voltage at its maximum value, increase the load current slowly from zero to full load while observing the output for any oscillations. If no oscillations are observed, the capacitor is large enough to ensure a stable design under steady state conditions. Step 3: Increase the ESR of the capacitor from zero using the decade box and vary the load current until oscillations appear. Record the values of load current and ESR that cause the greatest oscillation. This represents the worst case load conditions for the regulator at low temperature. Step 4: Maintain the worst case load conditions set in step 3 and vary the input voltage until the oscillations increase. This point represents the worst case input voltage conditions. Step 5: If the capacitor is adequate, repeat steps 3 and 4 with the next smaller valued capacitor. A smaller capacitor will usually cost less and occupy less board space. If the output oscillates within the range of expected operating conditions, repeat steps 3 and 4 with the next larger standard capacitor value. Step 6: Test the load transient response by switching in various loads at several frequencies to simulate its real working environment. Vary the ESR to reduce ringing. Step 7: Increase the temperature to your highest operating temperature. Vary the load current as instructed in step 5 to test for any oscillations. http://onsemi.com 4 CS8221 Once the minimum capacitor value with the maximum ESR is found, a safety factor should be added to allow for the tolerance of the capacitor and any variations in regulator performance. Most good quality aluminum electrolytic capacitors have a tolerance of ± 20% so the minimum value found should be increased by at least 50% to allow for this tolerance plus the variation which will occur at low temperatures. The ESR of the capacitor should be less than 50% of the maximum allowable ESR found in step 3 above. CALCULATING POWER DISSIPATION IN A SINGLE OUTPUT LINEAR REGULATOR HEAT SINKS A heat sink effectively increases the surface area of the package to improve the flow of heat away from the IC and into the surrounding air. Each material in the heat flow path between the IC and the outside environment will have a thermal resistance. Like series electrical resistances, these resistances are summed to determine the value of RΘJA. RQJA + RQJC ) RQCS ) RQSA (3) The maximum power dissipation for a single output regulator (Figure 5) is: PD(max) + VIN(max) * VOUT(min) IOUT(max) ) VIN(max)IQ (1) where: VIN(max) is the maximum input voltage, VOUT(min) is the minimum output voltage, IOUT(max) is the maximum output current for the application, and IQ is the quiescent current the regulator consumes at IOUT(max). Once the value of PD(max) is known, the maximum permissible value of RΘJA can be calculated: RQJA + 150°C * TA PD (2) where: RΘJC = the junction−to−case thermal resistance, RΘCS = the case−to−heatsink thermal resistance, and RΘSA = the heatsink−to−ambient thermal resistance. RΘJC appears in the package section of the data sheet. Like RΘJA, it too is a function of package type. RΘCS and RΘSA are functions of the package type, heatsink and the interface between them. These values appear in heat sink data sheets of heat sink manufacturers. The value of RΘJA can then be compared with those in the package section of the data sheet. Those packages with RΘJA’s less than the calculated value in equation 2 will keep the die temperature below 150°C. In some cases, none of the packages will be sufficient to dissipate the heat generated by the IC, and an external heatsink will be required. IIN VIN IOUT VOUT CS8221 IQ Figure 5. Single Output Regulator With Key Performance Parameters Labeled http://onsemi.com 5 CS8221 PACKAGE DIMENSIONS SO−8 DF SUFFIX CASE 751−07 ISSUE AG −X− A 8 5 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244 B 1 4 S 0.25 (0.010) M Y M −Y− G C −Z− H D 0.25 (0.010) M SEATING PLANE K N X 45 _ 0.10 (0.004) M J ZY S X S DIM A B C D G H J K M N S SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 6 CS8221 PACKAGE DIMENSIONS D2PAK−3 DP SUFFIX CASE 418AB−01 ISSUE O K A E TERMINAL 4 NOTES: 1. DIMENSIONS AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. PACKAGE OUTLINE EXCLUSIVE OF MOLD FLASH AND METAL BURRS. 4. PACKAGE OUTLINE INCLUSIVE OF PLATING THICKNESS. 5. FOOT LENGTH MEASURED AT INTERCEPT POINT BETWEEN DATUM A AND LEAD SURFACE. INCHES MIN MAX 0.396 0.406 0.330 0.340 0.170 0.180 0.026 0.036 0.045 0.055 0.100 REF 0.580 0.620 0.055 0.066 0.000 0.010 0.098 0.108 0.017 0.023 0.090 0.110 0° 8° 0.095 0.105 0.30 REF 0.305 REF 0.010 MILLIMETERS MIN MAX 10.05 10.31 8.38 8.64 4.31 4.57 0.66 0.91 1.14 1.40 2.54 REF 14.73 15.75 1.40 1.68 0.00 0.25 2.49 2.74 0.43 0.58 2.29 2.79 0° 8° 2.41 2.67 7.62 REF 7.75 REF 0.25 U S B H L P G D R −A− W N M V DIM A B C D E G H K L M N P R S U V W PACKAGE THERMAL DATA Parameter RΘJC RΘJA Typical Typical SO−8 25 110 D2PAK−3 4.2 10−50* Unit °C/W °C/W * Depending on thermal properties of substrate. RθJA = RθJC = RθCA SMART REGULATOR is a registered trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Japan : ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Phone: 81−3−5773−3850 Email: orderlit@onsemi.com ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. http://onsemi.com 7 CS8221/D
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