FAN7842MX

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This literature is subject to all applicable copyright laws and is not for resale in any manner. FAN7842 High- and Low-Side Gate Driver Features Description  Floating Channels Designed for Bootstrap Operation The FAN7842, a monolithic high and low side gate drive IC, which can drive MOSFETs and IGBTs that operate up to +200 V.         to +200 V Typically 350 mA/650 mA Sourcing/Sinking Current Driving Capability for Both Channels Common-Mode dv/dt Noise Canceling Circuit Extended Allowable Negative VS Swing to -9.8 V for Signal Propagation at VCC=VBS=15 V VCC & VBS Supply Range from 10 V to 20 V UVLO Functions for Both Channels TTL Compatible Input Logic Threshold Levels Matched Propagation Delay Below 50 nsec Output In-phase with Input Signal Applications  Battery based motor applications (E-bike, Power Tool)  Telecom DC-DC converter Fairchild’s high-voltage process and common-mode noise canceling technique provide stable operation of the high-side driver under high-dv/dt noise circumstances. An advanced level-shift circuit allows high-side gate driver operation up to VS=-9.8V (typical) for VBS=15V. The input logic level is compatible with standard TTLseries logic gates. The UVLO circuits for both channels prevent malfunction when VCC and VBS are lower than the specified threshold voltage. Output driver current (source/sink) is typically 350mA/650mA, respectively. Related Resources 8-SOP  AN-6076 - Design and Application Guide of Bootstrap Circuit for High-Voltage Gate-Drive IC  AN-9052 - Design Guide for Selection of Bootstrap Components  AN-8102 - Recommendations to Avoid Short Pulse Width Issues in HVIC Gate Driver Applications Ordering Information Part Number Package Operating Temperature Range Packing Method FAN7842MX(1) 8-SOP -40C ~ 125C Tape & Reel Note: 1. These devices passed wave soldering test by JESD22A-111. © 2006 Fairchild Semiconductor Corporation FAN7842 Rev. 1.5 www.fairchildsemi.com FAN7842 High- and Low-Side Gate Driver August 2016 FAN7842 High- and Low-Side Gate Driver Typical Application Circuit 15V 600V RBOOT DBOOT 1 VCC VB 8 Q1 HIN 2 HIN HO 7 LIN 3 LIN VS 6 R1 R2 CBOOT Q2 C1 4 COM R3 LO 5 Load R4 FAN7842 Rev.01 Figure 1. Application Circuit for Half-Bridge Internal Block Diagram 8 VB 7 HO 6 VS 1 VCC 5 LO 4 COM UVLO HS(ON/OFF) 500K NOISE CANCELLER R DRIVER 2 PULSE GENERATOR HIN R S Q UVLO DELAY 3 DRIVER LS(ON/OFF) LIN 500K FAN7842 Rev.02 Figure 2. Functional Block Diagram © 2006 Fairchild Semiconductor Corporation FAN7842 Rev. 1.5 www.fairchildsemi.com 2 FAN7842 High- and Low-Side Gate Driver Pin Assignments VCC 1 8 VB HIN 2 7 HO LIN 3 6 VS COM 4 5 LO FAN7842 Rev.01 Figure 3. Pin Configuration (Top View) Pin Definitions Name Description VCC Low-Side Supply Voltage HIN Logic Input for High-Side Gate Driver Output LIN Logic Input for Low-Side Gate Driver Output COM Logic Ground and Low-Side Driver Return LO Low-Side Driver Output VS High-Voltage Floating Supply Return HO High-Side Driver Output VB High-Side Floating Supply © 2006 Fairchild Semiconductor Corporation FAN7842 Rev. 1.5 www.fairchildsemi.com 3 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Characteristics VS High-side offset voltage VB High-side floating supply voltage Min. Max. VB-25 VB+0.3 -0.3 225 VS-0.3 VB+0.3 VHO High-side floating output voltage HO VCC Low-side and logic fixed supply voltage -0.3 25 VLO Low-side output voltage LO -0.3 VCC+0.3 VIN Logic input voltage (HIN, LIN) -0.3 VCC+0.3 VCC-25 VCC+0.3 COM Logic ground dVS/dt Allowable offset voltage slew rate PD(2)(3)(4) Power dissipation Unit V 50 V/ns 0.625 W JA Thermal resistance, junction-to-ambient 200 C/W TJ Junction temperature 150 C TSTG Storage temperature 150 C Notes: 2. Mounted on 76.2 x 114.3 x 1.6 mm PCB (FR-4 glass epoxy material). 3. Refer to the following standards: JESD51-2: Integral circuits thermal test method environmental conditions - natural convection JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages 4. Do not exceed PD under any circumstances. Recommended Operating Ratings The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter Min. Max. VB High-side floating supply voltage VS+10 VS+20 VS High-side floating supply offset voltage 6-VCC 200 VHO High-side (HO) output voltage VS VB VLO Low-side (LO) output voltage COM VCC VIN Logic input voltage (HIN, LIN) COM VCC VCC Low-side supply voltage 10 20 Ambient temperature -40 125 TA © 2006 Fairchild Semiconductor Corporation FAN7842 Rev. 1.5 Unit V °C www.fairchildsemi.com 4 FAN7842 High- and Low-Side Gate Driver Absolute Maximum Ratings VBIAS (VCC, VBS)=15.0 V, TA = 25C, unless otherwise specified. The VIN and IIN parameters are referenced to COM. The VO and IO parameters are referenced to VS and COM and are applicable to the respective outputs HO and LO. Symbol Characteristics Test Condition Min. Typ. Max. VCCUV+ VBSUV+ VCC and VBS supply under-voltage positive going threshold 8.2 9.2 10.0 VCCUVVBSUV- VCC and VBS supply under-voltage negative going threshold 7.6 8.7 9.6 VCCUVH VCC supply under-voltage lockout VBSUVH hysteresis Unit V 0.6 ILK Offset supply leakage current VB=VS=200 V IQBS 50 Quiescent VBS supply current VIN=0V or 5 V 45 120 IQCC Quiescent VCC supply current VIN=0V or 5 V 70 180 IPBS Operating VBS supply current fIN=20 kHz, rms value 600 IPCC Operating VCC supply current fIN=20 kHz, rms value 600 VIH Logic "1" input voltage µA µA 2.9 VIL Logic "0" input voltage VOH 0.8 High-level output voltage, VBIAS-VO VOL Low-level output voltage, VO IIN+ Logic "1" input bias current VIN=5 V 10 20 IIN- Logic "0" input bias current VIN=0 V 1.0 2.0 IO+ Output high short-circuit pulsed current VO=0 V, VIN=5 V with PW