FDB86569-F085

MOSFET – N-Channel, POWERTRENCH) 60 V, 80 A, 5.6 mW FDB86569-F085 Features • • • • • www.onsemi.com Typical RDS(on) = 4.4 mW at VGS = 10 V, ID = 80 A Typical Qg(tot) = 35 nC at VGS = 10 V, ID = 80 A UIS Capability These Device is Pb−Free and is RoHS Compliant Qualified to AEC−Q101 D G Applications • • • • • Automotive Engine Control PowerTrain Management Solenoid and Motor Drivers Integrated Starter/Alternator Primary Switch for 12 V Systems S D2PAK−3 CASE 418AJ FDB SERIES DRAIN GATE SOURCE MARKING DIAGRAM $Y&Z&3&K FDB 86569 $Y &Z &3 &K FDB86569 = ON Semiconductor Logo = Assembly Plant Code = Data Code (Year & Week) = Lot = Specific Device Code ORDERING INFORMATION See detailed ordering and shipping information on page 2 of this data sheet. © Semiconductor Components Industries, LLC, 2016 May, 2020 − Rev. 3 1 Publication Order Number: FDB86569−F085/D FDB86569−F085 MOSFET MAXIMUM RATINGS (TC = 25°C, Unless otherwise noted) Symbol Value Unit VDSS Drain to Source Voltage 60 V VGS Gate to Source Voltage ±20 V Drain Current − Continuous (VGS = 10 V) (Note 1) TC = 25°C 80 A See Figure 4 A 41 mJ ID Parameter Pulsed Drain Current TC = 25°C EAS Single Pulse Avalanche Energy (Note 2) PD Power Dissipation (TC = 25°C) − Derate Above 25°C TJ, TSTG Operating and Storage Temperature 94 W 0.63 W/°C −55 to +175 °C RqJC Thermal Resistance Junction to Case 1.6 °C/W RqJA Maximum Thermal Resistance, Junction to Ambient (Note 3) 43 °C/W Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Current is limited by bondwire configuration. 2. Starting TJ = 25°C, L = 15 mH, IAS = 74 A, VDD = 60 V during inductor charging and VDD = 0 V during time in avalanche. 3. RqJA is the sum of the junction−to−case and case−to−ambient thermal resistance, where the case thermal reference is defined as the solder mounting surface of the drain pins. RqJC is guaranteed by design, while RqJA is determined by the board design. The maximum rating presented here is based on mounting on a 1 in2 pad of 2oz copper. PACKAGE MARKING AND ORDERING INFORMATION Device Marking FDB86569 Device FDB86569−F085 Package D2−PAK (TO−263) Reel Size Tape Width Quantity 330 mm 24 mm 800 Units www.onsemi.com 2 FDB86569−F085 ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted) Parameter Symbol Test Conditions Min. Typ. Max. Unit OFF CHARACTERISTICS BVDSS IDSS IGSS Drain to Source Breakdown Voltage ID = 250 mA, VGS = 0 V Drain to Source Leakage Current VDS = 60 V, VGS = 0 V, TJ = 25_C 1 mA VDS = 60 V, VGS = 0 V, TC = 175_C (Note 1) 1 mA ±100 nA 2.8 4.0 V Gate to Source Leakage Current 60 V VGS = ±20 V ON CHARACTERISTICS VGS(TH) Gate to Source Threshold Voltage VGS = VDS, ID = 250 mA 2.0 RDS(ON) Drain to Source On Resistance ID = 80 A, VGS = 10 V, TJ = 25_C 4.4 5.6 mW ID = 80 A, VGS = 10 V, TC = 175_C (Note 1) 8.5 10.8 mW DYNAMIC CHARACTERISTICS Ciss Input Capacitance Coss Crss Rg VDS = 30 V, VGS = 0 V, f = 1 MHz 2520 pF Output Capacitance 690 pF Reverse Transfer Capacitance 47 pF W Gate Resistance f = 1 MHz 2.0 Qg(tot) Total Gate Charge at 10 V VGS = 0 V to 10 V, VDD = 30 V, ID = 80 A 35 Qg(th) Threshold Gate Charge VGS = 0 V to 2 V, VDD = 30 V, ID = 80 A 4.8 nC Qgs Gate to Source Gate Charge VDD = 30 V, ID = 80 A 14 nC Qgd Gate to Drain “Miller” Charge 7.4 nC 52 nC RESISTIVE SWITCHING CHARACTERISTICS tON Turn-On Time td(ON) Turn-On Delay tr td(OFF) tf tOFF VDD = 30 V, ID = 80 A, VGS = 10 V, RGEN = 6 W 53 ns 15 ns Rise Time 20 ns Turn-Off Delay 22 ns Fall Time 8 ns Turn-Off Time 45 ns ISD = 80 A, VGS = 0 V 1.25 V ISD = 40 A, VGS = 0 V 1.2 V 52 68 ns 43 65 nC DRAIN−SOURCE DIODE CHARACTERISTICS VSD trr QRR Source to Drain Diode Voltage Reverse Recovery Time Reverse Recovery Charge IF = 80 A, dlSD/dt = 100 A/ms, VDD = 48 V Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 1. The maximum value is specified by design at TJ = 175°C. Product is not tested to this condition in production. www.onsemi.com 3 FDB86569−F085 TYPICAL CHARACTERISTICS Figure 1. Normalized Power Dissipation vs. Case Temperature Figure 2. Maximum Continuous Drain Current vs Case Temperature Figure 3. Normalized Maximum Transient Thermal Impedance Figure 4. Peak Current Capability www.onsemi.com 4 FDB86569−F085 TYPICAL CHARACTERISTICS (Continued) NOTE: Figure 5. Forward Bias Safe Operating Area Refer to ON Semiconductor Application Notes AN−7514 and AN−7515 Figure 6. Unclamped Inductive Switching Capability Figure 7. Transfer Characteristics Figure 8. Forward Diode Characteristics Figure 9. Saturation Characteristics Figure 10. Saturation Characteristics www.onsemi.com 5 FDB86569−F085 TYPICAL CHARACTERISTICS (Continued) Figure 11. RDSON vs. Gate Voltage Figure 12. Normalized RDSON vs Junction Temperature Figure 13. Normalized Gate Threshold Voltage vs. Temperature Figure 14. Normalized Drain to Source Breakdown Voltage vs. Junction Temperature Figure 15. Capacitance vs. Drain to Source Voltage Figure 16. Gate Charge vs. Gate to Source Voltage POWERTRENCH is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. www.onsemi.com 6 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS D2PAK−3 (TO−263, 3−LEAD) CASE 418AJ ISSUE F SCALE 1:1 GENERIC MARKING DIAGRAMS* XX XXXXXXXXX AWLYWWG IC DOCUMENT NUMBER: DESCRIPTION: XXXXXXXXG AYWW Standard 98AON56370E AYWW XXXXXXXXG AKA Rectifier XXXXXX XXYMW SSG DATE 11 MAR 2021 XXXXXX = Specific Device Code A = Assembly Location WL = Wafer Lot Y = Year WW = Work Week W = Week Code (SSG) M = Month Code (SSG) G = Pb−Free Package AKA = Polarity Indicator *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. Some products may not follow the Generic Marking. Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. D2PAK−3 (TO−263, 3−LEAD) PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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