DATA SHEET
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MOSFET – P-Channel,
POWERTRENCH)
Pin 1
SS
-100 V, -15 A, 67 mW
FDMC86139P
DD
D
This P−Channel MOSFET is produced using onsemi’s advanced
POWERTRENCH technology. This very high density process is
especially tailored to minimize on−state resistance and optimized for
superior switching performance.
D
Bottom
Top
General Description
SG
WDFN8 3.3x3.3, 0.65P
CASE 511DH
MARKING DIAGRAM
Features
• Max rDS(on) = 67 mW at VGS = −10 V, ID = −4.4 A
• Max rDS(on) = 89 mW at VGS = −6 V, ID = −3.6 A
• Very Low RDS−On Mid Voltage P Channel Silicon Technology
•
•
•
Optimised for Low Qg
This Product is Optimised for Fast Switching Applications as well as
Load Switch Applications
100% UIL Tested
These Devices are Pb−Free and are RoHS Compliant
Applications
FDMC
86139P
&Z&K&2
FDMC
86139P
&Z
&K
&2
= Specific Device Code
= Specific Device Code
= Assembly Location
= Lot Run Traceability Code
= Date Code (Year and Week)
• Active Clamp Switch
• Load Switch
PIN ASSIGNMENT
S
1
8
D
S
2
7
D
S
3
6
D
G
4
5
D
P−Channel MOSFET
ORDERING INFORMATION
See detailed ordering and shipping information on page 6 of
this data sheet.
© Semiconductor Components Industries, LLC, 2013
January, 2022 − Rev. 3
1
Publication Order Number:
FDMC86139P/D
FDMC86139P
MOSFET MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Symbol
Rating
Unit
VDS
Drain to Source Voltage
100
V
VGS
Gate to Source Voltage
±25
V
A
ID
Parameter
Drain Current
Continuous
TC = 25°C
−15
Continuous (Note 1a)
TA = 25°C
−4.4
Pulsed
−30
EAS
Single Pulse Avalanche Energy (Note 3)
121
mJ
PD
Power Dissipation
TC = 25°C
40
W
Power Dissipation (Note 1a)
TA = 25°C
2.3
TJ, TSTG
Operating and Storage Junction Temperature Range
−55 to + 150
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
THERMAL CHARACTERISTICS
Symbol
Parameter
Rating
Unit
°C/W
RqJC
Thermal Resistance, Junction to Case
3.1
RqJA
Thermal Resistance, Junction to Ambient (Note 1a)
53
1. RqJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR−4 material. RqJC is guaranteed
by design while RqCA is determined by the user’s board design.
b. 125°C/W when mounted on
a minimum pad of 2 oz copper
a. 53°C/W when mounted on
a 1 in2 pad of 2 oz copper
SS
SF
DS
DF
G
SS
SF
DS
DF
G
2. Pulse Test: Pulse Width < 300 ms, Duty cycle < 2.0%.
3. Starting TJ = 25°C; P−ch: L = 3 mH, IAS = −9 A, VDD = −100 V, VGS = −10 V. 100% test al L = 0.1 mH, IAS = −28 A
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2
FDMC86139P
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
−100
−
−
V
OFF CHARACTERISTICS
BVDSS
Drain to Source Breakdown Voltage
ID = −250 mA, VGS = 0 V
DBV DSS
Breakdown Voltage Temperature
Coefficient
ID = −250 mA, referenced to 25°C
−
−63
−
mV/°C
IDSS
Zero Gate Voltage Drain Current
VDS = −80 V, VGS = 0 V
−
−
−1
mA
IGSS
Gate to Source Leakage Current
VGS = ±25 V, VDS = 0 V
−
−
±100
nA
DT J
ON CHARACTERISTICS
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = −250 mA
−2
−3
−4
V
DV GS(th)
Gate to Source Threshold Voltage
Temperature Coefficient
ID = −250 mA, referenced to 25°C
−
7
−
mV/°C
Static Drain to Source
On Resistance
VGS = −10 V, ID = −4.4 A
−
56
67
mW
VGS = −6 V, ID = −3.6 A
−
69
89
VGS = −10 V, ID = −4.4 A, TJ = 125°C
−
87
104
VDS = −10 V, ID = −4.4 A
−
12
−
S
VDS = −50 V, VGS = 0 V, f = 1 MHz
−
1001
1335
pF
−
178
240
pF
DT J
rDS(on)
gFS
Forward Transconductance
DYNAMIC CHARACTERISTICS
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate Resistance
−
10
15
pF
0.1
1.6
3.2
W
−
11
20
ns
−
2.5
10
ns
−
17
30
ns
SWITCHING CHARACTERISTICS
td(on)
tr
td(off)
tf
Qg(TOT)
Turn−On Delay Time
Rise Time
VDD = −50 V, ID = −4.4 A, VGS = −10 V,
RGEN = 6 W
Turn−Off Delay Time
Fall Time
Total Gate Charge
Qgs
Total Gate Charge
Qgd
Gate to Drain “Miller” Charge
−
4
10
ns
VDD = −50 V, ID = −4.4 A, VGS = 0 V to −10 V
−
16
22
nC
VDD = −50 V, ID = −4.4 A, VGS = 0 V to −6 V
−
9.8
14
VDD = −50 V, ID = −4.4 A
−
4.5
−
nC
−
3.2
−
nC
V
DRAIN−SOURCE DIODE CHARACTERISTICS
VSD
Source to Drain Diode Forward
Voltage
VGS = 0 V, IS = −4.4 A (Note 2)
−
−0.84
−1.3
VGS = 0 V, IS = −1.9 A (Note 2)
−
−0.79
−1.2
trr
Reverse Recovery Time
IF = −4.4 A, di/dt = 100 A/ms
−
70
112
ns
Qrr
Reverse Recovery Charge
−
141
225
nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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3
FDMC86139P
TYPICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
VGS = −10 V
VGS = −6 V
VGS = −5.5 V
20
VGS = −5 V
10
0
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
VGS = −4.5 V
0
1
2
3
4
5
NORMALIZED DRAIN TO SOURCE
ON−RESISTANCE
−ID, DRAIN CURRENT (A)
30
VGS = −4.5 V
VGS = −5.5 V
3
VGS = −6 V
2
1
0
5
0
10
250
ID = −4.4 A
VGS = −10 V
rDS(on), DRAIN TO SOURCE
ON−RESISTANCE (mW)
NORMALIZED DRAIN TO SOURCE
ON−RESISTANCE
2.0
1.6
1.4
1.2
1.0
0.8
0.6
−75 −50 −25
0
25
50
75
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
200
ID = −4.4 A
150
TJ = 125°C
100
50
0
100 125 150
TJ = 25°C
4
−IS, REVERSE DRAIN CURRENT (A)
VDS = −5 V
TJ = 150°C
10
TJ = 25°C
TJ = −55°C
2
3
4
5
6
7
8
9
10
Figure 4. On−Resistance vs. Gate to Source
Voltage
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
20
6
5
−VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance
vs. Junction Temperature
30
30
Figure 2. Normalized On−Resistance vs.
Drain Current and Gate Voltage
TJ, JUNCTION TEMPERATURE (°C)
−ID, DRAIN CURRENT (A)
20
−ID, DRAIN CURRENT (A)
Figure 1. On Region Characteristics
1.8
VGS = −10 V
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
−VDS, DRAIN TO SOURCE VOLTAGE (V)
0
VGS = −5 V
4
7
50
VGS = 0 V
10
TJ = 150°C
1
TJ = 25°C
0.1
TJ = −55°C
0.01
0.001
0.0
0.2
0.4
0.6
0.8
1.0
−VSD, BODY DIODE FORWARD VOLTAGE (V)
−VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode Forward
Voltage vs. Source Current
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4
1.2
FDMC86139P
10
ID = −4.4 A
2000
1000
VDD = −50 V
8
CAPACITANCE (pF)
−VGS, GATE TO SOURCE VOLTAGE (V)
TYPICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) (continued)
VDD = −25 V
6
VDD = −75 V
4
2
0
0
4
8
12
CISS
COSS
100
10
1
16
0.1
Qg, GATE CHARGE (nC)
−ID, DRAIN CURRENT (A)
−IAS, AVALANCHE CURRENT (A)
100
20
TJ = 25°C
TJ = 100°C
10
TJ = 125°C
1
0.001
0.01
0.1
1
15
5
RqJC = 3.1°C/W
0
P(PK), PEAK TRANSIENT POWER (W)
100 ms
1 ms
THIS AREA IS
LIMITED BY rDS(on)
SINGLE PULSE
TJ = MAX RATED
RqJA = 125°C/W CURVE BENT TO
TA = 25°C
MEASURED DATA
0.1
1
10
50
75
100
125
150
Figure 10. Maximum Continuous Drain
Current vs. Case Temperature
40
1
25
TC, CASE TEMPERATURE (°C)
Figure 9. Unclamped Inductive Switching
Capability
10
LIMITED BY PACKAGE
VGS = −6 V
50
10
VGS = −10 V
10
tAV, TIME IN AVALANCHE (ms)
−ID, DRAIN CURRENT (A)
10
Figure 8. Capacitance vs. Drain
to Source Voltage
50
0.01
0.005
1
−VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics
0.1
CRSS
f = 1 MHz
VGS = 0 V
10 ms
100 ms
1s
10 s
DC
100
400
2000
1000
100
10
1
0.5
−VDS, DRAIN TO SOURCE VOLTAGE (V)
SINGLE PULSE
RqJA = 125°C/W
TA = 25°C
10−4 10−3 10−2
10−1
1
10
100
t, PULSE WIDTH (s)
Figure 11. Forward Bias Safe Operating Area
Figure 12. Single Pulse Maximum
Power Dissipation
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5
1000
FDMC86139P
2
1
0.1
DUTY CYCLE−DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
TYPICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) (continued)
t1
t2
0.01
ZqJA(t) = r(t) × RqJA
RqJA = 125°C/W
Peak TJ = PDM × ZqJA(t) + TA
Duty Cycle, D = t1 / t2
SINGLE PULSE
0.001
0.0005
−4
10
−3
10
−2
10
−1
0
10
10
t, RECTANGULAR PULSE DURATION (s)
10
1
10
2
10
3
Figure 13. Junction−to−Ambient Transient Thermal Response Curve
ORDERING INFORMATION
Device
FDMC86139P
Device Marking
Package Type
Reel Size
Tape Width
Shipping†
FDMC86139P
WDFN8 3.3x3.3, 0.65P
Power 33
(Pb−Free)
13”
12 mm
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
POWERTRENCH is registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other
countries.
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WDFN8 3.3x3.3, 0.65P
CASE 511DH
ISSUE O
0.05 C
3.30
DATE 31 JUL 2016
B
A
8
2X
(3.40)
2.37
5
0.45(4X)
2.15
3.30
(1.70)
(0.40)
KEEP OUT
AREA
(0.65)
0.70(4X)
PIN#1 IDENT
0.10 C
0.05 C
TOP VIEW
0.65
2X
1
4
1.95
0.75±0.05
0.42(8X)
RECOMMENDED LAND PATTERN
0.15±0.05
0.08 C
0.025±0.025
NOTES:
C
SIDE VIEW
SEATING
PLANE
A. DOES NOT CONFORM TO JEDEC
REGISTRATION MO−229
B. DIMENSIONS ARE IN MILLIMETERS.
3.30±0.05
2.27±0.05
PIN #1 IDENT
1
(0.79)
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 2009.
(0.50)4X
D. LAND PATTERN RECOMMENDATION IS
EXISTING INDUSTRY LAND PATTERN.
4
0.50±0.05 (4X)
(0.35)
(1.15)
3.30±0.05
R0.15
2.00±0.05
0.30±0.05 (3X)
8
5
0.65
1.95
0.35±0.05 (8X)
0.10
C A B
0.05
C
BOTTOM VIEW
DOCUMENT NUMBER:
DESCRIPTION:
98AON13625G
WDFN8 3.3X3.3, 0.65P
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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