FDMC86265P

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This literature is subject to all applicable copyright laws and is not for resale in any manner. FDMC86265P P-Channel PowerTrench® MOSFET -150 V, -2.6 A, 1.2 Ω Features General Description „ Max rDS(on) = 1.2 Ω at VGS = -10 V, ID = -1 A This P-Channel MOSFET is produced using Fairchild Semiconductor‘s advanced PowerTrench® process that has been optimized for the on-state resistance and yet maintain superior switching performance. „ Max rDS(on) = 1.4 Ω at VGS = -6 V, ID = -0.9 A „ Very Low RDS-on Mid Voltage P-channel Silicon Technology Optimised for Low Qg „ This product is optimised for fast switching applications as well as load switch applications. Applications „ Active Clamp Switch „ 100% UIL Tested „ Load Switch „ RoHS Compliant Bottom Top Pin 1 S S S S D S D S D G D G D D D D MLP 3.3x3.3 MOSFET Maximum Ratings TA = 25 °C unless otherwise noted. Symbol VDS Drain to Source Voltage Parameter VGS Gate to Source Voltage Drain Current -Continuous ID TC = 25 °C TJ, TSTG ±25 V (Note 5) -2.6 TC = 100 °C (Note 5) -1.65 -Continuous TA = 25 °C (Note 1a) -1 (Note 4) -9 -Pulsed PD Units V -Continuous Single Pulse Avalanche Energy EAS Ratings -150 (Note 3) Power Dissipation TC = 25 °C Power Dissipation TA = 25 °C 6 16 (Note 1a) Operating and Storage Junction Temperature Range 2.3 -55 to + 150 A mJ W °C Thermal Characteristics RθJC Thermal Resistance, Junction to Case RθJA 7.5 Thermal Resistance, Junction to Ambient (Note 1a) 53 °C/W Package Marking and Ordering Information Device Marking FDMC86265P Device FDMC86265P ©2014 Fairchild Semiconductor Corporation FDMC86265P Rev.1.3 Package Power 33 1 Reel Size 13 ’’ Tape Width 12 mm Quantity 3000 units www.fairchildsemi.com FDMC86265P P-Channel PowerTrench® MOSFET August 2016 Symbol Parameter Test Conditions Min. Typ. Max. Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = -250 μA, VGS = 0 V ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient ID = -250 μA, referenced to 25 °C IDSS Zero Gate Voltage Drain Current VDS = -120 V, VGS = 0 V -1 μA IGSS Gate to Source Leakage Current VGS = ±25 V, VDS = 0 V ±100 nA -4 V -150 V -125 mV/°C On Characteristics VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = -250 μA ΔVGS(th) ΔTJ Gate to Source Threshold Voltage Temperature Coefficient ID = -250 μA, referenced to 25 °C VGS = -10 V, ID = -1 A 0.86 1.2 rDS(on) Static Drain to Source On Resistance VGS = -6 V, ID = -0.9 A 0.95 1.4 VGS = -10 V, ID = -1 A,TJ = 125 °C 1.53 2.2 VDS = -10 V, ID = -1 A 1.9 gFS Forward Transconductance -2 -3.2 5 mV/°C Ω S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate Resistance VDS = -75 V, VGS = 0 V, f = 1 MHz 0.1 158 210 pF 16 25 pF 0.7 5 pF 3 7.5 Ω ns Switching Characteristics td(on) Turn-On Delay Time tr Rise Time td(off) Turn-Off Delay Time tf Fall Time Qg(TOT) Total Gate Charge Qgs Total Gate Charge Qgd Gate to Drain “Miller” Charge 5.8 12 VDD = -75 V, ID = -1 A, VGS = -10 V, RGEN = 6 Ω 2.2 10 ns 8 16 ns 6.4 13 ns VGS = 0 V to -10 V V = -75 V, DD ID = -1 A 2.8 4 nC 0.8 nC 0.7 nC Drain-Source Diode Characteristics VSD Source to Drain Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = -1 A (Note 2) IF = -1 A, di/dt = 100 A/μs -0.87 -1.3 V 50 80 ns 78 124 nC NOTES: 1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. b) 125 °C/W when mounted on a minimum pad of 2 oz copper a) 53 °C/W when mounted on a 1 in2 pad of 2 oz copper SS SF DS DF G SS SF DS DF G 2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%. 3. Starting TJ = 25 °C; P-ch: L =3 mH, IAS = -2 A, VDD = -150 V, VGS = -10 V. 100% test at L = 0.1 mH, IAS = -9 A. 4. Pulsed Id please refer to Fig 11 and Fig 24 SOA graph for more details. 5. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal & electro-mechanical application board design. ©2014 Fairchild Semiconductor Corporation FDMC86265P Rev.1.3 2 www.fairchildsemi.com FDMC86265P P-Channel PowerTrench® MOSFET Electrical Characteristics TJ = 25 °C unless otherwise noted. 3.0 2.0 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE -ID, DRAIN CURRENT (A) VGS = -10 V VGS = -8 V 1.5 VGS = -6 V VGS = -5 V 1.0 0.5 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX VGS = -4.5 V 0.0 0 1 2 3 4 5 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 2.5 VGS = -4.5 V 2.0 VGS = -5 V 1.5 VGS = -6 V 1.0 0.5 0.0 0.5 Figure 1. On Region Characteristics rDS(on), DRAIN TO 1.6 1.4 1.2 1.0 0.8 0.6 0.4 -75 SOURCE ON-RESISTANCE (mΩ) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 4000 ID = -1 A VGS = -10 V 1.8 1.5 2.0 Figure 2. Normalized On-Resistance vs. Drain Current and Gate Voltage 2.2 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX ID = -1 A 3000 2000 TJ = 125 oC 1000 TJ = 25 oC 0 -50 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) 4 5 6 7 8 9 10 -VGS, GATE TO SOURCE VOLTAGE (V) Figure 4. On-Resistance vs. Gate to Source Voltage Figure 3. Normalized On Resistance vs. Junction Temperature 4 -IS, REVERSE DRAIN CURRENT (A) 2.0 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX -ID, DRAIN CURRENT (A) 1.0 -ID, DRAIN CURRENT (A) -VDS, DRAIN TO SOURCE VOLTAGE (V) 2.0 VGS = -10 V VGS = -8 V 1.5 VDS = -5 V TJ = 150 oC 1.0 TJ = 25 oC 0.5 TJ = -55 oC 3 4 5 TJ = 150 oC 0.1 TJ = 25 oC 0.01 TJ = -55 oC 0.001 0.0 0.0 2 VGS = 0 V 1 6 0.2 0.4 0.6 0.8 1.0 -VGS, GATE TO SOURCE VOLTAGE (V) -VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs. Source Current ©2014 Fairchild Semiconductor Corporation FDMC86265P Rev.1.3 3 1.2 www.fairchildsemi.com FDMC86265P P-Channel PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted. 1000 VDD = -75 V ID = -1 A Ciss 8 VDD = -50 V 6 CAPACITANCE (pF) -VGS, GATE TO SOURCE VOLTAGE (V) 10 VDD = -100 V 4 100 Coss 10 Crss 1 2 0 0.0 0.5 1.0 1.5 2.0 2.5 f = 1 MHz VGS = 0 V 0.1 0.1 3.0 10 100 Figure 8. Capacitance vs. Drain to Source Voltage 3.0 10 9 8 7 6 5 -ID, DRAIN CURRENT (A) -IAS, AVALANCHE CURRENT (A) Figure 7. Gate Charge Characteristics TJ = 25 oC TJ = 100 oC 4 3 TJ = 125 oC 2 1 0.001 0.01 0.1 2.4 1.8 VGS = -10 V 1.2 0.0 25 1 VGS = -6 V o RθJC = 7.5 C/W 0.6 50 75 100 125 150 o TC, CASE TEMPERATURE ( C) tAV, TIME IN AVALANCHE (ms) Figure 9. Unclamped Inductive Switching Capability Figure 10. Maximum Continuous Drain Current vs. Case Temperature 10 300 P(PK), PEAK TRANSIENT POWER (W) -ID, DRAIN CURRENT (A) 1 -VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) 100 μs 1 THIS AREA IS LIMITED BY rDS(on) 1 ms SINGLE PULSE TJ = MAX RATED 0.1 RθJC = 7.5 oC/W CURVE BENT TO MEASURED DATA o TC = 25 C 10 ms DC 0.01 1 10 100 500 -VDS, DRAIN to SOURCE VOLTAGE (V) TC = 25 oC 100 10 -4 10 -3 10 -2 10 -1 10 1 t, PULSE WIDTH (sec) Figure 12. Single Pulse Maximum Power Dissipation Figure 11. Forward Bias Safe Operating Area ©2014 Fairchild Semiconductor Corporation FDMC86265P Rev.1.3 SINGLE PULSE Rθ JC = 7.5 oC/W 4 www.fairchildsemi.com FDMC86265P P-Channel PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 2 DUTY CYCLE-DESCENDING ORDER 1 D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 NOTES: 0.1 ZθJC(t) = r(t) x RθJC RθJC = 7.5 oC/W Peak TJ = PDM x ZθJC(t) + TC Duty Cycle, D = t1 / t2 SINGLE PULSE 0.05 -4 10 -3 -2 10 10 -1 10 1 t, RECTANGULAR PULSE DURATION (sec) Figure 13. Junction-to-Case Transient Thermal Response Curve ©2014 Fairchild Semiconductor Corporation FDMC86265P Rev.1.3 5 www.fairchildsemi.com FDMC86265P P-Channel PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted. 3.30 0.05 C B A 2X 8 (3.40) 2.37 5 0.45(4X) 2.15 (1.70) 3.30 (0.40) KEEP OUT AREA (0.65) 0.70(4X) PIN#1 IDENT 0.05 C TOP VIEW 0.65 2X 1 4 0.42(8X) 1.95 RECOMMENDED LAND PATTERN 0.10 C 0.08 C NOTES: C SIDE VIEW SEATING PLANE A. DOES NOT CONFORM TO JEDEC REGISTRATION MO-229 B. DIMENSIONS ARE IN MILLIMETERS. 2.27+0.05 PIN #1 IDENT (0.50)4X (0.79) 1 C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 2009. D. LAND PATTERN RECOMMENDATION IS EXISTING INDUSTRY LAND PATTERN. 4 E. DRAWING FILENAME: MKT-MLP08Srev3. (0.35) (1.15) R0.15 8 0.65 5 1.95 BOTTOM VIEW 0.10 0.05 C A B C ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 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