FDMD8240LET40

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ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. FDMD8240LET40 Dual N-Channel Power Trench® MOSFET 40 V, 103 A, 2.6 mΩ Features General Description „ Extended TJ Rating to 175 °C This device includes two 40V N-Channel MOSFETs in a dual Power (3.3 mm X 5 mm) package. HS source and LS Drain are internally connected for half/full bridge, low source inductance package, low rDS(on)/Qg FOM silicon. „ Max rDS(on) = 2.6 mΩ at VGS = 10 V, ID = 23 A „ Max rDS(on) = 3.95 mΩ at VGS = 4.5 V, ID = 19 A „ Ideal for Flexible Layout in Primary Side of Bridge Topology Applications „ 100% UIL Tested „ Synchronous Buck : Primary Switch of Half / Full Bridge Converter for Telecom „ Kelvin High Side MOSFET Drive Pin-out Capability „ Termination is Lead-free and RoHS Compliant „ Motor Bridge : Primary Switch of Half / Full bridge Converter for BLDC Motor „ MV POL : Synchronous Buck Switch Pin 1 Pin 1 D1 1 12 G1 D1 2 11 D1 3 10 D2/S1 G2 4 9 D2/S1 S2 5 8 D2/S1 S2 6 7 D2/S1 G1R Power 3.3 x 5 MOSFET Maximum Ratings TA = 25 °C unless otherwise noted. Symbol VDS Drain to Source Voltage Parameter VGS Gate to Source Voltage Drain Current ID TJ, TSTG ±20 V TC = 25 °C -Continuous TC = 100 °C (Note 5) 73 -Continuous TA = 25 °C (Note 1a) 24 -Pulsed PD Units V -Continuous Single Pulse Avalanche Energy EAS Power Dissipation TC = 25 °C Power Dissipation TA = 25 °C (Note 5) Ratings 40 103 (Note 4) 489 (Note 3) 216 50 (Note 1a) Operating and Storage Junction Temperature Range 2.5 -55 to +175 A mJ W °C Thermal Characteristics RθJC Thermal Resistance, Junction to Case RθJA Thermal Resistance, Junction to Ambient 3.0 (Note 1a) 60 °C/W Package Marking and Ordering Information Device Marking 8240LT Device FDMD8240LET40 ©2016 Fairchild Semiconductor Corporation FDMD8240LET40 Rev.1.0 Package Power 3.3 x 5 1 Reel Size 13 ’’ Tape Width 12 mm Quantity 3000 units www.fairchildsemi.com FDMD8240LET40 Dual N-Channel PowerTrench® MOSFET January 2016 Symbol Parameter Test Conditions Min. Typ. Max. Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C IDSS Zero Gate Voltage Drain Current VDS = 32 V, VGS = 0 V 1 μA IGSS Gate to Source Leakage Current VGS = ±20 V, VDS = 0 V ±100 nA 3.0 V 40 V 23 mV/°C On Characteristics VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA ΔVGS(th) ΔTJ Gate to Source Threshold Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C VGS = 10 V, ID = 23 A 2.0 2.6 rDS(on) Static Drain to Source On Resistance VGS = 4.5 V, ID = 19 A 3.2 3.95 VGS = 10 V, ID = 23 A, TJ = 150 °C 3.3 4.3 VDD = 5 V, ID = 23 A 107 gFS Forward Transconductance 1.0 2.0 -6 mV/°C mΩ S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate Resistance VDS = 20 V, VGS = 0 V f = 1 MHz 0.1 3020 4230 pF 876 1230 pF 33 52 pF 2.8 6 Ω 12 22 ns 8 16 ns 36 58 ns 9 18 ns 40 56 nC 21 30 Switching Characteristics td(on) Turn-On Delay Time tr Rise Time td(off) Turn-Off Delay Time tf Fall Time Qg(TOT) VDD = 20 V, ID = 23 A VGS = 10 V, RGEN = 6 Ω Total Gate Charge VGS = 0 V to 10 V Total Gate Charge VGS = 0 V to 5 V Qgs Gate to Source Charge Qgd Gate to Drain “Miller” Charge VDD = 20 V ID = 23 A nC 9 nC 5 nC Drain-Source Diode Characteristics VSD Source to Drain Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = 23 A (Note 2) 0.8 1.3 VGS = 0 V, IS = 1.6 A (Note 2) 0.7 1.2 IF = 23 A, di/dt = 100 A/μs V 41 65 ns 21 32 nC NOTES: 1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. b. 130 °C/W when mounted on a minimum pad of 2 oz copper a. 60 °C/W when mounted on a 1 in2 pad of 2 oz copper SS SF DS DF G SS SF DS DF G 2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %. 3. EAS of 216 mJ is based on starting TJ = 25 oC, L = 3 mH, IAS = 12 A, VDD = 40 V, VGS = 10 V. 100% tested at L = 0.1 mH, IAS = 37 A. 4. Pulsed Id please refer to Fig 11 SOA graph for more details. 5. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal & electro-mechanical application board design. ©2016 Fairchild Semiconductor Corporation FDMD8240LET40 1.0 2 www.fairchildsemi.com FDMD8240LET40 Dual N-Channel PowerTrench® MOSFET Electrical Characteristics TJ = 25 °C unless otherwise noted. 6 VGS = 10 V VGS = 6 V 120 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE ID, DRAIN CURRENT (A) 150 VGS = 4 V VGS = 4.5 V 90 60 VGS = 3.5 V 30 0 0.0 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0.3 0.6 0.9 1.2 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX VGS = 3.5 V 4 VGS = 4 V VGS = 4.5 V 2 1.5 0 30 VDS, DRAIN TO SOURCE VOLTAGE (V) rDS(on), DRAIN TO SOURCE ON-RESISTANCE (mΩ) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE IS, REVERSE DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 90 60 TJ = 25 oC 30 TJ = -55 oC 4 5 TJ = 150 oC TJ = 25 oC 2 3 4 5 6 7 8 9 200 100 10 VGS = 0 V 1 TJ = 175 oC 0.1 0.01 TJ = -55 oC 0.001 0.0 5 TJ = 25 oC 0.2 0.4 0.6 0.8 1.0 VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs. Source Current ©2016 Fairchild Semiconductor Corporation FDMD8240LET40 1.0 10 Figure 4. On Resistance vs. Gate to Source Voltage VDS = 5 V 3 ID = 23 A 10 VGS, GATE TO SOURCE VOLTAGE (V) PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 2 150 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0 150 1 120 15 Figure 3. Normalized On Resistance vs. Junction Temperature 0 90 Figure 2. Normalized On-Resistance vs. Drain Current and Gate Voltage 1.9 ID = 23 A 1.8 VGS = 10 V 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 -75 -50 -25 0 25 50 75 100 125 150 175 TJ, JUNCTION TEMPERATURE (oC) TJ = 175 oC 60 ID, DRAIN CURRENT (A) Figure 1. On-Region Characteristics 120 VGS = 10 V VGS = 6 V 0 3 1.2 www.fairchildsemi.com FDMD8240LET40 Dual N-Channel PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted. VGS, GATE TO SOURCE VOLTAGE (V) 10 10000 Ciss ID = 23 A 8 CAPACITANCE (pF) 6 VDD = 15 V VDD = 20 V 4 VDD = 25 V 2 0 0 10 20 30 1000 40 Coss 100 Crss 10 f = 1 MHz VGS = 0 V 1 0.1 50 Figure 7. Gate Charge Characteristics 40 110 ID, DRAIN CURRENT (A) 10 TJ = 25 oC TJ = 150 oC TJ = 100 oC 88 VGS = 10 V 66 VGS = 4.5 V 44 22 o RθJC = 3.0 C/W 1 0.001 0.01 0.1 1 10 0 25 100 50 75 100 125 Figure 10. Maximum Continuous Drain Current vs. Case Temperature 1000 P(PK), PEAK TRANSIENT POWER (W) 10000 10 μs 100 SINGLE PULSE RθJC = 3.0 oC/W TC = 25 oC 1000 1 THIS AREA IS LIMITED BY rDS(on) 100 μs SINGLE PULSE TJ = MAX RATED RθJC = 3.0 oC/W 0.1 0.1 175 TC, CASE TEMPERATURE ( C) Figure 9. Unclamped Inductive Switching Capability 10 150 o tAV, TIME IN AVALANCHE (ms) ID, DRAIN CURRENT (A) 10 Figure 8. Capacitance vs. Drain to Source Voltage 100 IAS, AVALANCHE CURRENT (A) 1 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) 1 ms 10 ms CURVE BENT TO MEASURED DATA TC = 25 oC 1 10 100 ms/DC 100 10 -5 10 -4 10 -3 10 -2 10 -1 10 1 t, PULSE WIDTH (sec) VDS, DRAIN to SOURCE VOLTAGE (V) Figure 11. Forward Bias Safe Operating Area ©2016 Fairchild Semiconductor Corporation FDMD8240LET40 1.0 100 Figure 12. Single Pulse Maximum Power Dissipation 4 www.fairchildsemi.com FDMD8240LET40 Dual N-Channel PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 2 1 0.1 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 NOTES: 0.01 ZθJC(t) = r(t) x RθJC RθJC = 3.0oC/W Peak TJ = PDM x ZθJC(t) + TC Duty Cycle, D = t1 / t2 SINGLE PULSE 0.001 -5 10 -4 10 -3 -2 10 10 -1 10 1 t, RECTANGULAR PULSE DURATION (sec) Figure 13. Junction-to-Case Transient Thermal Response Curve ©2016 Fairchild Semiconductor Corporation FDMD8240LET40 1.0 5 www.fairchildsemi.com FDMD8240LET40 Dual N-Channel PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted. 0.10 C B 5.10 4.90 2X 6 KEEP-OUT AREA A 1 2.35 0.42 (12X) 0.65 6 1 0.42 0.79 (12X) 3.40 3.20 3.70 PIN#1 INDICATOR 7 1.44 0.72 0.10 C 12 0.26 7 12 0.43 SEE DETAIL 'A' 3.67 4.70 5.10 LAND PATTERN RECOMMENDATION 5.00±0.10 0.10 0.05 4.60±0.10 C A B C 0.72 7 12 R0.15 0.36 0.20 3.30±0.10 1.34±0.10 0.52 0.64 0.44 6 1 (12X) 0.37 (12X) 0.27 0.65 0.53 NOTES: UNLESS OTHERWISE SPECIFIED A) DOES NOT FULLY CONFORM TO JEDEC REGISTRATION, MO-229 DATED 8/2012 B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE BURRS OR MOLD FLASH. MOLD FLASH OR BURRS DOES NOT EXCEED 0.10MM. 0.80 0.70 D) DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994. 0.10 C E) IT IS RECOMMENDED TO HAVE NO TRACES OR VIAS WITHIN THE KEEP OUT AREA. 0.08 C C 0.25 0.15 0.05 0.00 SCALE: 2:1 F) DRAWING FILE NAME: SEATING PLANE MKT-PQFN12BREV1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. 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