FDMS9411L_F085

N-Channel Logic Level PowerTrench® MOSFET 40 V, 30 A, 7.0 mΩ Features „ Typical RDS(on) = 5.6 mΩ at VGS = 10V, ID = 30 A „ Typical Qg(tot) = 18 nC at VGS = 10V, ID = 30 A „ UIS Capability „ RoHS Compliant „ Qualified to AEC Q101 Applications „ Automotive Engine Control „ PowerTrain Management „ Solenoid and Motor Drivers „ Electronic Steering „ Integrated Starter/Alternator „ Distributed Power Architectures and VRM „ Primary Switch for 12V Systems MOSFET Maximum Ratings TJ = 25°C unless otherwise noted. Symbol VDSS Drain-to-Source Voltage VGS ID EAS PD Parameter Ratings 40 Units V ±20 V Gate-to-Source Voltage Drain Current - Continuous (VGS=10) (Note 1) TC = 25°C 30 Pulsed Drain Current TC = 25°C See Figure 4 Single Pulse Avalanche Energy (Note 2) 15.7 Power Dissipation Derate Above 25oC TJ, TSTG Operating and Storage Temperature RθJC Thermal Resistance, Junction to Case RθJA Maximum Thermal Resistance, Junction to Ambient A mJ 50 W 0.33 W/oC -55 to + 175 oC 3 oC/W 50 oC/W (Note 3) FDMS9411L-F085 N-Channel Logic Level PowerTrench® MOSFET FDMS9411L-F085 Notes: 1: Current is limited by bondwire configuration. 2: Starting TJ = 25°C, L = 40μH, IAS = 28A, VDD = 40V during inductor charging and VDD = 0V during time in avalanche. 3: RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance, where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design, while RθJA is determined by the board design. The maximum rating presented here is based on mounting on a 1 in2 pad of 2oz copper. Package Marking and Ordering Information Device Marking FDMS9411L Device FDMS9411L-F085 ©2016 Semiconductor Components Industries, LLC. August-2017, Rev. 2 Package Power56 Reel Size 13” 1 Tape Width 12mm Quantity 3000units Publication Order Number: FDMS9411L-F085/D Symbol Parameter Test Conditions Min. Typ. Max. Units Off Characteristics BVDSS Drain-to-Source Breakdown Voltage IDSS Drain-to-Source Leakage Current IGSS Gate-to-Source Leakage Current ID = 250μA, VGS = 0V VDS = 40V, VGS = 0V 40 - - V - - 1 μA - - 1 mA - - ±100 nA TJ = 25oC TJ = 175oC (Note 4) VGS = ±20V On Characteristics VGS(th) RDS(on) Gate to Source Threshold Voltage Drain to Source On Resistance VGS = VDS, ID = 250μA 1.0 2.0 3.0 V ID = 30A, VGS= 4.5V - 9.0 12.5 mΩ ID = 30A, VGS= 10V - 5.6 7.0 mΩ - 10.0 12.5 mΩ TJ = 25oC TJ = 175oC (Note 4) Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate Resistance f = 1MHz Qg(ToT) Total Gate Charge VGS = 0 to 10V Qg(th) Threshold Gate Charge VGS = 0 to 2V - 2 - nC Qgs Gate-to-Source Gate Charge - 4 - nC Qgd Gate-to-Drain “Miller“ Charge - 3 - nC ns VDS = 20V, VGS = 0V, f = 1MHz VDD = 32V ID = 30A - 1210 - pF - 413 - pF - 28 - pF - 2.6 - Ω - 18 28 nC Switching Characteristics ton Turn-On Time - - 15 td(on) Turn-On Delay - 8 - ns tr Rise Time - 3 - ns td(off) Turn-Off Delay - 20 - ns tf Fall Time - 4 - ns toff Turn-Off Time - - 36 ns ISD =30A, VGS = 0V - - 1.25 V ISD = 15A, VGS = 0V - - 1.2 V IF = 30A, dISD/dt = 100A/μs VDD = 32V - 38 57 ns - 22 33 nC VDD = 20V, ID = 30A, VGS = 10V, RGEN = 6Ω Drain-Source Diode Characteristics VSD Source-to-Drain Diode Voltage trr Reverse-Recovery Time Qrr Reverse-Recovery Charge Note: 4: The maximum value is specified by design at TJ = 175°C. Product is not tested to this condition in production. www.onsemi.com 2 FDMS9411L-F085 N-Channel Logic Level PowerTrench® MOSFET Electrical Characteristics TJ = 25°C unless otherwise noted. 1.0 ID, DRAIN CURRENT (A) POWER DISSIPATION MULTIPLIER 80 1.2 0.8 0.6 0.4 0.2 0.0 0 25 50 75 100 125 150 TC, CASE TEMPERATURE(oC) 60 CURRENT LIMITED BY PACKAGE 40 20 0 175 Figure 1. Normalized Power Dissipation vs. Case Temperature VGS = 10V CURRENT LIMITED BY SILICON 25 50 75 100 125 150 175 TC, CASE TEMPERATURE(oC) 200 Figure 2. Maximum Continuous Drain Current vs. Case Temperature NORMALIZED THERMAL IMPEDANCE, ZθJC 2 1 0.1 DUTY CYCLE - DESCENDING ORDER D = 0.50 0.20 0.10 0.05 0.02 0.01 PDM t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJC x RθJC + TC SINGLE PULSE 0.01 -5 10 -4 10 -3 -2 -1 0 10 10 10 t, RECTANGULAR PULSE DURATION(s) 1 10 10 Figure 3. Normalized Maximum Transient Thermal Impedance 1000 TC = 25oC VGS = 10V FOR TEMPERATURES IDM, PEAK CURRENT (A) ABOVE 25oC DERATE PEAK CURRENT AS FOLLOWS: 175 - TC I = I25 150 100 SINGLE PULSE 10 -5 10 -4 10 -3 -2 -1 10 10 10 t, RECTANGULAR PULSE DURATION(s) Figure 4. Peak Current Capability www.onsemi.com 3 0 10 1 10 FDMS9411L-F085 N-Channel Logic Level PowerTrench® MOSFET Typical Characteristics 100 IAS, AVALANCHE CURRENT (A) ID, DRAIN CURRENT (A) 1000 100 100us 10 OPERATION IN THIS AREA MAY BE LIMITED BY PACKAGE 1 OPERATION IN THIS AREA MAY BE LIMITED BY rDS(on) 0.1 0.1 SINGLE PULSE TJ = MAX RATED TC = 25oC 1ms 10ms 100ms 1 10 100 200 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 5. Forward Bias Safe Operating Area VDD = 5V 60 o TJ = 25 C 40 0 TJ = -55oC TJ = 175oC 20 1 2 3 4 VGS, GATE TO SOURCE VOLTAGE (V) 1 0.001 250μs PULSE WIDTH Tj=25oC 0.1 1 10 100 VGS = 0 V 10 TJ = 25 oC TJ = 175 oC 1 0.1 0.0 5 0.2 0.4 0.6 0.8 1.0 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 8. Forward Diode Characteristics 100 VGS 10V Top 6V 5V 4.5V 4V 3.5V 3V Bottom 40 20 VGS 10V Top 6V 5V 4.5V 4V 3.5V 3V Bottom 80 60 40 3V 20 250μs PULSE WIDTH Tj=175oC 3V 0 0 0 0.01 Figure 6. Unclamped Inductive Switching Capability ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 100 60 STARTING TJ = 150oC NOTE: Refer to ON Semiconductor Application Notes AN7514 and AN7515 Figure 7. Transfer Characteristics 80 STARTING TJ = 25oC 100 PULSE DURATION = 250μs DUTY CYCLE = 0.5% MAX 80 10 tAV, TIME IN AVALANCHE (ms) IS, REVERSE DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 100 If R = 0 tAV = (L)(IAS)/(1.3*RATED BVDSS - VDD) If R ≠ 0 tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS - VDD) +1] 1 2 3 4 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 9. Saturation Characteristics 5 0 1 2 3 4 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 10. Saturation Characteristics www.onsemi.com 4 5 FDMS9411L-F085 N-Channel Logic Level PowerTrench® MOSFET Typical Characteristics PULSE DURATION = 250μs DUTY CYCLE = 0.5% MAX ID = 30A 40 30 20 TJ = 175oC 10 0 3 TJ = 25oC 4 5 6 7 8 9 VGS, GATE TO SOURCE VOLTAGE (V) 10 Figure 11. RDSON vs. Gate Voltage 1.2 1.4 1.2 1.0 0.8 ID = 30A VGS = 10V 0.6 0.4 -80 -40 0 40 80 120 160 TJ, JUNCTION TEMPERATURE(oC) 200 ID = 5mA NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE NORMALIZED GATE THRESHOLD VOLTAGE 0.8 1.00 0.7 0.95 0.6 0.5 -40 0 40 80 120 160 TJ, JUNCTION TEMPERATURE(oC) Ciss Coss 100 f = 1MHz VGS = 0V Crss 1 10 VDS, DRAIN TO SOURCE VOLTAGE (V) 100 Figure 15. Capacitance vs. Drain to Source Voltage -40 0 40 80 120 160 TJ, JUNCTION TEMPERATURE (oC) 200 Figure 14. Normalized Drain to Source Breakdown Voltage vs. Junction Temperature VGS, GATE TO SOURCE VOLTAGE(V) 10000 1000 0.90 -80 200 Figure 13. Normalized Gate Threshold Voltage vs. Temperature CAPACITANCE (pF) 1.6 1.05 0.9 10 0.1 PULSE DURATION = 250μs DUTY CYCLE = 0.5% MAX 1.8 1.10 1.0 0.4 -80 2.0 Figure 12. Normalized RDSON vs. Junction Temperature VGS = VDS ID = 250μA 1.1 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE rDS(on), DRAIN TO SOURCE ON-RESISTANCE (mΩ) 50 10 ID = 30A 8 VDD = 20V VDD = 24V 6 VDD =16V 4 2 0 0 3 6 9 12 Qg, GATE CHARGE(nC) 15 18 Figure 16. Gate Charge vs. Gate to Source Voltage www.onsemi.com 5 FDMS9411L-F085 N-Channel Logic Level PowerTrench® MOSFET Typical Characteristics ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. 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