FDR844P

FDR844P P-Channel 1.8V Specified PowerTrench MOSFET General Description Features This P-Channel 1.8V specified MOSFET uses Fairchild’s advanced low voltage PowerTrench process. It has been optimized for battery power management applications. • –10 A, –20 V. RDS(ON) = 11 mΩ RDS(ON) = 14 mΩ RDS(ON) = 20 mΩ Applications • Fast switching speed • Power management • High performance trench technology for extremely low RDS(ON) • Load switch @ VGS = –4.5 V @ VGS = –2.5 V @VGS = –1.8 V • High power and current handling capability • Battery protection D D S S D TM SuperSOT -8 D 4 6 3 7 2 8 1 D Absolute Maximum Ratings Symbol G 5 TA=25oC unless otherwise noted Parameter Ratings Units VDSS Drain-Source Voltage –20 V VGSS Gate-Source Voltage ±8 V ID Drain Current –10 A – Continuous (Note 1a) – Pulsed –50 Power Dissipation for Single Operation PD (Note 1a) 1.8 (Note 1b) 1.0 (Note 1c) TJ, TSTG W 0.9 -55 to +150 °C (Note 1a) 70 °C/W (Note 1) 20 °C/W Operating and Storage Junction Temperature Range Thermal Characteristics RθJA Thermal Resistance, Junction-to-Ambient RθJC Thermal Resistance, Junction-to-Case Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity .844P FDR844P 13’’ 12mm 2500 units 2001 Fairchild Semiconductor Corporation FDR844P Rev A1(W) FDR844P October 2001 Symbol Parameter TA = 25°C unless otherwise noted Test Conditions Min Typ Max Units Off Characteristics VGS = 0 V, ID = –250 µA –20 V BVDSS ∆BVDSS ∆TJ IDSS Drain–Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current VDS = –16V, VGS = 0 V –1 µA IGSSF Gate–Body Leakage, Forward VGS = 8 V, VDS = 0 V 100 nA IGSSR Gate–Body Leakage, Reverse VGS = –8 V, VDS = 0 V –100 nA –1.5 V On Characteristics VGS(th) ∆VGS(th) ∆TJ RDS(on) ID = –250 µA, Referenced to 25°C –13 mV/°C (Note 2) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance VDS = VGS, ID = –250 µA –0.4 –0.7 ID = –250 µA, Referenced to 25°C 3 7 9.5 13 9.5 mV/°C ID(on) On–State Drain Current VGS = –4.5 V, ID = –10 A ID = –9 A VGS = –2.5 V, ID = –7.5 A VGS = –1.8 V, VGS= –4.5 V, ID = –10 A, TJ=125°C VGS = –4.5 V, VDS = –5 V gFS Forward Transconductance VDS = –10 V, ID = –10 A 57 VDS = –10 V, f = 1.0 MHz V GS = 0 V, 4951 pF 884 pF 451 pF 11 14 20 15 –50 mΩ A S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics td(on) Turn–On Delay Time tr Turn–On Rise Time td(off) (Note 2) 16 29 9 18 ns Turn–Off Delay Time 196 314 ns tf Turn–Off Fall Time 78 125 ns Qg Total Gate Charge 53 74 nC Qgs Gate–Source Charge Qgd Gate–Drain Charge VDD = –10 V, VGS = –4.5 V, VDS = –10 V, VGS = –4.5 V ID = –1 A, RGEN = 6 Ω ID = –10 A, ns 6 nC 12 nC Drain–Source Diode Characteristics and Maximum Ratings IS VSD Maximum Continuous Drain–Source Diode Forward Current Drain–Source Diode Forward VGS = 0 V, IS = –1.5 A Voltage (Note 2) –0.56 –1.5 A –1.2 V Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 70°C/W when mounted on a 1in2 pad of 2 oz copper b) 125°C/W when 2 mounted on a .04 in pad of 2 oz copper c) 135°C/W when mounted on a minimum pad. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% FDR844P Rev A1(W) FDR844P Electrical Characteristics FDR844P Typical Characteristics 50 2.2 -2.5V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE -ID, DRAIN CURRENT (A) VGS = -4.5V -3.0V 40 -2.0V -1.5V 30 20 10 0 2 VGS = - 1.5V 1.8 1.6 1.4 -2.0V -2.5V 1.2 -3.0V -3.5V -4.5V 1 0.8 0 0.5 1 1.5 2 0 10 20 -VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 1. On-Region Characteristics. 50 0.035 ID = -10A VGS = - 4.5V ID = -5A RDS(ON), ON-RESISTANCE (OHM) RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 40 Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.6 1.4 1.2 1 0.8 0.6 0.03 0.025 0.02 TA = 125oC 0.015 0.01 TA = 25oC 0.005 -50 -25 0 25 50 75 100 125 150 175 0 1 o 2 3 4 5 -VGS, GATE TO SOURCE VOLTAGE (V) TJ, JUNCTION TEMPERATURE ( C) Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 10 VDS = -5V TA = -55oC 40 -IS, REVERSE DRAIN CURRENT (A) 50 -ID, DRAIN CURRENT (A) 30 -ID, DRAIN CURRENT (A) 25oC 125oC 30 20 10 0 VGS = 0V 1 TA = 125oC 0.1 25oC 0.01 -55oC 0.001 0.0001 0 0.5 1 1.5 -VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 2 0 0.2 0.4 0.6 0.8 -VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDR844P Rev A1(W) FDR844P Typical Characteristics 6000 ID = -10A VDS = -5V 5000 4 -15V 3 2 4000 3000 2000 COSS 1 1000 CRSS 0 0 0 10 20 30 40 50 60 0 Qg, GATE CHARGE (nC) 100 5 10 15 20 -VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics. 50 RDS(ON) LIMIT 10µs 100µs 1ms 10 SINGLE PULSE RθJA =135oC/W 40 TA = 25oC 10ms POWER (W) -ID, DRAIN CURRENT (A) f = 1 MHz VGS = 0 V CISS -10V CAPACITANCE (pF) -VGS , GATE-SOURCE VOLTAGE (V) 5 100ms 1 1s DC VGS = -4.5V SINGLE PULSE RθJA =135oC/W 0.1 30 20 10 TA = 25oC 0.01 0.1 1 10 100 0 0.001 0.01 -VDS, DRAIN-SOURCE VOLTAGE (V) Figure 9. Maximum Safe Operating Area. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 0.1 1 10 100 SINGLE PULSE TIME (SEC) Figure 10. Single Pulse Maximum Power Dissipation. 1 D = 0.5 RθJA(t) = r(t) * RθJA RθJA = 135 °C/W 0.2 0.1 0.1 0.05 P(pk) 0.02 0.01 t1 t TJ - TA =2 P * RθJA(t) Duty Cycle, D = t1 / t2 0.01 SINGLE PULSE 0.001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design. FDR844P Rev A1(W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ FAST  FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MicroPak™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench  QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER  SMART START™ STAR*POWER™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ TruTranslation™ UHC™ UltraFET  VCX™ STAR*POWER is used under license DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H4