MC100EL91
5 V Triple PECL Input to
-5 V ECL Output Translator
Description
The MC100EL91 is a triple PECL input to ECL output translator.
The device receives standard voltage differential PECL signals,
determined by the VCC supply level, and translates them to differential
−5 V ECL output signals. (For translation of LVPECL to −3.3 V ECL
output, see MC100LVEL91.)
To accomplish the level translation, the EL91 requires three power
rails. The VCC supply should be connected to the positive supply, and
the VEE pin should be connected to the negative power supply. The
GND pins are connected to the system ground plane. Both VEE and
VCC should be bypassed to ground via 0.01ĂmF capacitors.
Under open input conditions, the D input will be biased at VCC/2
and the D input will be pulled to GND. This condition will force the Q
output to a low, ensuring stability.
The VBB pin, an internally generated voltage supply, is available to
this device only. For single-ended input conditions, the unused
differential input is connected to VBB as a switching reference voltage.
VBB may also rebias AC coupled inputs. When used, decouple VBB
and VCC via a 0.01 mF capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, VBB should be left open.
www.onsemi.com
SOIC−20 WB
DW SUFFIX
CASE 751D−05
MARKING DIAGRAM*
20
100EL91
AWLYYWWG
Features
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670 ps Typical Propagation Delay
ESD Protection: > 2 kV Human Body Model
The 100 Series Contains Temperature Compensation
Operating Range:
♦ VCC = 4.75 V to 5.5 V
♦ VEE = −4.2 V to −5.5 V; GND = 0 V
Internal Input Pulldown Resistors
Q Output will Default LOW with Inputs Open or at GND
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Moisture Sensitivity Level: 3 (Pb-Free)
♦ For Additional Information, see Application Note AND8003/D
Flammability Rating: UL 94 V−0 @ 0.125 in,
Oxygen Index: 28 to 34
Transistor Count = 282 devices
These Devices are Pb-Free, Halogen Free and are RoHS Compliant
1
A
WL
YY
WW
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb-Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
Package
Shipping†
MC100EL91DWG
SOIC−20 WB
(Pb-Free)
38 Units/Tube
MC100EL91DWR2G
SOIC−20 WB
(Pb-Free)
1000/Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer
to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2016
July, 2016 − Rev. 8
1
Publication Order Number:
MC100EL91/D
MC100EL91
VCC
Q0
Q0
GND
Q1
Q1 GND
20
19
18
17
16
15
ECL
1
2
3
VCC
D0
D0
4
5
6
PECL VBB
PECL
PECL
D1
D1
Q2
VCC
13
12
11
14
Table 1. PIN DESCRIPTION
ECL
PIN
FUNCTION
PECL
Dn, Dn
Qn, Qn
PECL VBB
VCC
VEE
GND
PECL Inputs
ECL Outputs
PECL Reference Voltage Output
Positive Supply
Negative Supply
Ground
7
8
9
10
PECL VBB
ECL
Q2
D2
D2
VEE
**All VCC pins are tied together on the die.
Warning: All VCC, VEE, and GND pins must be externally
connected to Power Supply to guarantee proper operation.
Figure 1. 20-Lead Pinout (Top View) and Logic Diagram
Table 2. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
Condition 2
Rating
Unit
VCC
PECL Power Supply
GND = 0 V
8 to 0
V
VEE
NECL Power Supply
GND = 0 V
−8 to 0
V
VI
PECL Input Voltage
GND = 0 V
Iout
Output Current
Continuous
Surge
IBB
PECL VBB Sink/Source
VI ≤ VCC
6 to 0
V
50
100
mA
± 0.5
mA
TA
Operating Temperature Range
−40 to +85
°C
Tstg
Storage Temperature Range
−65 to +150
°C
qJA
Thermal Resistance (Junction-to-Ambient)
0 lfpm
500 lfpm
SOIC−20 WB
90
60
°C/W
qJC
Thermal Resistance (Junction-to-Case)
Standard Board
SOIC−20 WB
30 to 35
°C/W
Tsol
Wave Solder (Pb-Free)
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