NCL30167
Power Factor Corrected
LED Boost Switching
Regulator
The NCL30167 high power factor boost PWM switching regulator
is designed to regulate the average current through a string of LEDs.
The circuit operates in Critical Conduction Mode (CrM) based on
a proven constant on-time control scheme to achieve near unity power
factor. In addition to regulating a constant current, the switching
regulator is optimized to support leading and trailing edge phase
dimming applications. When a dimmer is detected on the AC input,
an internal voltage reference of the current regulation loop adjusts the
current level based on the dimmer conduction angle so the current
through the LED string has a desired value based on a programmed
dimming curve. The shape of the dimming curve is intended to
emulate the response of an incandescent bulb while achieving NEMA
SSL6 and NEMA SSL7A recommendations.
A cascoded configuration supports biasing the controller during
operation and eliminates the need for an auxiliary winding to provide
bias power. A robust suite of protection features are included to ensure
proper handling of expected fault conditions without the need for extra
circuitry and a dedicated thermal fold-back input proves gradually
reduction of the current above a user defined set-point.
Features
•
•
•
•
•
•
•
•
•
•
Near-Unity Power Factor
Critical Conduction Mode (CrM)
Constant On-time Control
Accurate Current Regulation (±2% Typical)
Compatible with Leading and Trailing Edge Phase Controlled
Dimmers
Fast Startup Time (< 100 ms Typical)
Integrated ZCD Detection
User Programmable Thermal Current Fold-back
VCC Operation up to 20 V
This Device is Pb-Free and is RoHS Compliant
• Output Overvoltage Protection
• Cycle-by-Cycle Current Limiting
• VCC UVLO
LED Bulbs
LED Downlights
LED Light Engines
LED Modules
December, 2016 − Rev. 0
1
SOIC−10
CASE 751BQ
MARKING DIAGRAM
10
L30167
ALYWX
G
1
L30167
A
L
Y
W
G
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
1
10
NC
ACC_TH
TF
COMP
OVP
DRV
CS2
CS1
GND
VCC
5
(Top View)
6
Device
Package
Shipping†
NCL30167DR2G
SOIC−10
(Pb-Free)
2500 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Typical Applications
© Semiconductor Components Industries, LLC, 2016
10
ORDERING INFORMATION
Safety Features
•
•
•
•
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1
Publication Order Number:
NCL30167/D
NCL30167
TYPICAL APPLICATION EXAMPLE
C9
LED6 LED5 LED4 LED3 LED2 LED1
+
R17
R18
R14
R15
R12
R13
C8
R16
D2
D3
R11
D4
D1
C3
NTC
C5
C4
L2
C6
NCL30167
CS1
GND
VCC
DRV
CS2
OVP
TF
ACC_TH
IC1
NC
COMP
C7
M1
R10
R8
R7
C1
C2
R9
R3
R4
F1
L1
R2
B1
R5
R6
R1
N
L
Figure 1. NCL30167 Application Schematic
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2
NCL30167
PIN FUNCTION DESCRIPTION
Table 1. PIN FUNCTION DESCRIPTION
Pin
Number
Pin
Name
1
ACC_TH
2
TF
3
Function
Description
Dimming Detection Input
This pin receives a portion of the AC input voltage. It is compared to an
internal reference voltage in order to determine the presence of a dimmer
state and the phase angle.
Thermal Fold-back
Connecting an NTC to this pin allows linear reduction of the output current
above a user programmed temperature set-point.
OVP
Over Voltage Protection Input
This pin receives a portion of the Boost output voltage VOUT and serves to
trigger an OVP fault in the event the LED string is open.
4
CS2
2nd Current Sense Input
This pin monitors the LED load current across the Rsense2 resistor during the
off time. This pin is used to monitor the instantaneous load current for
regulation loop, and to determine when the Zero Current Detection (ZCD)
point is reached.
5
VCC
VCC Input
This positive supply pin accepts up to 20 Vdc. The supply for the device is
ensured by the external diode from the source pin.
6
GND
−
The switching regulator ground
7
CS1
1st Current Sense Input
This pin monitors the inductor current across the Rsense1 resistor during the
on-time. This pin monitors the maximum current cycle by cycle.
8
DRV
Drive for HV Switch
The Driving Pin for Source of the External High Voltage NMOS. Connect the
external diode between the source and VCC pin to provide the IC supply.
9
COMP
Compensation
Feedback loop compensation pin of the IC.
10
NC
Not Connected
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NCL30167
SIMPLIFIED INTERNAL BLOCK SCHEMATIC
Iovp(bias)
Vdd
OVP_CMP
LV MOS
Set
Q
CS1
DRV
IC stop
Reset Qb
ILIM_MIN
1.0 V
OCP_RST
Ilimit_CMP
TSD
TSD
WindShort
1.0 V
CS1 Fault
Ilimit_MIN_CMP
CS2 Fault
LEB 250 ns
DRV
VccON
12 V
ON_CMP
VccON
Vdd
Latch
Fault Management
8.8 V
VccOFF
IC Stop
Vdd
LEB 120 ns
1.5 V
Iton
DRVb
VCS1stop
WindShort
4 events timer
Cton
DRV
CS1
0.350 V
CSstop_CMP
5V
VccRESET
RESET
VILIM_MIN
PowerOnReset_CMP
DRV
Vuvp
RST
PWM
UVLO_CMP
UVLO
Vdd reg
CLK
Latch
UVP_CMP
UVPstop
VCC
SOURCE
Vdd
VILIM
OVP
OVP
3.0 V
Vovp
20 ms
Filter
RST_CMP
PWM
COMP
EA_OTA
IC stop
Vref(tf ) = Ktf*Vref
Gm
DIM_CMP
DIM
DIMb CA input
Multiplier
Output
Vref
Vref Processing
Vdd
1.0 V
Q
Set
60 ms watch−dog timer
DRV
DRVb
Qb Reset
Q
CS2fault
Set
Figure 2. Simplified Internal Block Schematic
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DRVb
CS2
GND
CS2open_CMP
Reset
4
50 mV
VCS2stop
OA
ZCD_CMP
4.5 V
TF
Vtf(start)
CS2short
Itf
Vdd
DRVb
Clock
ZCD
generator
Vzcd
CLK
Analog
Pass
1 mA
0.45 V
VACC_TH
ACC_TH
NCL30167
Table 2. MAXIMUM RATINGS
Symbol
Pin
DRV
8
Value
Unit
External NMOS Source Driving Pin
Continuous Current
RθJ−C Steady State, TC = 25 °C (Note 1)
RθJ−C Steady State, TC = 100°C (Note 1)
Peak Current
Rating
−0.3 to 20
V
0.5
0.25
−0.01/1.7
A
A
A
VCC
5
VCC Power Supply Voltage, VCC Pin, Continuous Voltage
Power Supply Voltage, VCC Pin, Continuous Voltage (Note 2)
–0.3 to 20
±30 (Peak)
V
mA
CS1
7
Maximum Voltage
Continuous Current
–0.3 to 5.5
−1.7/0.01
V
A
Vmax
Maximum Voltage on Low Power Pins (except pins 5, 7, 8)
Maximum Peak Current to Low Power Pins
– 0.3 to 9
±10
V
mA
RθJ−A
Thermal Resistance Junction-to-Air
180
°C/W
TJMAX
Operating Junction Temperature
−40 to +125
°C
Storage Temperature Range
−60 to +150
°C
300
°C
3
−
ESD Capability, HBM model (Note 2)
3.5
kV
ESD Capability, Machine Model (Note 2)
250
V
1
kV
TSTRGMAX
TLmax
Lead Temperature (Soldering, 10 s)
MSL
Moisture Sensitivity Level
ESD Capability, CDM model (Note 2)
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Limited by the junction temperature.
2. This device contains ESD protection and exceeds the following tests:
Human Body Model 3500 V per JEDEC Standard JESD22−A114E,
Machine Model Method 250 V per JEDEC Standard JESD22−A115B,
Charged Device Model 1000 V per JEDEC Standard JESD22−C101E.
3. This device contains Latch-up protection and has been tested per JEDEC JESD78D, Class I and exceeds ±100 mA.
Table 3. ELECTRICAL CHARACTERISTICS
(For typical values Tj = 25°C, for min/max values Tj = −40°C to +125°C, VCC = 13 V unless otherwise noted)
Characteristics
Test Conditions
Symbol
Min
Typ
Max
Unit
SUPPLY
Turn-on Threshold Level
VCC Going Up
VCC(on)
11.0
12.0
13.0
V
Minimum Operating Voltage, Turn-off
Threshold
VCC Going Down
VCC(off)
8.2
8.8
9.4
V
Hysteresis VCC(on) − VCC(off)
VCC(hyst)
2.8
−
−
V
VCC Decreasing Level at which the Internal
Logic Resets
VCC(reset)
4.0
5.0
6.0
V
tVCC(off)
−
10
−
ms
Blanking Duration on VCC(off)
tVCC(reset)
−
10
−
ms
Internal Current Consumption of Device
before Start-up
VCC = 10 V
ICC1
−
10
100
mA
Internal Current Consumption, when DRV Pin
is Switching
fSW = 65 kHz
ICC2
−
1.0
1.5
mA
Internal Current Consumption, when DRV Pin
is Turned-on
VCS1 < 0.3 V
ICC3
−
0.9
1.1
mA
Blanking Duration on VCC(reset)
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NCL30167
Table 3. ELECTRICAL CHARACTERISTICS (continued)
(For typical values Tj = 25°C, for min/max values Tj = −40°C to +125°C, VCC = 13 V unless otherwise noted)
Characteristics
Test Conditions
Symbol
Min
Typ
Max
Unit
VOVP(off)
VOVP(on)
2.9
2.6
3.0
2.7
3.1
2.8
V
VOVP(hyst)
−
300
−
mV
tOVP
23
33
43
ms
OUTPUT OVER VOLTAGE PROTECTION
Over Voltage Protection Thresholds
VOVP Going Up
VOVP Going Down
Over Voltage Protection Hysteresis
Timer Duration for Over Voltage Detection
Internal OVP Pin Pull-up Current
IOVP(bias)
50
250
450
nA
Under Voltage Detect Threshold
VUVP
0.4
0.5
0.6
V
Under Voltage Detect Propagation Delay
tUVP
23
33
43
ms
mS
LED CURRENT REGULATION LOOP
Error Amplifier Trans-conductance
GEA
85
100
115
Error Amplifier Current Capability
IEA
±13
±25
−
mA
VEAIO
−20
−
20
mV
Error Amplifier Input Offset
Tj = 25°C
Maximum Control Voltage
VCS2 < 0.5 V
VCOMP(max)
4.2
−
−
V
Minimum Control Voltage
VCS2 > 1.5 V
VCOMP(min)
−
−
0.7
V
RCOMP(dis)
−
200
−
W
COMP Pin Discharge Resistance
CURRENT SENSE 1 − INDUCTOR OVER CURRENT LIMITATION
Maximum Internal Current Set-point
VCOMP > 4 V
VILIM
0.95
1.00
1.05
V
Propagation Delay from VIlimit Detection to
Switch Off
VCS1 > 1.2 V
tdelay
−
50
90
ns
Minimum Internal Current Set-point
(Dimming is Detected)
VCOMP < 0.7 V
VILIM_MIN
300
350
400
mV
Propagation Delay from Reduced VIlimit
Detection to DRV Off
VCS1 > 1.2 V
tdelay_DIM
−
50
90
ns
Leading Edge Blanking Duration for VILIM
tLEB
220
320
420
ns
Threshold for Winding Short Fault Protection
Activation
VCS1(stop)
1.42
1.50
1.58
V
Leading Edge Blanking Duration for VCS(stop)
(Note 1)
tBCS
90
120
150
ns
CURRENT SENSE 2 − ZERO CURRENT DETECTION AND LED REGULATION INPUT
Input Pull-up Current
VCS2 = 0.7 V
ICS2(bias)
−
1
−
mA
VREF
233
250
267
mV
Internal Reference for Nominal LED Current
Lower ZCD Threshold
VCS2 Falling
VZCD(falling)
15
50
80
mV
Upper ZCD Threshold
VCS2 Rising
VZCD(rising)
30
65
95
mV
ZCD Comparator Hysteresis
Propagation Delay from ZCD to Turn-on
Internal Switch
VZCD(hyst)
−
15
−
mV
tDEM
400
500
600
ns
VCS2(stop)
4.0
4.5
5.0
V
tZCD(blank)
200
300
400
ns
tZCD(timeout)
20
32
45
ms
VCS2 Falling
Current Sense Threshold for CS2 Pin Open
Protection
Blanking duration for ZCD Detection
ZCD Timeout
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NCL30167
Table 3. ELECTRICAL CHARACTERISTICS (continued)
(For typical values Tj = 25°C, for min/max values Tj = −40°C to +125°C, VCC = 13 V unless otherwise noted)
Characteristics
Test Conditions
Symbol
Min
Typ
Max
Unit
VACCTH_H
VACCTH_L
0.400
0.300
0.450
0.350
0.500
0.400
V
DIMMING DETECTION
Dimming Detection Comparator Thresholds
VACCTH Going Up
VACCTH Going Down
Dimming Detection Comparator Hysteresis
VACCTH_Hyst
−
100
−
mV
VACCTH = VACCTH_H +
0.1 V
tDIM_D
40
70
90
ms
Maximum On Time
VCOMP = 4.2 V
tONmax
15
18
22
ms
On Time
VCOMP = 2.5 V
tON
8.0
9.5
11.0
ms
Minimum On Time
VCOMP = 0.7 V
tONmin
−
0.6
1.2
ms
TF Pin Voltage at which Thermal Fold-back
Starts (VREF is Decreased)
VTF(start)
0.94
1.00
1.06
V
TF Pin Voltage at which Thermal Fold-back
Reduces VREF to 10% VREF
VTF(10%)
0.45
0.5
0.55
V
Dimming Detection Comparator Delay
ON-TIME GENERATOR
THERMAL FOLDBACK
Current Source for Direct NTC Connection
VTF = 0 V
Blanking Duration for TF Detection after
Start-up
VTF < VTF(5%)
ITF
80
85
90
mA
tTF(blank)
250
300
350
ms
TTSD
135
150
165
°C
INTERNAL TEMPERATURE SHUTDOWN
Temperature Shutdown (Note 1)
TJ Going Up
Temperature Shutdown Hysteresis (Note 1)
TJ Going Down
TTSD(HYS)
−
30
−
°C
IDRV = 500 mA,
Tj = 25°C
RL,DS,on
−
3.5
4.5
W
VL,DS,max
30
−
−
V
INTERNAL DRIVING SWITCH
On State Resistance of the Driving NMOS
Maximum Drain to Source Voltage of the
Driving NMOS (Note 1)
Maximum Off State Leakage Current
VDRAIN = 19 V
IDSS
−
−
5
mA
Turn-on Time, 90 to 10 % of VDRV
IDRV = 500 mA
ton
−
10
−
ns
Turn-off Time, 10 to 90 % of VDRV
IDRV = 500 mA
toff
−
30
−
ns
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. Guaranteed by design.
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NCL30167
TYPICAL CHARACTERISTIC
9.5
13.0
VCC(off) (V)
VCC(on) (V)
12.5
12.0
11.5
9.0
8.5
11.0
10.5
8.0
−40
−25
−10
5
20
35
50
65
80
95
110
125
−40
−25
−10
5
Temperature (5C)
20
35
50
65
80
95
110
125
Temperature (5C)
Figure 3. Turn-On Threshold Level, VCC(on)
Figure 4. Minimum Operating Voltage, VCC(off)
15.0
5.5
5.0
ICC1 (mA)
VCC(reset) (V)
13.0
4.5
11.0
9.0
7.0
4.0
5.0
−40
−25
−10
5
20
35
50
65
80
95
110
125
−40
−25
−10
5
Temperature (5C)
Figure 5. VCC Decreasing Level at which the
Internal Logic Resets, VCC(reset)
35
50
65
80
95
110
125
Figure 6. Internal Current Consumption before
Start-Up, ICC1
1.3
1.3
1.1
1.1
ICC3 (mA)
ICC2 (mA)
20
Temperature (5C)
0.9
0.7
0.9
0.7
0.5
0.5
−40
−25
−10
5
20
35
50
65
80
95
110
125
−40
Temperature (5C)
−25
−10
5
20
35
50
65
80
95
110
125
Temperature (5C)
Figure 7. Internal Current Consumption when
DRV Pin is Switching, ICC2
Figure 8. Internal Current Consumption when
DRV Pin is Turned-On, ICC3
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NCL30167
4.0
4.0
3.5
3.5
VOVP(on) (V)
VOVP(off) (V)
TYPICAL CHARACTERISTIC
3.0
2.5
3.0
2.5
2.0
2.0
−40
−25
−10
5
20
35
50
65
80
95
110
125
−40
−25
−10
5
Temperature (5C)
Figure 9. Over-Voltage Protection Threshold
(VOVP Going Up), VOVP(off)
35
50
65
80
95
110
125
Figure 10. Over-Voltage Protection Threshold
(VOVP Going Down), VOVP(on)
300
1.0
280
0.8
VUVP (V)
IOVP(bias) (nA)
20
Temperature (5C)
260
240
220
0.6
0.4
0.2
200
0.0
−40
−25
−10
5
20
35
50
65
80
95
110
125
−40
−25
−10
5
Temperature (5C)
20
35
50
65
80
95
110
125
Temperature (5C)
Figure 11. Internal OVP Pin Pull-Up Current,
IOVP(bias)
Figure 12. Under-Voltage Detect Threshold, VUVP
1.2
400
380
VILIM_MIN (mV)
VILIM (V)
1.1
1.0
0.9
360
340
320
300
0.8
−40
−25
−10
5
20
35
50
65
80
95
110
125
−40
Temperature (5C)
−25
−10
5
20
35
50
65
80
95
110
125
Temperature (5C)
Figure 13. Maximum Internal Current Set-Point,
VILIM
Figure 14. Minimum Internal Current Set-Point,
VILIM_MIN
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NCL30167
1.60
260
1.55
255
VREF (mV)
VCS1(stop) (V)
TYPICAL CHARACTERISTIC
1.50
1.45
250
245
240
1.40
−40
−25
−10
5
20
35
50
65
80
95
110
125
−40
−25
−10
5
Temperature (5C)
35
50
65
80
95
110
125
Figure 16. Internal Reference for Nominal LED
Current, VREF
50.0
1.0
48.0
0.8
VZCD(rising) (mV)
VZCD(falling) (mV)
Figure 15. Threshold for Winding Short Fault
Protection Activation, VCS1(stop)
46.0
44.0
42.0
0.6
0.4
0.2
40.0
0.0
−40
−25
−10
5
20
35
50
65
80
95
110
125
−40
−25
−10
5
Temperature (5C)
20
35
50
65
80
95
110
125
Temperature (5C)
Figure 17. Lower ZCD Threshold, VZCD(falling)
Figure 18. Upper ZCD Threshold, VZCD(rising)
4.60
0.50
4.55
0.48
VACCTH_H (V)
VCS2(stop) (V)
20
Temperature (5C)
4.50
4.45
0.45
0.43
0.40
4.40
−40
−25
−10
5
20
35
50
65
80
95
110
125
−40
Temperature (5C)
−25
−10
5
20
35
50
65
80
95
110
125
Temperature (5C)
Figure 19. Current Sense Threshold for CS2 Pin
Open Protection, VCS2(stop)
Figure 20. Dimming Detection Comparator
Threshold, VACCTH Going Up, VACCTH_H
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NCL30167
0.40
1.20
0.38
1.10
VTF(start) (V)
VACCTH_L (V)
TYPICAL CHARACTERISTIC
0.35
0.33
1.00
0.90
0.80
0.30
−40
−25
−10
5
20
35
50
65
80
95
110
125
−40
−25
−10
5
Temperature (5C)
20
35
50
65
80
95
110
125
Temperature (5C)
Figure 21. Dimming Detection Comparator
Threshold, VACCTH Going Down, VACCTH_L
Figure 22. TF Pin Voltage at which Thermal
Fold-Back Starts, VTF(start)
90.0
0.70
88.0
ITF (mA)
VTF(10%) (V)
0.60
0.50
86.0
84.0
0.40
82.0
0.30
80.0
−40
−25
−10
5
20
35
50
65
80
95
110
125
−40
Temperature (5C)
RL,DS,on (W)
8.0
6.0
4.0
2.0
0.0
−10
5
20
35
50
65
5
20
35
50
65
80
95
110
Figure 24. Current Source for Direct NTC
Connection, ITF
10.0
−25
−10
Temperature (5C)
Figure 23. TF Pin Voltage at which Thermal
Fold-Back Reduces VREF to 10%, VTF(10%)
−40
−25
80
95
110
125
Temperature (5C)
Figure 25. On-State Resistance of the Driving
NMOS, RL,DS,on
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125
NCL30167
TYPICAL CHARACTERISTIC
Figure 26. Typical On-Time of the Internal Driving Switch
Figure 27. Typical Off-Time of the Internal Driving Switch
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NCL30167
APPLICATION INFORMATION
Functional Description
between the DRAIN pin and capacitor CVCC. Thanks to the
cascoded drain architecture, the startup time is very fast
(typ < 100 ms). Unlike a traditional asynchronous boost
architecture, the cascoded architecture uses two MOSFETS.
The low voltage MOSFET MLV_int., which is housed inside
the IC, drives the external High Voltage NMOS MHV_ext via
the DRV pin.
NCL30167 uses a Constant On-time Boost architecture in
order to target a unity power factor, when no dimming is
detected. The cascoded drain architecture shown in
Figure 28, where MHV_ext is the High Voltage Cascode
NMOS, allows a simple implementation of a VCC supply by
including a diode DVCC, external to the switcher IC,
Vin
L1
D1
Iind
ID1
Vout
Rcasc
ICOUT
Cout
ILED
MHV_ext
DZcasc
Ccasc
VCC
DVCC
DRV
CVCC
Int_drv
CS2
IRsense2
Rsense2
MLV_int
CS1
Irsense1
Rsense1
Figure 28. Cascode Architecture
processed then by a circuit block named “Vref processing”,
which provides analog signal Vref. The reference voltage
named Vref serves for the LED current regulation loop.
The LED current regulation loop is working for all
conduction angles, it is then possible by programming the
Vref processing circuit block to get the desired dimming
curve as depicted in Figure 30.
The NCL30167 operates in Critical Conduction Mode
(CrM) under all working conditions, regulating the average
current flowing through the string of LEDs whether the
dimmer is present or not.
The ACC_TH pin senses a scaled down input voltage
(Vin) and by comparing it to an internal reference voltage
named VACC_TH it provides a digital signal DIM/DIMb that
contains the amount of dimming information. DIM/DIMb is
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13
VCCVCCreset
VCCVCCoff
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14
VCCV CS 1(stop)
CS2 open
(V CC>V CCon)*(V OVP>V UVP)*TSD
Running
Const. ON
Time
Running
Const. Peak
Current
(VCOMP >VCton)*( V CS 1 VTF (start)
Thermal
Foldback
(VCOMP VILIM_MIN
VTF VCS1(stop)
4 Consecutive Pulses
Latch
VCC < VCC(reset)
Low Supply
VCC < VCC(off)
10 ms Timer
Device Stops
VCC > VCC(on)
Thermal Fold-back Event
VOTP < VTF(start)
Immediate Reaction
Reduced Output Current,
Thermal Fold−back
VOTP > VTF(start)
Output Overvoltage
VOVP > VOVP(off)
20 ms Timer
Device Stops
VOVP < VOVP(on)
VCC > VCC(on)
Overvoltage Pin Shorted to GND
VOVP < VUVP
Immediate Reaction
Device Stops
VCC < VCC(reset)
Internal TSD
10 ms Timer
Device Stops
(VCC > VCC(on))&TSDb
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19
NCL30167
CS2 ZCD Timeout Protection
CS2 ZCD is not detected. To avoid stopping the device under
this condition the ZCD timeout feature is added. If no ZCD
event is detected until the ZCD timer (tZCD(timeout)) elapses
the internal cascode switch is turned on anyway.
The second CS2 pin has an additional feature. In case of
very low average current is regulated the CS2 voltage can be
too low. The CS2 sensed voltage can be too low so that the
Vin
L1
Vout
D1
Rcasc
Cout
MHV_ext
DZcasc
Ccasc
DRV
VCC
S
Q
R
DVCC
DRV
CVCC
32 ms Timer
ZCD
Timeout
CS2
Int_drv
S
MLV_int
Q
R
VZCD
CS1
Rsense2
Rsense1
Figure 36. CS2 Pin ZCD Timeout Protection − Principal Diagram
Protection Against a Winding Short
Overvoltage Protection
Under some conditions, such as a winding short-circuit of
the boost inductor, the on-time duration is at a minimum
(based on the internal propagation delay of the detector and
LEB duration). In this event, the current sense voltage
increases above VILIM, because the controller is blanked due
to the LEB time and fast current slope. Dangerously high
current can occur in the system if nothing is done to stop the
controller. To avoid this, an additional fast comparator
senses when a voltage on the current sense pin CS1 reaches
VCS1(stop) = 1.5 ⋅ VILIM. If the fast comparator toggles
4 times, the controller immediately enters a protection
mode. See the block diagram at Figure 2 for more details.
An overvoltage condition, for example if the LED string
is open, can be sensed at Vout voltage by the external resistor
divider comprised of Rovp_top and Rovp_bot resistors (see
Figure 37) which is connected to the OVP pin. If the voltage
of the OVP pin exceeds the VOVP(off) reference voltage, the
OVP fault state goes high and the switching regulator stops
switching. When the voltage at OVP pin drops below the
VOVP(on) the device starts switching again. In addition the
OVP input also has under-voltage protection (UVP) to
ensure the resistor divider is properly connected. If the
voltage at OVP pin is below the VUVP threshold the device
stops.
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20
NCL30167
IOVP(bias)
Vdd
Vout
OVP_CMP
ROVP_top
−
20 ms
Filter
OVP
UVP_CMP
−
UVPstop
0.5 V
+
VUVP
ROVP_bot
OVP
3.0 V
VOVP
+
Figure 37. Overvoltage Protection Circuit
Thermal Fold-Back
The thermal fold-back circuit reduces the current
supplying to the LED string if the temperature monitored by
an external NTC resistor is too high.
The current is reduced down to 0% of its nominal value.
The thermal fold-back starting temperature depends on the
NTC resistor value selected by the power supply designer.
The TF pin allows the direct connection of an NTC. When
the TF pin voltage VTF drops below VTF(start), the internal
reference for the constant current control VREF is decreased
proportionally to VTF. When VTF reaches VTF(10%), VREF is
set to VREF10, corresponding to 10% of the required output
current. If VTF drops below VTF(10%) the switching
regulator still reduces the VREF. If VREF drops below the 5%
of its required value then the switching regulator enters the
stop mode.
The thermal fold-back and OTP thresholds correspond
roughly to the following resistances:
• Thermal fold-back starts when RNTC ≤ 11.76 kW.
• Thermal fold-back sets the 10% of VREF when
RNTC ≤ 5.88 kW.
Iout
Iout(nom)
10% Iout(nom)
0
VTF(10%)
VTF(start)
Figure 38. Output Current Reduction vs. TF Pin Voltage
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21
VTF
NCL30167
At startup, when VCC reaches VCC(on), the TF pin sensing
is blanked for at least 300 ms in order to allow the TF pin
voltage to reach its nominal value if a filtering capacitor is
connected to the TF pin. This is to avoid flickering of the
LED light in case of over temperature or noise coupled to TF
pin. The maximum value of OTP pin capacitor is given by
the following formula (The standard start-up condition is
considered and the NTC current is neglected):
C TF
max
+
+
t TF(blank)min @ I TF
min
(eq. 6)
V TF(start)max
200 @ 10 *6 @ 80 @ 10 *6
F + 15.1 nF
1.06
Vdd
Vref
ITF
VTF(start)
−
TF
OA
Vref(TF) = KTF ⋅ Vref
1.0 V
Multiplier
RNTC
RTF
CTF
+
Figure 39. Thermal Fold-Back Circuitry
Vref vs. Temperature
100
Vref (%)
80
60
40
20
0
80
90
100
110
120
130
140
150
160
170
180
Temperature (5C)
Figure 40. Typical Thermal Fold-Back Characteristics when the 330 kW NTC and 39 kW Parallel Resistor
are Connected to TF Pin
Temperature Shutdown
instantaneously, and goes to the stop mode with low power
consumption. Specific blocks are still powered from the
VCC supply to keep the TSD information. When the
temperature falls below the low threshold, the device
restarts. See the status diagrams at the Figure 29.
The NCL30167 includes a temperature shutdown
protection with a trip point typically at 150°C and the typical
hysteresis of 30°C. When the temperature rises above the
high threshold, the switcher stops switching
The product described herein (NCL30167) may be covered by one or more of U. S. patents.
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22
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOIC−10 NB
CASE 751BQ
ISSUE B
10
1
SCALE 1:1
DATE 26 NOV 2013
2X
0.10 C A-B
D
D
A
2X
F
0.10 C A-B
10
6
H
E
1
5
0.20 C
10X
B
2X 5 TIPS
L2
b
0.25
A3
L
DETAIL A
M
C
SEATING
PLANE
C A-B D
TOP VIEW
10X
h
0.10 C
0.10 C
X 45 _
M
A
e
A1
C
SIDE VIEW
SEATING
PLANE
DETAIL A
END VIEW
DIM
A
A1
A3
b
D
E
e
H
h
L
L2
M
10
1.00
PITCH
1
6.50
10X 1.18
1
DIMENSION: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON52341E
SOIC−10 NB
MILLIMETERS
MIN
MAX
1.25
1.75
0.10
0.25
0.17
0.25
0.31
0.51
4.80
5.00
3.80
4.00
1.00 BSC
5.80
6.20
0.37 REF
0.40
0.80
0.25 BSC
0_
8_
GENERIC
MARKING DIAGRAM*
RECOMMENDED
SOLDERING FOOTPRINT*
10X 0.58
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.10mm TOTAL IN EXCESS OF ’b’
AT MAXIMUM MATERIAL CONDITION.
4. DIMENSIONS D AND E DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS. MOLD FLASH, PROTRUSIONS, OR
GATE BURRS SHALL NOT EXCEED 0.15mm
PER SIDE. DIMENSIONS D AND E ARE DETERMINED AT DATUM F.
5. DIMENSIONS A AND B ARE TO BE DETERMINED AT DATUM F.
6. A1 IS DEFINED AS THE VERTICAL DISTANCE
FROM THE SEATING PLANE TO THE LOWEST
POINT ON THE PACKAGE BODY.
XXXXX
ALYWX
G
XXXXX = Specific Device Code
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb−Free Package
*This information is generic. Please refer
to device data sheet for actual part
marking. Pb−Free indicator, “G”, may
or not be present.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
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