NDS9936

February 1996 NDS9936 Dual N-Channel Enhancement Mode Field Effect Transistor General Description Features These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance. These devices are particularly suited for low voltage applications such as DC/DC conversion, disk drive motor control, and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed. 5A, 30V. RDS(ON) = 0.05Ω @ VGS = 10V. High density cell design for extremely low RDS(ON). High power and current handling capability in a widely used surface mount package. Dual MOSFET in surface mount package. ________________________________________________________________________________ 5 4 6 3 7 2 8 1 Absolute Maximum Ratings T A = 25°C unless otherwise noted Symbol Parameter VDSS Drain-Source Voltage VGSS Gate-Source Voltage ID Drain Current - Continuous @ TA = 25°C - Continuous @ TA = 70°C - Pulsed PD 30 V ± 20 V ± 5.0 A (Note 1a) ± 4.0 @ TA = 25°C ± 40 2 (Note 1a) 1.6 (Note 1b) 1 (Note 1c) TJ,TSTG Units (Note 1a) Power Dissipation for Dual Operation Power Dissipation for Single Operation NDS9936 Operating and Storage Temperature Range W 0.9 -55 to 150 °C THERMAL CHARACTERISTICS RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W RθJC Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W © 1997 Fairchild Semiconductor Corporation NDS9936.SAM Electrical Characteristics (TA = 25°C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units 2 µA OFF CHARACTERISTICS BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V 30 V 20 µA IGSSF Gate - Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA IGSSR Gate - Body Leakage, Reverse VGS = -20 V, VDS= 0 V -100 nA 3 V TJ= 55°C ON CHARACTERISTICS (Note 2) VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA RDS(ON) Static Drain-Source On-Resistance VGS = 10 V, ID = 5 A 1 TJ=125°C 0.7 TJ=125°C VGS = 4.5 V, ID = 3.9 A TJ=125°C ID(on) gFS On-State Drain Current Forward Transconductance VGS = 10 V, VDS = 10 V 40 VGS = 4.5 V, VDS = 10 V 20 VDS = 10 V, ID = 3.5 A 3 1.4 1.1 2.2 0.044 0.05 0.066 0.1 0.066 0.08 0.099 0.16 Ω A 8 S DYNAMIC CHARACTERISTICS Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = 15 V, VGS = 0 V, f = 1.0 MHz 525 pF 315 pF 185 pF SWITCHING CHARACTERISTICS (Note 2) tD(ON) Turn - On Delay Time tr Turn - On Rise Time tD(OFF) Turn - Off Delay Time tf Turn - Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge © 1993 Fairchild Semiconductor Corporation VDD = 15 V, ID = 1 A, VGS = 10 V, RGEN = 6 Ω VDS = 15 V, ID = 5 A, VGS = 10 V 12 30 ns 10 25 ns 25 50 ns 10 50 ns 17 35 nC 1.5 nC 3.7 nC NDS9936.SAM Electrical Characteristics (TA = 25°C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS Maximum Continuos Drain-Source Diode Forward Current VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 1.7 A trr Reverse Recovery Time VGS = 0V, IF = 5 A, dIF/dt = 100 A/µs (Note 2) 1.7 A 0.78 1.2 V 70 160 ns Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. PD (t ) = T J−TA R θJ A(t ) = T J−TA R θJ C+RθCA(t ) = I 2D (t ) × RDS(ON ) TJ Typical RθJA for single device operation using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment: a. 78oC/W when mounted on a 0.5 in2 pad of 2oz copper. b. 125oC/W when mounted on a 0.02 in2 pad of 2oz copper. c. 135oC/W when mounted on a 0.003 in2 pad of 2oz copper. 1a 1b 1c Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%. NDS9936.SAM Typical Electrical Characteristics 2 6.0 5.0 4.5 4.0 12 R DS(on) , NORMALIZED I D , DRAIN-SOURCE CURRENT (A) VGS =10V 3.5 3.0 6 2.5 0 0 1 2 V DS , DRAIN-SOURCE VOLTAGE (V) DRAIN-SOURCE ON-RESISTANCE 18 1.6 Figure 1. On-Region Characteristics. 4.0 4.5 1.4 5.0 1.2 6.0 10 1 0.8 3 VGS = 3.5V 1.8 0 2.5 R DS(ON) , NORMALIZED 1.2 1 0.8 DRAIN-SOURCE ON-RESISTANCE R DS(ON) , NORMALIZED DRAIN-SOURCE ON-RESISTANCE V GS = 10V 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (°C) 125 V DS = 15V V GS = 4.5 V 10V 1.5 4 .5V 10V 1 4 .5V TJ = -55°C 25 125 Vth , NORMALIZED 6 4 2 1.5 2 2.5 3 V GS , GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 0 2 4 6 I D , DRAIN CURRENT (A) 8 10 Figure 4. On-Resistance Variation with Drain Current and Temperature. 8 ID , DRAIN CURRENT (A) -55 2 0.5 150 3.5 4 GATE-SOURCE THRESHOLD VOLTAGE 10 1 10 10V -25 Figure 3. On-Resistance Variation with Temperature. 0 8 T (°C) 125 J 25 I D = 5A 0.6 -50 4 6 I D , DRAIN CURRENT (A) Figure 2. On-Resistance Variation with Gate Voltage and Drain Current. 1.6 1.4 2 1.2 V DS = V GS I D = 250µA 1.1 1 0.9 0.8 0.7 0.6 -50 -25 0 25 50 75 100 125 150 T J , JUNCTION TEMPERATURE (°C) Figure 6. Gate Threshold Variation with Temperature. NDS9936.SAM 1.15 10 I D = 250µA 5 1.1 IS , REVERSE DRAIN CURRENT (A) BV DSS , NORMALIZED DRAIN-SOURCE BREAKDOWN VOLTAGE Typical Electrical Characteristics (continued) 1.05 1 0.95 0.9 -50 -25 0 25 50 75 100 125 0.5 25°C 0.2 -55°C 0.1 0.05 0.02 0.4 0.6 1 1.2 10 I D = 5A VGS , GATE-SOURCE VOLTAGE (V) 1000 C iss 500 300 C oss f = 1 MHz V GS = 0V 0.2 C rss 0.5 1 2 5 10 20 30 V DS = 15V 8 6 4 2 0 0 2 4 VDS , DRAIN TO SOURCE VOLTAGE (V) 10 t on t d(on) RL 12 14 tr t d(off) tf 90% V OUT VO U T 10% 10% INVERTED DUT G 16 t off 90% D R GEN 8 Figure 10. Gate Charge Characteristics. VDD V IN 6 Q g , GATE CHARGE (nC) Figure 9. Capacitance Characteristics. VGS 0.8 Figure 8. Body Diode Forward Voltage Variation with Current and Temperature. 1500 CAPACITANCE (pF) TJ = 125°C 1 V SD , BODY DIODE FORWARD VOLTAGE (V) Figure 7. Breakdown Voltage Variation with Temperature. 100 0.1 2 0.01 0.2 150 TJ , JUNCTION TEMPERATURE (°C) 200 V GS = 0V 90% S V IN 50% 50% 10% PULSE W IDTH Figure 11. Switching Test Circuit. Figure 12. Switching Waveforms. NDS9936.SAM Typical Electrical Characteristics (continued) 30 T J = -55°C 10 1ms 10 I D , DRAIN CURRENT (A) 10m 25°C 8 6 125°C 4 2 3 100m 1 0.3 s s 10s VGS = 10V 0.1 SINGLE PULSE T A = 25°C 0.03 V DS = 1 0 V g FS , TRANSCONDUCTANCE (SIEMENS) 12 0 0 2 4 6 8 10 0.01 1 2 I D , DRAIN CURRENT (A) 3 5 10 20 30 VDS , DRAIN-SOURCE VOLTAGE (V) Figure 14. Maximum Safe Operating Area. Figure 13. Transconductance Variation with Drain Current and Temperature. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 0 .5 D = 0.5 0 .2 0.2 0 .1 0 .0 5 0 .0 2 R JA (t) = r(t) * R JA θ θ R JA = See Note 1c θ 0.1 0.05 P(pk) 0.02 0.01 0 .0 1 t1 Single Pulse 0 .0 0 5 = P * R JA (t) θ Duty Cycle, D = t 1 / t 2 A 0 .0 0 2 0 .0 0 1 0 .0001 t2 TJ - T 0 .001 0 .0 1 0 .1 1 10 100 300 t 1 , TIME (sec) Figure 15. Transient Thermal Response Curve. Note: Thermal characterization performed using the conditions described in note 1c. Transient thermal response will change depending on the circuit board design. NDS9936.SAM TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. HiSeC™ ISOPLANAR™ MICROWIRE™ POP™ PowerTrench  QFET™ QS™ Quiet Series™ SuperSOT™-3 SuperSOT™-6 ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ E2CMOSTM FACT™ FACT Quiet Series™ FAST FASTr™ GTO™ SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. E