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www.onsemi.com
onsemi and and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or
subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi
product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without
notice. The information herein is provided “as-is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality,
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regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/
or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application
by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized
for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for
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Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. Other names and brands may be claimed as the property of others.
D-Type Flip-Flop with
Asynchronous Clear
NL17SZ175
The NL17SZ175 is a single, positive edge triggered, D−type CMOS
Flip−Flop with Asynchronous Clear operating from a 1.65 V to 5.5 V
supply.
www.onsemi.com
Features
•
•
•
•
•
•
•
•
Designed for 1.65 V to 5.5 V VCC Operation
2.6 ns tPD at VCC = 5 V (Typ)
Inputs/Outputs Overvoltage Tolerant up to 5.5 V
IOFF Supports Partial Power Down Protection
Sink 32 mA at 4.5 V
Available in SC−88, SC−74 and UDFN6 Packages
Chip Complexity < 100 FETs
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
MARKING
DIAGRAMS
6
SC−88
CASE 419B−02
1
XXXM G
G
1
SC−74
CASE 318F−05
6
XXX MG
G
1
IEEC / IEC
C
CP
D
1
Q
Figure 1. Logic Symbol
UDFN6
1.45 x 1.0
CASE 517AQ
UDFN6
1.0 x 1.0
CASE 517BX
X, XXX
M
W
G
XM
XM
1
= Specific Device Code
= Date Code*
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 7 of this data sheet.
© Semiconductor Components Industries, LLC, 2019
February, 2021 − Rev. 1
1
Publication Order Number:
NL17SZ175/D
NL17SZ175
Connection Diagrams
CP
1
GND
2
CP
D
C
5
VCC
CP 1
C
D
6
GND 2
Q
3
4
Q
4 Q
Figure 3. UDFN6(Top Through View)
PIN DESCRIPTIONS
D
5 VCC
D 3
Figure 2. SC−88/SC−74 (Top View)
Pin Name
6 C
FUNCTION TABLE
Description
Inputs
Data Input
D
C
Q
Clock Pulse Input
L
H
L
C
Clear Input
H
H
H
Q
Flip−Flop Output
X
H
Qn
X
L
L
CP
CP
Output
X
H = HIGH Logic Level
L = LOW Logic Level
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2
Qn = No Change in Data
X = Immaterial
NL17SZ175
MAXIMUM RATINGS
Symbol
Value
Unit
VCC
DC Supply Voltage
−0.5 to +6.5
V
VIN
DC Input Voltage
−0.5 to +6.5
V
−0.5 to VCC + 0.5
−0.5 to +6.5
−0.5 to +6.5
V
VIN < GND
−50
mA
VOUT < GND
−50
mA
VOUT
Characteristics
DC Output Voltage
Active−Mode (High or Low State)
Tri−State Mode (Note 1)
Power−Down Mode (VCC = 0 V)
IIK
DC Input Diode Current
IOK
DC Output Diode Current
IOUT
DC Output Source/Sink Current
±50
mA
DC Supply Current per Supply Pin or Ground Pin
±100
mA
ICC or IGND
TSTG
−65 to +150
°C
TL
Storage Temperature Range
Lead Temperature, 1 mm from Case for 10 secs
260
°C
TJ
Junction Temperature Under Bias
+150
°C
qJA
Thermal Resistance (Note 2)
SC−88
SC−74
UDFN6
377
320
154
°C/W
PD
Power Dissipation in Still Air
SC−88
SC−74
UDFN6
332
390
812
mW
Level 1
−
MSL
Moisture Sensitivity
FR
Flammability Rating
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
−
ESD Withstand Voltage (Note 3)
Human Body Model
Charged Device Model
2000
1000
V
$100
mA
VESD
ILatchup
Latchup Performance (Note 4)
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Applicable to devices with outputs that may be tri−stated.
2. Measured with minimum pad spacing on an FR4 board, using 10mm−by−1inch, 2 ounce copper trace no air flow per JESD51−7.
3. HBM tested to ANSI/ESDA/JEDEC JS−001−2017. CDM tested to EIA/JESD22−C101−F. JEDEC recommends that ESD qualification to
EIA/JESD22−A115−A (Machine Model) be discontinued per JEDEC/JEP172A.
4. Tested to EIA/JESD78 Class II.
RECOMMENDED OPERATING CONDITIONS
Symbol
Characteristics
VCC
Positive DC Supply Voltage
VIN
DC Input Voltage
VOUT
TA
tr , tf
DC Output Voltage
Active−Mode (High or Low State)
Tri−State Mode (Note 1)
Power−Down Mode (VCC = 0 V)
Operating Temperature Range
Input Rise and Fall Time
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
Min
Max
Unit
1.65
5.5
V
0
5.5
V
0
0
0
VCC
5.5
5.5
−55
+125
°C
0
0
0
0
20
20
10
5
ns
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
www.onsemi.com
3
NL17SZ175
DC ELECTRICAL CHARACTERISTICS
Symbol
VIH
VIL
TA = 255C
−555C 3 TA 3 1255C
VCC
(V)
Min
Typ
Max
Min
Max
Units
High−Level Input
Voltage
1.65 to 1.95
0.65 VCC
−
−
0.65 VCC
−
V
2.3 to 5.5
0.70 VCC
−
−
0.70 VCC
−
Low−Level Input
Voltage
1.65 to 1.95
−
−
0.35 VCC
−
0.35 VCC
2.3 to 5.5
−
−
0.30 VCC
−
0.30 VCC
Parameter
Condition
V
VOH
High−Level Output
Voltage
VIN = VIH or VIL
IOH = −100 mA
IOH = −4 mA
IOH = −8 mA
IOH = −16 mA
IOH = −24 mA
IOH = −32 mA
1.65 to 5.5
1.65
2.3
3
3
4.5
VCC − 0.1
1.29
1.9
2.4
2.3
3.8
VCC
1.52
2.1
2.7
2.5
4
−
−
−
−
−
−
VCC − 0.1
1.29
1.9
2.4
2.3
3.8
−
−
−
−
−
−
VOL
Low−Level Output
Voltage
VIN = VIH or VIL
IOH = 100 mA
IOH = 4 mA
IOH = 8 mA
IOH = 16 mA
IOH = 24 mA
IOH = 32 mA
1.65 to 5.5
1.65
2.3
3
3
4.5
−
−
−
−
−
−
−
0.08
0.12
0.24
0.26
0.31
0.1
0.24
0.3
0.4
0.55
0.55
−
−
−
−
−
−
0.1
0.24
0.3
0.4
0.55
0.55
Input Leakage Current
VIN = 5.5 V or GND
1.65 to 5.5
−
−
±0.1
−
±1.0
mA
IOFF
Power Off Leakage
Current
VIN = 5.5 V or
VOUT = 5.5 V
0
−
−
1.0
−
10
mA
ICC
Quiescent Supply
Current
VIN = VCC or GND
5.5
−
−
1.0
−
10
mA
IIN
V
V
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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4
NL17SZ175
AC ELECTRICAL CHARACTERISTICS
TA = +25°C
Symbol
fMAX
tPLH, tPHL
Parameter
Maximum Clock Frequency
(Figure 4, 5)
Propagation Delay, CP to Q
(Figure 4, 5)
Conditions
Min
Typ
Max
Min
Max
Unit
1.65
CL = 50 pF,
RL = 500 W
−
−
−
100
−
MHz
−
−
−
100
−
2.3 to 2.7
−
−
−
125
−
3.0 to 3.6
−
−
−
150
−
4.5 to 5.5
−
−
−
175
−
−
9.8
15.0
−
16.5
−
6.5
10.0
−
11.0
2.3 to 2.7
−
3.8
6.5
−
7.0
3.0 to 3.6
−
2.8
4.5
−
5.0
1.8
CL = 15 pF,
RL = 1 MW
1.65
1.8
4.5 to 5.5
−
2.2
3.5
−
3.8
CL = 50 pF,
RL = 500 W
−
3.4
5.5
−
6.2
−
2.6
4.0
−
4.7
CL = 15 pF,
RL = 1 MW
−
9.8
13.5
−
15.0
−
6.5
9.0
−
10.0
2.3 to 2.7
−
3.8
6.0
−
6.4
3.0 to 3.6
−
2.8
4.3
−
4.6
4.5 to 5.5
−
2.2
3.2
−
3.5
CL = 50 pF,
RL = 500 W
−
3.4
5.3
−
5.8
−
2.7
4.0
−
4.5
CL = 50 pF,
RL = 500 W
−
−
−
2.5
−
−
−
−
2.0
−
−
−
−
1.5
−
−
−
−
1.5
−
−
−
−
1.5
−
−
−
−
1.5
−
−
−
−
3.0
−
−
−
−
2.8
−
3.0 to 3.6
4.5 to 5.5
tPHL
Propagation Delay, C to Q
(Figure 4, 5)
1.65
1.8
3.0 to 3.6
4.5 to 5.5
tS
Setup Time, CP to D
(Figure 4, 5)
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
tH
Hold Time, CP to D
(Figure 4, 5)
2.3 to 2.7
3.0 to 3.6
CL = 50 pF,
RL = 500 W
4.5 to 5.5
tW
Pulse Width, CP
(Figure 4, 5)
2.3 to 2.7
3.0 to 3.6
CL = 50 pF,
RL = 500 W
4.5 to 5.5
Pulse Width, C
(Figure 4, 5)
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
trec
Recovery Time, C to CP
(Figure 4, 5)
TA = −40 to +85°C
VCC (V)
2.3 to 2.7
3.0 to 3.6
−
−
−
2.5
−
Clock HIGH
or LOW
CL = 50 pF,
RL = 500 W
−
−
−
3.0
−
−
−
−
2.8
−
−
−
−
2.5
−
CL = 50 pF,
RL = 500 W
−
−
−
1.0
−
−
−
−
1.0
−
−
−
−
1.0
−
4.5 to 5.5
www.onsemi.com
5
ns
ns
ns
ns
ns
ns
ns
NL17SZ175
CAPACITIVE CHARACTERISTICS
Symbol
CIN
Parameter
Condition
Typical
Units
Input Capacitance
VCC = 5.5 V, VIN = 0 V or VCC
2.5
pF
COUT
Output Capacitance
VCC = 5.5 V, VIN = 0 V or VCC
4.0
pF
CPD
Power Dissipation Capacitance
(Note 5)
10 MHz, VCC = 5.5 V, VIN = 0 V or VCC
4.0
pF
5. CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD) at
no output loading and operating at 50% duty cycle. CPD is related to ICCD dynamic operating current by the expression:
ICCD = (CPD) (VCC) (fIN) + (ICCstatic).
OPEN
2 x VCC
Test
Switch
Position
tPLH / tPHL
Open
tPLZ / tPZL
2 x VCC
50
500
500
tPHZ / tPZH
GND
50
500
500
GND
R1
OUTPUT
DUT
RT
RL
CL, pF
RL, W
See AC Characteristics Table
X = Don’t Care
CL *
CL includes probe and jig capacitance
RT is ZOUT of pulse generator (typically 50 W)
f = 1 MHz
Figure 4. Test Circuit
Figure 5. Switching Waveforms
Vmo, V
VCC, V
Vmi, V
tPLH, tPHL
tPZL, tPLZ, tPZH, tPHZ
VY, V
1.65 to 1.95
VCC / 2
VCC / 2
VCC / 2
0.15
2.3 to 2.7
VCC / 2
VCC / 2
VCC / 2
0.15
3.0 to 3.6
VCC / 2
VCC / 2
VCC / 2
0.3
4.5 to 5.5
VCC / 2
VCC / 2
VCC / 2
0.3
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6
R1 , W
NL17SZ175
DEVICE ORDERING INFORMATION
Packages
Specific Device Code
Pin 1 Orientation
(See below)
Shipping†
NL17SZ175DFT2G
(In Development)
SC−88
TBD
Q4
3000 / Tape & Reel
NL17SZ175DBVT1G
SC−74
AT
Q4
3000 / Tape & Reel
NL17SZ175MU1TCG
(In Development)
UDFN6, 1.45 x 1.0, 0.5P
TBD
Q4
3000 / Tape & Reel
NL17SZ175MU3TCG
(In Development)
UDFN6, 1.0 x 1.0, 0.35P
TBD
Q4
3000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Pin 1 Orientation in Tape and Reel
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7
NL17SZ175
PACKAGE DIMENSIONS
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE Y
2X
aaa H D
D
H
A
D
6
5
GAGE
PLANE
4
1
2
L
L2
E1
E
DETAIL A
3
aaa C
2X
bbb H D
2X 3 TIPS
e
B
6X
b
ddd
TOP VIEW
C A-B D
M
A2
DETAIL A
A
6X
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF
THE PLASTIC BODY AND DATUM H.
5. DATUMS A AND B ARE DETERMINED AT DATUM H.
6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE
LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.
7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDITION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OF THE FOOT.
ccc C
A1
SIDE VIEW
C
SEATING
PLANE
END VIEW
c
RECOMMENDED
SOLDERING FOOTPRINT*
6X
0.30
6X
0.66
2.50
0.65
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
8
DIM
A
A1
A2
b
C
D
E
E1
e
L
L2
aaa
bbb
ccc
ddd
MILLIMETERS
MIN
NOM MAX
−−−
−−−
1.10
0.00
−−−
0.10
0.70
0.90
1.00
0.15
0.20
0.25
0.08
0.15
0.22
1.80
2.00
2.20
2.00
2.10
2.20
1.15
1.25
1.35
0.65 BSC
0.26
0.36
0.46
0.15 BSC
0.15
0.30
0.10
0.10
INCHES
NOM MAX
−−− 0.043
−−− 0.004
0.035 0.039
0.008 0.010
0.006 0.009
0.078 0.086
0.082 0.086
0.049 0.053
0.026 BSC
0.010 0.014 0.018
0.006 BSC
0.006
0.012
0.004
0.004
MIN
−−−
0.000
0.027
0.006
0.003
0.070
0.078
0.045
NL17SZ175
PACKAGE DIMENSIONS
SC−74
CASE 318F−05
ISSUE N
D
6
HE
1
5
4
2
3
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
4. 318F−01, −02, −03, −04 OBSOLETE. NEW STANDARD 318F−05.
E
b
e
0.05 (0.002)
q
c
A
L
A1
DIM
A
A1
b
c
D
E
e
L
HE
q
MIN
0.90
0.01
0.25
0.10
2.90
1.30
0.85
0.20
2.50
0°
MILLIMETERS
NOM
MAX
1.00
1.10
0.06
0.10
0.37
0.50
0.18
0.26
3.00
3.10
1.50
1.70
0.95
1.05
0.40
0.60
2.75
3.00
10°
−
MIN
0.035
0.001
0.010
0.004
0.114
0.051
0.034
0.008
0.099
0°
INCHES
NOM
0.039
0.002
0.015
0.007
0.118
0.059
0.037
0.016
0.108
−
MAX
0.043
0.004
0.020
0.010
0.122
0.067
0.041
0.024
0.118
10°
SOLDERING FOOTPRINT*
2.4
0.094
0.95
0.037
1.9
0.074
0.95
0.037
0.7
0.028
1.0
0.039
SCALE 10:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
STYLE 1:
PIN 1. CATHODE
2. ANODE
3. CATHODE
4. CATHODE
5. ANODE
6. CATHODE
STYLE 2:
PIN 1. NO CONNECTION
2. COLLECTOR
3. EMITTER
4. NO CONNECTION
5. COLLECTOR
6. BASE
STYLE 3:
PIN 1. EMITTER 1
2. BASE 1
3. COLLECTOR 2
4. EMITTER 2
5. BASE 2
6. COLLECTOR 1
STYLE 4:
PIN 1. COLLECTOR 2
2. EMITTER 1/EMITTER 2
3. COLLECTOR 1
4. EMITTER 3
5. BASE 1/BASE 2/COLLECTOR 3
6. BASE 3
STYLE 5:
PIN 1. CHANNEL 1
2. ANODE
3. CHANNEL 2
4. CHANNEL 3
5. CATHODE
6. CHANNEL 4
STYLE 7:
PIN 1. SOURCE 1
2. GATE 1
3. DRAIN 2
4. SOURCE 2
5. GATE 2
6. DRAIN 1
STYLE 8:
PIN 1. EMITTER 1
2. BASE 2
3. COLLECTOR 2
4. EMITTER 2
5. BASE 1
6. COLLECTOR 1
STYLE 9:
PIN 1. EMITTER 2
2. BASE 2
3. COLLECTOR 1
4. EMITTER 1
5. BASE 1
6. COLLECTOR 2
STYLE 10:
PIN 1. ANODE/CATHODE
2. BASE
3. EMITTER
4. COLLECTOR
5. ANODE
6. CATHODE
STYLE 11:
PIN 1. EMITTER
2. BASE
3. ANODE/CATHODE
4. ANODE
5. CATHODE
6. COLLECTOR
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9
STYLE 6:
PIN 1. CATHODE
2. ANODE
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
NL17SZ175
PACKAGE DIMENSIONS
UDFN6, 1.45x1.0, 0.5P
CASE 517AQ
ISSUE O
A
B
D
PIN ONE
REFERENCE
0.10 C
L1
ÉÉÉ
ÉÉÉ
ÉÉÉ
DETAIL A
E
OPTIONAL
CONSTRUCTIONS
DETAIL B
A1
SIDE VIEW
MOLD CMPD
OPTIONAL
CONSTRUCTIONS
A
0.05 C
DIM
A
A1
A2
b
D
E
e
L
L1
DETAIL B
0.05 C
6X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30 mm FROM THE TERMINAL TIP.
ÉÉ
ÉÉ
EXPOSED Cu
TOP VIEW
0.10 C
L
L
MOUNTING FOOTPRINT
A2
C
SEATING
PLANE
6X
0.30
PACKAGE
OUTLINE
e
6X
L
1.24
3
1
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.07 REF
0.20
0.30
1.45 BSC
1.00 BSC
0.50 BSC
0.30
0.40
−−−
0.15
DETAIL A
6X
0.53
6
4
BOTTOM VIEW
6X
b
0.10 C A B
0.05 C
NOTE 3
1
0.50
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
10
NL17SZ175
PACKAGE DIMENSIONS
UDFN6, 1x1, 0.35P
CASE 517BX
ISSUE O
PIN ONE
REFERENCE
2X
0.10 C
2X
ÉÉÉ
ÉÉÉ
ÉÉÉ
0.10 C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.20 MM FROM TERMINAL TIP.
4. PACKAGE DIMENSIONS EXCLUSIVE OF
BURRS AND MOLD FLASH.
A B
D
E
DIM
A
A1
A3
b
D
E
e
L
L1
TOP VIEW
A3
0.05 C
A
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.13 REF
0.12
0.22
1.00 BSC
1.00 BSC
0.35 BSC
0.25
0.35
0.30
0.40
0.05 C
SIDE VIEW
A1
C
RECOMMENDED
SOLDERING FOOTPRINT*
SEATING
PLANE
5X
e
5X
0.48
L
6X
0.22
3
1
L1
1.18
6
4
BOTTOM VIEW
6X
b
0.10
M
C A B
0.05
M
C
0.53
1
PKG
OUTLINE
NOTE 3
0.35
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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