NLAS4717
Analog Switch, High
Bandwidth, Dual SPDT
The NLAS4717 is an advanced CMOS analog switch fabricated in
sub-micron silicon gate CMOS technology. The device is a dual
independent Single Pole Double Throw (SPDT) switch featuring two
low RDS(on) of 4.5 at 3.0 V.
The device also features guaranteed Break-Before-Make (BBM)
switching, assuring the switches never short the driver.
The NLAS4717 is available in two small size packages:
♦Micro10:
3.0 x 5.0 mm
♦Flip-Chip-10:
2.0 x 1.5 mm
Features
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MARKING
DIAGRAMS
A1
•Low RDS(on): 4.5 @ 3.0 V
•Matching Between the Switches ±0.5
•Wide Low Voltage Range: 1.8 V to 5.5 V
•High Bandwidth > 40 MHz
•1.65 V to 5.5 V Operating Range
•Low Threshold Voltages on Pins 4 and 8 (CTRL Pins)
•Ultra-Low Charge Injection ≤ 6.0 pC
•Low Standby Current – ICC = 1.0 nA (Max) @ TA = 25°C
•OVT* on Pins 4 and 8 (CTRL Logic Pins)
•Pb-Free Packages are Available
FLIP-CHIP-10
CASE 489AA
A1
4717
AYWWG
G
10
4717
AYWG
G
Micro10
CASE 846B
A
Y
W, WW
G
Typical Applications
•Cell Phones
•PDAs
•MP3s
•Digital Still Cameras
1
= Assembly Location
= Year
= Work Week
= Pb-Free Package
FUNCTION TABLE
Important Information
IN_
NO_
NC_
0
1
OFF
ON
ON
OFF
•ESD Protection:
ORDERING INFORMATION
HBM = 2000 V, MM = 200 V
•Latchup Max Rating: 200 mA (Per JEDEC EIA/JESD78)
•Pin-to-Pin Compatible with MAX4717
Package
Shipping†
Flip-Chip-10
3000 /
Tape & Reel
NLAS4717FCT1G Flip-Chip-10
(Pb-Free)
3000 /
Tape & Reel
NLAS4717MR2
Micro10
4000 /
Tape & Reel
Micro10
(Pb-Free)
4000 /
Tape & Reel
Device
NLAS4717FCT1
*OVT
•Overvoltage Tolerance (OVT) specific pins to operate higher than
normal supply voltages, with no damage to the devices or to signal
integrity.
NLAS4717MR2G
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2007
May, 2007 - Rev. 9
1
Publication Order Number:
NLAS4717/D
NLAS4717
GND
VCC
1
10
NO2
NO1
2
9
COM2
COM1
3
8
IN2
IN1
NC1
4
7
5
6
B1
NC1
C1
A1
NC2
IN1
C2
A2
IN2
COM1
C3
A3
COM2
NO1
C4
A4
NO2
NC2
B4
GND
VCC
Flip-Chip-10
(Top View)
Micro10
(Top View)
Figure 1. Device Circuit Diagrams and Pin Configurations
MAXIMUM RATINGS
Symbol
Parameter
V+
Positive DC Supply Voltage
Value
Unit
*0.5 to )7.0
V
*0.5 v VIS v VCC )0.5
V
*0.5 v VI v)7.0
V
VIS
Analog Input Voltage (VNO, VNC, or VCOM) (Note 1)
VIN
Digital Select Input Voltage
IIK
DC Current, Into or Out of Any Pin (Continuous)
$100
mA
IPK
Peak Current (10% Duty Cycle)
$200
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Signal voltage on NC, NO, and COM exceeding VCC or GND are clamped by the internal diodes. Limit forward diode current to maximum
current rating.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
1.8
5.5
V
V+
DC Supply Voltage
VIN
Digital Select Input Voltage
GND
5.5
V
VIS
Analog Input Voltage (NC, NO, COM)
GND
VCC
V
TA
Operating Temperature Range
-40
+85
°C
tr, tf
Input Rise or Fall Time, SELECT
0
0
100
20
ns/V
VCC = 3.3 V $ 0.3 V
VCC = 5.0 V $ 0.5 V
ANALOG SWITCH DC CHARACTERISTICS
-40 °C to +85°C
Symbol
Parameter
Condition
VCC (V)
Min
VIH
Input Logic High Voltage
VOUT = 0.1 V
1.65 to 2.2
VCC x 0.55
-
IOUT ≤ 20 A
2.7 to 3.6
VCC x 0.5
-
4.5 to 5.5
2.0
-
VOUT = -VCC - 0.1 V
1.65 to 2.2
-
VCC x 0.2
IOUT ≤ 20 A
2.7 to 3.6
-
VCC x 0.2
4.5 to 5.5
-
0.8
VIL
Input Logic Low Voltage
Max
Unit
V
V
IIN
Input Leakage Current
VIN – VCC or GND
5.0
-100
+100
nA
VCC
Power Supply Range
All
-
1.65
5.5
V
ICC
Supply Current
VIN = VCC or GND
1.8
-
1.0
A
IOUT = 0 A
3.3
-
1.0
5.0
-
1.0
-
0
VCC
VIS
Analog Signal Range
Key parameter
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2
V
NLAS4717
ANALOG SWITCH CHARACTERISTICS - Digital Section (Voltages Referenced to GND)
-40 °C to +85°C
Symbol
Parameter
Condition
VCC (V)
Min
Max
Unit
RON
ON Resistance
(Note 2)
VCC = 3.0 V
3.0
-
Typ
4.5
5.0
-
3.5
3.6
-
ICOM = 10 mA
VNO or VNC = VIH or VIL
VCC = 5.0 V
ICOM = 10 mA
VNO or VNC = VIH or VIL
RON
ON Resistance
Match Between Channels
(Note 2 and 3)
VCC = 3.6 V
0.1
0.4
ICOM = 10 mA
VNO or VNC = VIH or VIL
VCC = 5.5 V
5.5
ICOM = 10 mA
VNO or VNC = VIH or VIL
RFLAT[ON]
ON Resistance
Flatness
(Note 4)
ICOM = 10 mA
3.0
-
1.5
5.5
-
1.36
3.6
-1.0
0.01
+1.0
5.5
-1.0
0.01
+1.0
3.6
-2.0
0.01
+2.0
5.5
-2.0
0.01
+2.0
VIS = 0 to VCC
ICOM = 10 mA
VIS = 0 to VCC
INO_[OFF]
INC_[OFF]
NO_, NC_
Off-Leakage Current
(Note 5)
VCC = 3.6 V
nA
VCOM = 0.3 V or 3.3 V
VNO or VNC = 0.3 V or 3.3 V
VCC = 5.5 V
VCOM = 0 V or 5.0 V
VNO or VNC = 0 V or 5.0 V
ICOM_[ON]
COM_
On-Leakage Current
(Note 5)
VCC = 3.6 V
nA
VCOM = 0.3 V or 3.3 V
VNO or VNC = 0.3 V or 3.3 V
VCC = 5.5 V
VCOM = 0 V or 5.0 V
VNO or VNC = 0 V or 5.0 V
ANALOG SWITCH AC CHARACTERISTICS
-40 °C to +85°C
Symbol
Parameter
Condition
VCC (V)
Min
Typ
Max
Unit
tON
Turn-On Time
VNC_, VNO_ = VIH or VIL
1.8 to 5.5
-
-
30
nS
1.8 to 5.5
-
-
40
nS
-
-
8.0
-
nS
-
-
0.15
2.0
nS
RL = 300 , CL = 35 pF
VIN[x] = VIH or VIL
tOFF
Turn-Of f Time
VNC_, VNO_ = VIH or VIL
RL = 300 , CL = 35 pF
VIN[x] = VIH or VIL
tBBM
tSKEW
2.
3.
4.
5.
Break-Before-Make
Time Delay
(Note 5)
Skew
(Note 5)
VNC_, VNO_ = 1.5 V
RL = 300 , CL = 35 pF
RS = 39 , CL = 50 pF
RON characterized for VCC range (1.65 V to 5.5 V).
RON = RON(MAX) - RON(MIN).
RFLAT[ON] = RON(MAX) - RON(MIN), measured over VCC range.
Guaranteed by design.
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3
NLAS4717
ANALOG SWITCH APPLICATION CHARACTERISTICS
-40 °C to +85°C
Min
Typ
Symbol
Parameter
Condition
VCC (V)
Q
Charge Injection
VIN = VCC to GND
3.0
6.0
RIn = 0 , CL = 1.0 nF
5.0
9.0
1.65 to 5.5
-50
Max
Unit
pC
Q = CL - VOUT
VISO
Off-Isolation
f = 10 MHz
dB
VNO_, VNC_ = 1.0 Vp-p
RL = 50 , CL = 5.0 pF
f = 1.0 MHz
-75
VNO_, VNC_ = 1.0 Vp-p
RL = 50 , CL = 5.0 pF
VCT
Cross-T alk
f = 10 MHz
1.65 to 5.5
-80
dB
VNO_, VNC_ = 1.0 Vp-p
RL = 50 , CL = 5.0 pF
f = 1.0 MHz
-1 10
VNO_, VNC_ = 1.0 Vp-p
RL = 50 , CL = 5.0 pF
BW
On-Channel
-3.0 db Bandwidth
Signal = 0 dB
1.8 to 5.0
40
MHz
RL = 50 , CL = 5.0 pF
THD
Total Harmonic Distortion
VCOM = 2.0 Vp-p,
RL = 600 TA = 25°C
-
0.02
%
CNO_[OFF]
CNC_[OFF]
NO_, NC_
OFF-Capacitance
F = 10 MHz
-
30
pF
CNO_[ON]
CNC_[ON]
NO_, NC_
ON-Capacitance
F = 10 MHz
-
110
pF
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4
NLAS4717
3.0
2.0
2.5
+85°C
+25°C
1.0
RDS(on) ()
RDS(on) ()
1.5
-40 °C
2.0
+85°C
1.5
+25°C
1.0
-40 °C
0.5
0.5
0.0
0.0
1.0
2.0
3.0
4.0
0.0
0.0
5.0
0.5
1.0
VCOM (V)
2.5
3.0
Figure 3. Low RDS(on) @ VCC = 3.0 V
1.5
1.5
1.4
1.4
1.3
1.3
RDS(on) ()
RDS(on) ()
2.0
VCOM (V)
Figure 2. Low RDS(on) @ VCC = 5.0 V
1.2
1.1
1.0
1.5
1.2
1.1
3.0 V
1.0
5.0 V
0.9
0.9
0.8
-40C
0.8
-40C
+85C
+25C
+85C
+25C
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 4. Delta RDS(on) @ VCC = 5.0 V
Figure 5. Delta RDS(on) @ VCC = 3.0 V
8
1
6
4
Q (cP)
THD (%)
5.0 V
2
0
3.0 V
-2
0.1
-4
-6
-8
3.0 V
0.01
-10
0.0
1.0
2.0
3.0
4.0
10
5.0
100
1000
10000
VCOM (V)
FREQUENCY (Hz)
Figure 6. Charge Injection
Figure 7. Total Harmonic Distortion
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5
100000
NLAS4717
20
0
5
VCC = 1.65 V to 5.5 V
Bandwidth
-3 dB
-20
0
( (dB)
(dB)
-40
-60
Cross-T alk
-80
-5
-100
-120
-140
0.001
VCC = 1.8 V to 5.0 V
TA = -55°C to +125°C
OFF-Isolation
0.01
0.1
1
10
-10
100
0.1
(MHz)
10
1
(MHz)
Figure 8. Frequency Response
Figure 9. Bandwidth and Phase
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6
100
NLAS4717
VCC
DUT
VCC
Input
Output
GND
VOUT
0.1 F
50
tBMM
35 pF
90%
90% of VOH
Output
Switch Select Pin
GND
Figure 10. tBBM (Time Break-Before-Make)
VCC
Input
DUT
VCC
0.1 F
50%
Output
VOUT
Open
50%
0V
50
VOH
90%
35 pF
90%
Output
VOL
Input
tON
tOFF
Figure 11. tON/tOFF
VCC
VCC
Input
DUT
Output
50
50%
0V
VOUT
Open
50%
VOH
35 pF
Output
Input
tOFF
Figure 12. tON/tOFF
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7
10%
10%
VOL
tON
NLAS4717
50
DUT
Reference
Transmitted
Input
Output
50 Generator
50
Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is
the bandwidth of an On switch. VISO, Bandwidth and VONL are independent of the input signal direction.
ǒVVOUT
Ǔ for VIN at 100 kHz
IN
VONL = On Channel Loss = 20 Log ǒVOUTǓ for VIN at 100 kHz to 50 MHz
VIN
VISO = Off Channel Isolation = 20 Log
Bandwidth (BW) = the frequency 3.0 dB below VONL
VCT = Use VISO setup and test to all other switch analog input/outputs terminated with 50
Figure 13. Off Channel Isolation/On Channel Loss (BW)/Crosstalk
(On Channel to Off Channel)/VONL
DUT
VCC
VIN
Output
Open
GND
CL
Output
Off
VIN
Figure 14. Charge Injection: (Q)
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8
On
Off
VOUT
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
10 PIN FLIP−CHIP
CASE 489AA−01
ISSUE A
DATE 04 MAY 2004
1
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION:
MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
SCALE 4:1
D
4X
A
B
0.10 C
MILLIMETERS
DIM MIN
MAX
A
−−− 0.650
A1 0.210 0.270
A2 0.280 0.380
D
1.965 BSC
E
1.465 BSC
b
0.250 0.350
e
0.500 BSC
D1
1.500 BSC
1.000 BSC
E1
E
PIN ONE
CORNER
A1
0.10 C
A2
GENERIC
MARKING DIAGRAM*
A
0.075 C
C
SEATING
PLANE
xxxx
YYWW
D1
A1
e
10 X
b
0.15 C A B
0.05 C
C
E1
B
xxxx
YY
WW
= Specific Device Code
= Year
= Work Week
A
DOCUMENT NUMBER:
DESCRIPTION:
1
2
3
4
e
98AON12946D
10 PIN FLIP−CHIP
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
Micro10
CASE 846B−03
ISSUE D
DATE 07 DEC 2004
SCALE 2:1
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION “A” DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE
BURRS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
4. DIMENSION “B” DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION
SHALL NOT EXCEED 0.25 (0.010) PER SIDE.
5. 846B−01 OBSOLETE. NEW STANDARD
846B−02
−A−
−B−
K
D 8 PL
0.08 (0.003)
PIN 1 ID
G
0.038 (0.0015)
−T−
M
T B
S
A
C
SEATING
PLANE
H
MILLIMETERS
MIN
MAX
2.90
3.10
2.90
3.10
0.95
1.10
0.20
0.30
0.50 BSC
0.05
0.15
0.10
0.21
4.75
5.05
0.40
0.70
DIM
A
B
C
D
G
H
J
K
L
S
L
J
GENERIC
MARKING DIAGRAM*
SOLDERING FOOTPRINT
10X
1.04
0.041
0.32
0.0126
3.20
0.126
8X
xxxx
AYW
10X
4.24
0.167
0.50
0.0196
INCHES
MIN
MAX
0.114
0.122
0.114
0.122
0.037
0.043
0.008
0.012
0.020 BSC
0.002
0.006
0.004
0.008
0.187
0.199
0.016
0.028
SCALE 8:1
5.28
0.208
xxxx
A
Y
W
= Device Code
= Assembly Location
= Year
= Work Week
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ ”,
may or may not be present.
mm
inches
Micro10
DOCUMENT NUMBER:
98AON03799D
Electronic versions are uncontrolled except when
accessed directly from the Document Repository. Printed
STATUS: ON SEMICONDUCTOR STANDARD
versions are uncontrolled except when stamped
“CONTROLLED COPY” in red.
NEW STANDARD:
Semiconductor Components Industries, LLC, 2002
Case Outline Number:
http://onsemi.com
Micro10
DESCRIPTION:
October, 2002
− Rev. 0
PAGE 1 OFXXX
2
1
DOCUMENT NUMBER:
98AON03799D
PAGE 2 OF 2
ISSUE
REVISION
DATE
O
RELEASED FOR PRODUCTION. REQ BY J. HOSKINS.
09 NOV 2000
A
DIM “D” WAS 0.25−0.4MM/0.10−0.016IN. ADDED NOTE 5.
USED ON: WAS 10 LEAD TSSOP, PITCH 0.65 REQ BY J. HOSKINS.
13 NOV 2000
B
CHANGED “USED ON” WAS: 10 LEAD TSSOP, PITCH 0.50MM. REQ BY A. HAMID.
11 JUL 2001
C
CHANGED “D” DIMENSION MAX FROM 0.35 TO 0.30MM AND 0.014 TO 0.012IN.
REQ BY D. TRUHITTE.
31 JUL 2003
D
ADDED FOOTPRINT INFORMATION. REQ. BY K. OPPEN.
07 DEC 2004
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any
liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over
time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under
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SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
Semiconductor Components Industries, LLC, 2004
December, 2004 − Rev. 03D
Case Outline Number:
846B
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