NTB45N06LG

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Other names and brands may be claimed as the property of others. NTP45N06L, NTB45N06L Power MOSFET 45 Amps, 60 Volts Logic Level, N−Channel TO−220 and D2PAK http://onsemi.com Designed for low voltage, high speed switching applications in power supplies, converters and power motor controls and bridge circuits. 45 AMPERES, 60 VOLTS RDS(on) = 28 mW Features • • • • • • • • • N−Channel Higher Current Rating Lower RDS(on) Lower VDS(on) Lower Capacitances Lower Total Gate Charge Tighter VSD Specification Lower Diode Reverse Recovery Time Lower Reverse Recovery Stored Charge Pb−Free Packages are Available D G S 4 4 Typical Applications • • • • 1 Power Supplies Converters Power Motor Controls Bridge Circuits 2 3 1 2 3 D2PAK CASE 418B STYLE 2 TO−220AB CASE 221A STYLE 5 MARKING DIAGRAMS & PIN ASSIGNMENTS 4 Drain 4 Drain NTx 45N06LG AYWW NTx45N06LG AYWW 1 Gate 3 Source 1 Gate 2 Drain 3 Source 2 Drain NTx45N06L x A Y WW G = Device Code = B or P = Assembly Location = Year = Work Week = Pb−Free Package ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. © Semiconductor Components Industries, LLC, 2005 August, 2005 − Rev. 2 1 Publication Order Number: NTP45N06L/D NTP45N06L, NTB45N06L MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Symbol Value Unit Drain−to−Source Voltage Rating VDSS 60 Vdc Drain−to−Gate Voltage (RGS = 10 MW) VDGR 60 Vdc VGS VGS "15 "20 ID ID 45 30 150 Adc PD 125 0.83 3.2 2.4 W W/°C W W TJ, Tstg −55 to +175 °C EAS 240 mJ RqJC RqJA RqJA 1.2 46.8 63.2 TL 260 Gate−to−Source Voltage − Continuous − Non−Repetitive (tpv10 ms) Vdc Drain Current − Continuous @ TA = 25°C − Continuous @ TA = 100°C − Single Pulse (tpv10 ms) IDM Total Power Dissipation @ TA = 25°C Derate above 25°C Total Power Dissipation @ TA = 25°C (Note 1) Total Power Dissipation @ TA = 25°C (Note 2) Operating and Storage Temperature Range Single Pulse Drain−to−Source Avalanche Energy − Starting TJ = 25°C (VDD = 50 Vdc, VGS = 5.0 Vdc, L = 0.3 mH IL(pk) = 40 A, VDS = 60 Vdc, RG = 25 W) Apk °C/W Thermal Resistance − Junction−to−Case − Junction−to−Ambient (Note 1) − Junction−to−Ambient (Note 2) Maximum Lead Temperature for Soldering Purposes, 1/8 in from case for 10 seconds °C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. When surface mounted to an FR4 board using 1″ pad size, (Cu Area 1.127 in2). 2. When surface mounted to an FR4 board using the minimum recommended pad size, (Cu Area 0.412 in2). ORDERING INFORMATION Package Shipping † TO−220 50 Units / Rail TO−220 (Pb−Free) 50 Units / Rail NTB45N06L D2PAK 50 Units / Rail NTB45N06LG D2PAK 50 Units / Rail Device NTP45N06L NTP45N06LG (Pb−Free) NTB45N06LT4 D2PAK 800 Tape & Reel NTB45N06LT4G D2PAK 800 Tape & Reel (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 2 NTP45N06L, NTB45N06L ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Drain−to−Source Breakdown Voltage (Note 3) (VGS = 0 Vdc, ID = 250 mAdc) Temperature Coefficient (Positive) V(BR)DSS Unit 60 − 67 67.2 − − − − − − 1.0 10 − − ±100 1.0 − 1.8 4.7 2.0 − − 23 28 − − 1.03 0.93 1.51 − gFS − 22.8 − mhos Ciss − 1212 1700 pF Coss − 352 480 Crss − 90 180 td(on) − 13 30 OFF CHARACTERISTICS Zero Gate Voltage Drain Current (VDS = 60 Vdc, VGS = 0 Vdc) (VDS = 60 Vdc, VGS = 0 Vdc, TJ = 150°C) IDSS Gate−Body Leakage Current (VGS = ± 15 Vdc, VDS = 0 Vdc) IGSS Vdc mV/°C mAdc nAdc ON CHARACTERISTICS (Note 4) Gate Threshold Voltage (Note 4) (VDS = VGS, ID = 250 mAdc) Threshold Temperature Coefficient (Negative) VGS(th) Static Drain−to−Source On−Resistance (Note 4) (VGS = 5.0 Vdc, ID = 22.5 Adc) RDS(on) Static Drain−to−Source On−Voltage (Note 4) (VGS = 5.0 Vdc, ID = 45 Adc) (VGS = 5.0 Vdc, ID = 22.5 Adc, TJ = 150°C) VDS(on) Forward Transconductance (Note 4) (VDS = 8.0 Vdc, ID = 12 Adc) Vdc mV/°C mW Vdc DYNAMIC CHARACTERISTICS Input Capacitance (VDS = 25 Vdc, VGS = 0 Vdc, f = 1.0 MHz) Output Capacitance Transfer Capacitance SWITCHING CHARACTERISTICS (Note 5) Turn−On Delay Time Rise Time Turn−Off Delay Time (VDD = 30 Vdc, ID = 45 Adc, VGS = 5.0 Vdc, RG = 9.1 W) (Note 4) Fall Time Gate Charge (VDS = 48 Vdc, ID = 45 Adc, VGS = 5.0 Vdc) (Note 4) ns tr − 341 680 td(off) − 36 75 tf − 158 320 QT − 23 32 Q1 − 4.6 − Q2 − 14.1 − VSD − − 1.01 0.92 1.15 − Vdc trr − 56 − ns ta − 30 − tb − 26 − QRR − 0.09 − nC SOURCE−DRAIN DIODE CHARACTERISTICS Forward On−Voltage (IS = 45 Adc, VGS = 0 Vdc) (Note 4) (IS = 45 Adc, VGS = 0 Vdc, TJ = 150°C) Reverse Recovery Time (IS = 45 Adc, VGS = 0 Vdc, dIS/dt = 100 A/ms) (Note 4) Reverse Recovery Stored Charge 3. When surface mounted to an FR4 board using the minimum recommended pad size, (Cu Area 0.412 4. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%. 5. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 3 in2). mC NTP45N06L, NTB45N06L 80 ID, DRAIN CURRENT (AMPS) 70 ID, DRAIN CURRENT (AMPS) 80 VGS = 5.5 V VGS = 10 V VGS = 5 V 60 VGS = 6 V 50 VGS = 7 V VGS = 4.5 V 40 VGS = 4 V 30 VGS = 8 V 20 VGS = 3.5 V VGS = 9 V 10 VDS > = 10 V 70 60 50 40 30 TJ = 25°C 20 TJ = 100°C 10 TJ = −55°C 0 1 2 0 1.8 4 3 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) TJ = 100°C 0.034 TJ = 25°C 0.03 0.026 0.022 TJ = −55°C 0.018 10 20 30 40 50 60 70 80 5.8 0.046 0.042 0.038 0.034 VGS = 5 V 0.03 0.026 VGS = 10 V 0.022 0.018 0 10 20 30 40 50 60 70 80 ID, DRAIN CURRENT (AMPS) ID, DRAIN CURRENT (AMPS) Figure 3. On−Resistance vs. Gate−to−Source Voltage Figure 4. On−Resistance vs. Drain Current and Gate Voltage 10000 ID = 22.5 A VGS = 5 V VGS = 0 V IDSS, LEAKAGE (nA) 1.8 5 Figure 2. Transfer Characteristics 0.038 2 4.2 Figure 1. On−Region Characteristics 0.042 0 3.4 VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) VGS = 5 V 0.014 2.6 VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) 0.046 RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 0 1.6 1.4 1.2 1 TJ = 150°C 1000 TJ = 125°C 100 TJ = 100°C 0.8 0.6 −50 −25 10 0 25 50 75 100 125 150 175 0 10 20 30 40 50 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 4 60 4000 VDS = 0 V Ciss 3200 Crss 2800 2400 2000 Ciss 1600 1200 800 Coss 400 Crss 0 10 5 VGS 0 VDS 5 10 15 20 25 VGS Q2 4 3 2 1 ID = 45 A TJ = 25°C 0 0 4 8 12 16 20 Figure 8. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge tr td(off) 1 10 100 32 24 16 8 0 0.6 0.64 0.68 0.72 0.76 0.8 0.84 0.88 0.92 0.96 1 Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current dc 10 10 ms 1 ms RDS(on) Limit Thermal Limit Package Limit 1 100 ms 10 100 EAS, SINGLE PULSE DRAIN−TO−SOURCE AVALANCHE ENERGY (mJ) VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS) VGS = 15 V SINGLE PULSE TC = 25°C 0.1 0.10 VGS = 0 V TJ = 25°C 40 RG, GATE RESISTANCE (W) 1000 1 24 48 VDS = 30 V ID = 45 A VGS = 5 V td(on) ID, DRAIN CURRENT (AMPS) Q1 Figure 7. Capacitance Variation 100 100 QT 5 Qg, TOTAL GATE CHARGE (nC) tf 10 6 GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS) 1000 t, TIME (ns) TJ = 25°C IS, SOURCE CURRENT (AMPS) C, CAPACITANCE (pF) 3600 VGS = 0 V VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) NTP45N06L, NTB45N06L 280 ID = 45 A 240 200 160 120 80 40 0 25 50 75 100 125 150 VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) TJ, STARTING JUNCTION TEMPERATURE (°C) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature http://onsemi.com 5 175 NTP45N06L, NTB45N06L 1 EFFECTIVE TRANSIENT THERMAL RESPONSE (NORMALIZED) Normalized to RqJC at Steady State r(t), 0.1 0.01 0.00001 0.0001 0.001 0.01 0.1 1 10 t, TIME (s) Figure 13. Thermal Response r(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE (NORMALIZED) 10 Normalized to RqJA at Steady State, 1″ square Cu Pad, Cu Area 1.127 in2, 3 x 3 inch FR4 board 1 0.1 0.01 0.001 0.00001 0.0001 0.001 0.01 0.1 1 t, TIME (s) Figure 14. Thermal Response http://onsemi.com 6 10 100 1000 NTP45N06L, NTB45N06L PACKAGE DIMENSIONS D2PAK CASE 418B−04 ISSUE J C NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 418B−01 THRU 418B−03 OBSOLETE, NEW STANDARD 418B−04. E V W −B− 4 DIM A B C D E F G H J K L M N P R S V A 1 2 S 3 −T− SEATING PLANE K W J G D 3 PL 0.13 (0.005) VARIABLE CONFIGURATION ZONE H M T B M N R M STYLE 2: PIN 1. 2. 3. 4. P U L L M L M F F F VIEW W−W 1 VIEW W−W 2 VIEW W−W 3 SOLDERING FOOTPRINT* 8.38 0.33 1.016 0.04 10.66 0.42 5.08 0.20 3.05 0.12 17.02 0.67 SCALE 3:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 7 INCHES MIN MAX 0.340 0.380 0.380 0.405 0.160 0.190 0.020 0.035 0.045 0.055 0.310 0.350 0.100 BSC 0.080 0.110 0.018 0.025 0.090 0.110 0.052 0.072 0.280 0.320 0.197 REF 0.079 REF 0.039 REF 0.575 0.625 0.045 0.055 GATE DRAIN SOURCE DRAIN MILLIMETERS MIN MAX 8.64 9.65 9.65 10.29 4.06 4.83 0.51 0.89 1.14 1.40 7.87 8.89 2.54 BSC 2.03 2.79 0.46 0.64 2.29 2.79 1.32 1.83 7.11 8.13 5.00 REF 2.00 REF 0.99 REF 14.60 15.88 1.14 1.40 NTP45N06L, NTB45N06L PACKAGE DIMENSIONS TO−220 CASE 221A−09 ISSUE AA −T− B SEATING PLANE C F T S 4 DIM A B C D F G H J K L N Q R S T U V Z A Q 1 2 3 U H K Z L R V J NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. G D N INCHES MIN MAX 0.570 0.620 0.380 0.405 0.160 0.190 0.025 0.035 0.142 0.147 0.095 0.105 0.110 0.155 0.018 0.025 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 −−− −−− 0.080 STYLE 5: PIN 1. 2. 3. 4. MILLIMETERS MIN MAX 14.48 15.75 9.66 10.28 4.07 4.82 0.64 0.88 3.61 3.73 2.42 2.66 2.80 3.93 0.46 0.64 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 −−− −−− 2.04 GATE DRAIN SOURCE DRAIN ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Phone: 81−3−5773−3850 Email: orderlit@onsemi.com http://onsemi.com 8 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. NTP45N06L/D