NTD4855NT4G

NTD4855N Power MOSFET 25 V, 98 A, Single N-Channel, DPAK/IPAK Features • • • • • Trench Technology Low RDS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses Optimized Gate Charge to Minimize Switching Losses These are Pb-Free Devices http://onsemi.com V(BR)DSS 25 V RDS(ON) MAX 4.3 mW @ 10 V 6.0 mW @ 4.5 V D ID MAX 98 A Applications • VCORE Applications • DC-DC Converters • Low Side Switching MAXIMUM RATINGS (TJ = 25°C unless otherwise stated) Parameter Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current RqJA (Note 1) Power Dissipation RqJA (Note 1) Continuous Drain Current RqJA (Note 2) Power Dissipation RqJA (Note 2) Continuous Drain Current RqJC (Note 1) Power Dissipation RqJC (Note 1) Pulsed Drain Current tp=10ms Steady State TA = 25°C TA = 85°C TA = 25°C TA = 25°C TA = 85°C TA = 25°C TC = 25°C TC = 85°C TC = 25°C TA = 25°C TA = 25°C PD IDM IDmaxPkg TJ, TSTG IS dV/dt EAS PD ID PD ID Symbol VDSS VGS ID Value 25 ±20 18 14 2.24 14 10.9 1.35 98 76 66.7 197 45 -55 to +175 56 6 220 W A A °C A V/ns mJ 4 Drain YWW 48 55NG W A CASE 369AA DPAK (Bent Lead) STYLE 2 W A 12 3 4 Unit V V A G S N-CHANNEL MOSFET 4 4 1 2 3 CASE 369AC CASE 369D 3 IPAK IPAK (Straight Lead) (Straight Lead DPAK) 23 1 MARKING DIAGRAMS & PIN ASSIGNMENTS 4 Drain YWW 48 55NG 4 Drain YWW 48 55NG Current Limited by Package Operating Junction and Storage Temperature Source Current (Body Diode) Drain to Source dV/dt Single Pulse Drain-to-Source Avalanche Energy (TJ = 25°C, VDD = 50 V, VGS = 10 V, IL = 21 Apk, L = 1.0 mH, RG = 25 W) Lead Temperature for Soldering Purposes (1/8” from case for 10 s) TL 260 °C 2 1 23 1 Drain 3 Gate Source Gate Drain Source 1 2 3 Gate Drain Source Y WW 4855N G = Year = Work Week = Device Code = Pb-Free Package Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. © Semiconductor Components Industries, LLC, 2008 1 April, 2008 - Rev. 1 Publication Order Number: NTD4855N/D NTD4855N THERMAL RESISTANCE MAXIMUM RATINGS Parameter Junction-to-Case (Drain) Junction-to-TAB (Drain) Junction-to-Ambient – Steady State (Note 1) Junction-to-Ambient – Steady State (Note 2) 1. Surface-mounted on FR4 board using 1 sq-in pad, 1 oz Cu. 2. Surface-mounted on FR4 board using the minimum recommended pad size. Symbol RqJC RqJC-TAB RqJA RqJA Value 2.25 3.5 67 111 Unit °C/W ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage Drain-to-Source Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current V(BR)DSS V(BR)DSS/ TJ IDSS VGS = 0 V, VDS = 20 V TJ = 25°C TJ = 125°C VGS = 0 V, ID = 250 mA 25 22 1.0 10 ±100 V mV/°C mA nA Symbol Test Condition Min Typ Max Unit Gate-to-Source Leakage Current ON CHARACTERISTICS (Note 3) Gate Threshold Voltage Negative Threshold Temperature Coefficient Drain-to-Source On Resistance IGSS VDS = 0 V, VGS = ±20 V VGS(TH) VGS(TH)/TJ RDS(on) VGS = VDS, ID = 250 mA 1.45 TBD 2.5 V mV/°C VGS = 10 V VGS = 4.5 V ID = 30 A ID = 30 A 3.5 4.6 80 4.3 6.0 mW S Forward Transconductance CHARGES AND CAPACITANCES Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Threshold Gate Charge Gate-to-Source Charge Gate-to-Drain Charge Total Gate Charge SWITCHING CHARACTERISTICS (Note 4) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time gFS VDS = 1.5 V, ID = 15 A CISS COSS CRSS QG(TOT) QG(TH) QGS QGD QG(TOT) VGS = 10 V, VDS = 15 V, ID = 30 A VGS = 4.5 V, VDS = 15 V, ID = 30 A VGS = 0 V, f = 1.0 MHz, VDS = 12 V 2950 740 400 21.8 2.4 7.9 8.6 44 nC nC 32.7 pF td(ON) tr td(OFF) tf td(ON) tr td(OFF) tf VGS = 11.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 W VGS = 4.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 W 17.75 31.48 20.28 10.74 10.01 16.52 32.02 4.35 ns ns 3. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 4. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 NTD4855N ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter DRAIN-SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD VGS = 0 V, IS = 30 A TJ = 25°C TJ = 125°C 0.86 0.74 25.5 VGS = 0 V, dIS/dt = 100 A/ms, IS = 30 A 12.9 12.6 13.8 nC ns 1.2 V Symbol Test Condition Min Typ Max Unit Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge PACKAGE PARASITIC VALUES Source Inductance Drain Inductance, DPAK Drain Inductance, IPAK Gate Inductance Gate Resistance tRR ta tb QRR LS LD LD LG RG TA = 25°C 2.49 0.0164 1.88 3.46 0.8 nH W 3. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 4. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 3 NTD4855N TYPICAL PERFORMANCE CURVES 90 10 V ID, DRAIN CURRENT (AMPS) 80 70 60 3.2 V 50 40 30 20 10 0 0 1 2 3 4 2.8 V 5 3.0 V 3.8 V 3.6 V 140 130 120 110 100 90 80 70 60 50 40 30 20 10 0 TJ = 25°C ID, DRAIN CURRENT (AMPS) 3.4 V VDS ≥ 10 V TJ = 125°C TJ = 25°C TJ = -55°C 1 2 3 4 5 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) Figure 1. On-Region Characteristics RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) Figure 2. Transfer Characteristics 0.04 0.035 0.03 0.025 0.02 0.015 0.01 0.005 0 2 4 6 8 10 ID = 30 A TJ = 25°C 0.007 TJ = 25°C 0.006 0.005 VGS = 4.5 V 0.004 VGS = 11.5 V 0.003 0.002 30 40 50 60 70 80 90 100 110 120 VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) ID, DRAIN CURRENT (AMPS) Figure 3. On-Resistance vs. Gate-to-Source Voltage RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) 1.8 1.6 1.4 1.2 1.0 0.8 0.6 -50 1 -25 0 25 50 75 100 125 150 175 5 ID = 30 A VGS = 10 V IDSS, LEAKAGE (nA) 1000 10000 Figure 4. On-Resistance vs. Drain Current and Gate Voltage VGS = 0 V TJ = 150°C TJ = 125°C 100 10 TJ = 25°C 10 15 20 25 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 5. On-Resistance Variation with Temperature Figure 6. Drain-to-Source Leakage Current vs. Drain Voltage http://onsemi.com 4 NTD4855N TYPICAL PERFORMANCE CURVES 4000 3600 C, CAPACITANCE (pF) 3200 2800 2400 2000 1600 1200 800 400 0 0 Crss 2.5 5 7.5 10 12.5 15 17.5 20 Coss VGS = 0 V Ciss TJ = 25°C 12 10 8 6 4 2 0 0 Q1 Q2 ID = 30 A VDD = 15 V TJ = 25°C 4 8 12 16 20 24 28 32 36 40 44 48 QG, TOTAL GATE CHARGE (nC) VGS QT DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 7. Capacitance Variation VGS , GATE-TO-SOURCE VOLTAGE (VOLTS) Figure 8. Gate-To-Source and Drain-To-Source Voltage vs. Total Charge 30 IS, SOURCE CURRENT (AMPS) 1000 VDD = 15 V ID = 30 A VGS = 11.5 V t, TIME (ns) 100 tr td(on) 10 td(off) tf VGS = 0 V 25 20 15 10 5 0 0.2 TJ = 25°C 1 1 10 RG, GATE RESISTANCE (OHMS) 100 0.4 0.6 0.8 1.0 VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS) Figure 9. Resistive Switching Time Variation vs. Gate Resistance EAS, SINGLE PULSE DRAIN-TO-SOURCE AVALANCHE ENERGY (mJ) 1000 I D, DRAIN CURRENT (AMPS) 240 220 200 180 160 140 120 100 80 60 40 20 0 25 Figure 10. Diode Forward Voltage vs. Current ID = 21 A 100 10 ms 100 ms 10 VGS = 20 V SINGLE PULSE TC = 25°C RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.1 0.1 1 10 1 ms 10 ms dc 1 100 50 75 100 125 150 175 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) TJ, JUNCTION TEMPERATURE (°C) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature http://onsemi.com 5 NTD4855N ORDERING INFORMATION Device NTD4855NT4G NTD4855N-1G NTD4855N-35G Package DPAK (Pb-Free) IPAK (Pb-Free) IPAK Trimmed Lead (3.5 " 0.15 mm) (Pb-Free) Shipping† 2500 / Tape & Reel 75 Units / Rail 75 Units / Rail †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 6 NTD4855N PACKAGE DIMENSIONS DPAK (SINGLE GAUGE) CASE 369AA-01 ISSUE A NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.025 0.035 0.018 0.024 0.030 0.045 0.386 0.410 0.018 0.023 0.090 BSC 0.180 0.215 0.024 0.040 0.020 --0.035 0.050 0.155 --MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.63 0.89 0.46 0.61 0.77 1.14 9.80 10.40 0.46 0.58 2.29 BSC 4.57 5.45 0.60 1.01 0.51 --0.89 1.27 3.93 --- -TB V R 4 SEATING PLANE C E A S 1 2 3 Z H U F L D 2 PL J DIM A B C D E F H J L R S U V Z 0.13 (0.005) M T STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN SOLDERING FOOTPRINT* 6.20 0.244 3.0 0.118 2.58 0.101 5.80 0.228 1.6 0.063 6.172 0.243 SCALE 3:1 mm inches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 7 NTD4855N PACKAGE DIMENSIONS 3 IPAK, STRAIGHT LEAD CASE 369AC-01 ISSUE O NOTES: 1.. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2.. CONTROLLING DIMENSION: INCH. 3. SEATING PLANE IS ON TOP OF DAMBAR POSITION. 4. DIMENSION A DOES NOT INCLUDE DAMBAR POSITION OR MOLD GATE. INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.043 0.090 BSC 0.034 0.040 0.018 0.023 0.134 0.142 0.180 0.215 0.035 0.050 0.000 0.010 MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.09 2.29 BSC 0.87 1.01 0.46 0.58 3.40 3.60 4.57 5.46 0.89 1.27 0.000 0.25 B V R C E A SEATING PLANE W F G K J H D 3 PL 0.13 (0.005) W DIM A B C D E F G H J K R V W IPAK (STRAIGHT LEAD DPAK) CASE 369D-01 ISSUE B B V R 4 C E NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.090 BSC 0.034 0.040 0.018 0.023 0.350 0.380 0.180 0.215 0.025 0.040 0.035 0.050 0.155 --MILLIMETERS MIN MAX 5.97 6.35 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 2.29 BSC 0.87 1.01 0.46 0.58 8.89 9.65 4.45 5.45 0.63 1.01 0.89 1.27 3.93 --- Z A 3 S -TSEATING PLANE 1 2 K F D G 3 PL J H 0.13 (0.005) M DIM A B C D E F G H J K R S V Z T STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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