DATA SHEET
www.onsemi.com
Industrial Inductive
Load Driver
3
1
This micro−integrated part provides a single component solution to
switch inductive loads such as relays, solenoids, and small DC motors
without the need of a free−wheeling diode. It accepts logic level
inputs, thus allowing it to be driven by a large variety of devices
including logic gates, inverters, and microcontrollers.
MARKING DIAGRAMS
JW8 = Specific Device Code
M
= Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
• Provides Robust Interface between D.C. Relay Coils and Sensitive
Logic
• Capable of Driving Relay Coils Rated up to 150 mA at 12 V, 24 V
or 48 V
Replaces 3 or 4 Discrete Components for Lower Cost
Internal Zener Eliminates Need for Free−Wheeling Diode
Meets Load Dump and other Automotive Specs
SZ Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC−Q101 Qualified and
PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
• Automotive and Industrial Environment
• Drives Window, Latch, Door, and Antenna Relays
JW8 = Specific Device Code
M
= Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Package
Shipping†
NUD3160LT1G
SOT−23
(Pb−Free)
3000 / Tape &
Reel
SZNUD3160LT1G
SOT−23
(Pb−Free)
3000 / Tape &
Reel
NUD3160DMT1G
SC−74
(Pb−Free)
3000 / Tape &
Reel
SZNUD3160DMT1G
SC−74
(Pb−Free)
3000 / Tape &
Reel
Device
Benefits
•
•
•
•
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Reduced PCB Space
Standardized Driver for Wide Range of Relays
Simplifies Circuit Design and PCB Layout
Compliance with Automotive Specifications
Drain (3)
Gate (1)
100 k
10 k
10 k
CASE 318
© Semiconductor Components Industries, LLC, 2003
Gate (5)
100 k
100 k
Source (2)
October, 2022 − Rev. 9
Drain (3)
Drain (6)
Gate (2)
10 k
JW8 MG
G
JW8 MG
G
Features
•
1
SC−74
CASE 318F
STYLE 7
SOT−23
CASE 318
STYLE 21
NUD3160, SZNUD3160
•
•
•
•
6
2
Source (4)
Source (1)
CASE 318F
Figure 1. Internal Circuit Diagrams
1
Publication Order Number:
NUD3160/D
NUD3160, SZNUD3160
MAXIMUM RATINGS (TJ = 25°C unless otherwise specified)
Rating
Symbol
Value
Unit
VDSS
Drain−to−Source Voltage – Continuous (TJ = 125°C)
60
V
VGSS
Gate−to−Source Voltage – Continuous (TJ = 125°C)
12
V
ID
Drain Current – Continuous (TJ = 125°C)
Minimum copper, double sided board, TA = 80°C
SOT−23
SC74 Single device driven
SC74 Both devices driven
1 in2 copper, double sided board, TA = 25°C
SOT−23
SC74 Single device driven
SC74 Both devices driven
mA
158
157
132 ea
272
263
230 ea
EZ
Single Pulse Drain−to−Source Avalanche Energy
(For Relay’s Coils/Inductive Loads of 80 W or Higher) (TJ Initial = 85°C)
200
mJ
PPK
Peak Power Dissipation, Drain−to−Source (Notes 1 and 2)
(TJ Initial = 85°C)
20
W
ELD1
Load Dump Pulse, Drain−to−Source (Note 3)
RSOURCE = 0.5 W, T = 300 ms)
(For Relay’s Coils/Inductive Loads of 80 W or Higher) (TJ Initial = 85°C)
60
V
ELD2
Inductive Switching Transient 1, Drain−to−Source
(Waveform: RSOURCE = 10 W, T = 2.0 ms)
(For Relay’s Coils/Inductive Loads of 80 W or Higher) (TJ Initial = 85°C)
100
V
ELD3
Inductive Switching Transient 2, Drain−to−Source
(Waveform: RSOURCE = 4.0 W, T = 50 ms)
(For Relay’s Coils/Inductive Loads of 80 W or Higher) (TJ Initial = 85°C)
300
V
Rev−Bat
Reverse Battery, 10 Minutes (Drain−to−Source)
(For Relay’s Coils/Inductive Loads of 80 W or more)
−14
V
Dual−Volt
Dual Voltage Jump Start, 10 Minutes (Drain−to−Source)
28
V
2000
V
ESD
Human Body Model (HBM)
According to EIA/JESD22/A114 Specification
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
THERMAL CHARACTERISTICS
Symbol
Value
Unit
TA
Operating Ambient Temperature
−40 to 125
°C
TJ
Maximum Junction Temperature
150
°C
−65 to 150
°C
TSTG
Rating
Storage Temperature Range
PD
Total Power Dissipation (Note 4)
Derating above 25°C
SOT−23
225
1.8
mW
mW/°C
PD
Total Power Dissipation (Note 4)
Derating above 25°C
SC−74
380
3.0
mW
mW/°C
SOT−23
SC−74 One Device Powered
SC−74 Both Devices Equally Powered
556
556
398
SOT−23
SC−74 One Device Powered
SC−74 Both Devices Equally Powered
395
420
270
RqJA
Thermal Resistance, Junction–to–Ambient
Minimum Copper
300 mm2 Copper
1.
2.
3.
4.
Nonrepetitive current square pulse 1.0 ms duration.
For different square pulse durations, see Figure 12.
Nonrepetitive load dump pulse per Figure 3.
Mounted onto minimum pad board.
www.onsemi.com
2
°C/W
NUD3160, SZNUD3160
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Symbol
Min
Typ
Max
Unit
VBRDSS
61
66
70
V
−
−
−
−
−
−
−
−
0.5
1.0
50
80
−
−
−
−
−
−
−
−
60
80
90
110
1.3
1.3
1.8
−
2.0
2.0
−
−
−
−
−
−
−
−
2.4
3.7
1.8
2.9
150
100
200
−
−
−
gFS
−
400
−
mmho
Input Capacitance
(VDS = 12 V, VGS = 0 V, f = 10 kHz)
Ciss
−
30
−
pf
Output Capacitance
(VDS = 12 V, VGS = 0 V, f = 10 kHz)
Coss
−
14
−
pf
Transfer Capacitance
(VDS = 12 V, VGS = 0 V, f = 10 kHz)
Crss
−
6.0
−
pf
tPHL
tPLH
−
−
918
798
−
−
tPHL
tPLH
−
−
331
1160
−
−
tf
tr
−
−
2290
618
−
−
tf
tr
−
−
622
600
−
−
Characteristic
OFF CHARACTERISTICS
Drain to Source Sustaining Voltage
(ID = 10 mA)
Drain to Source Leakage Current
(VDS = 12 V, VGS = 0 V)
(VDS = 12 V, VGS = 0 V, TJ = 125°C)
(VDS = 60 V, VGS = 0 V)
(VDS = 60 V, VGS = 0 V, TJ = 125°C)
IDSS
Gate Body Leakage Current
(VGS = 3.0 V, VDS = 0 V)
(VGS = 3.0 V, VDS = 0 V, TJ = 125°C)
(VGS = 5.0 V, VDS = 0 V)
(VGS = 5.0 V, VDS = 0 V, TJ = 125°C)
IGSS
mA
mA
ON CHARACTERISTICS
Gate Threshold Voltage
(VGS = VDS, ID = 1.0 mA)
(VGS = VDS, ID = 1.0 mA, TJ = 125°C)
VGS(th)
Drain to Source On−Resistance
(ID = 150 mA, VGS = 3.0 V)
(ID = 150 mA, VGS = 3.0 V, TJ = 125°C)
(ID = 150 mA, VGS = 5.0 V)
(ID = 150 mA, VGS = 5.0 V, TJ = 125°C)
RDS(on)
Output Continuous Current
(VDS = 0.3 V, VGS = 5.0 V)
(VDS = 0.3 V, VGS = 5.0 V, TJ = 125°C)
IDS(on)
Forward Transconductance
(VDS = 12 V, ID = 150 mA)
V
W
mA
DYNAMIC CHARACTERISTICS
SWITCHING CHARACTERISTICS
Propagation Delay Times:
High to Low Propagation Delay; Figure 2, (VDS = 12 V, VGS = 3.0 V)
Low to High Propagation Delay; Figure 2, (VDS = 12 V, VGS = 3.0 V)
High to Low Propagation Delay; Figure 2, (VDS = 12 V, VGS = 5.0 V)
Low to High Propagation Delay; Figure 2, (VDS = 12 V, VGS = 5.0 V)
Transition Times:
Fall Time; Figure 2, (VDS = 12 V, VGS = 3.0 V)
Rise Time; Figure 2, (VDS = 12 V, VGS = 3.0 V)
Fall Time; Figure 2, (VDS = 12 V, VGS = 5.0 V)
Rise Time; Figure 2, (VDS = 12 V, VGS = 5.0 V)
ns
ns
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
www.onsemi.com
3
NUD3160, SZNUD3160
TYPICAL WAVEFORMS
(TJ = 25°C unless otherwise specified)
VIH
Vin
50%
0V
tPHL
tPLH
VOH
90%
Vout
50%
10%
VOL
tr
tf
Figure 2. Switching Waveforms
tr
Load Dump Pulse Not Suppressed:
Vr = 13.5 V Nominal ±10%
VS = 60 V Nominal ±10%
T = 300 ms Nominal ±10%
tr = 1 − 10 ms ±10%
90%
10% of Peak;
Reference = Vr, Ir
10%
Vr, Ir
Figure 3. Load Dump Waveform Definition
www.onsemi.com
4
VS
T
NUD3160, SZNUD3160
TYPICAL PERFORMANCE CURVES
(TJ = 25°C unless otherwise specified)
80
VDS = 60 V
70
IGSS GATE LEAKAGE (mA)
IDSS, DRAIN LEAKAGE (mA)
80
60
50
40
30
20
10
0
−50
−25
0
25
50
100
75
70
60
40
VGS = 3 V
30
20
−50
125
VGS = 5 V
50
−25
TJ, JUNCTION TEMPERATURE (°C)
1E+03
66.2
ID DRAIN CURRENT (mA)
BVDSS BREAKDOWN VOLTAGE (V)
66.4
66.0
ID = 10 mA
65.6
65.4
65.2
65.0
64.8
−50
−25
0
25
75
50
100
0.01
0.001
125 °C
1E−05
1E−07
1.0
25 °C
1.2
1.4
−40 °C
1.6
1.8
2.0
2.2
VGS = 2.5 V
VGS = 3 V
VGS = 2 V
1E+00
1E−01
VGS = 1.5 V
1E−02
1E−03
0.0
125
VGS = 5 V
1E+01
2.4
VGS, GATE−TO−SOURCE VOLTAGE (V)
RDS(ON), DRAIN−TO−SOURCE RESISTANCE (mW)
ID DRAIN CURRENT (A)
VDS = 0.8 V
85 °C
125
0.2
0.1
0.3
0.4
0.5
0.6
0.7
0.8
Figure 7. Output Characteristics
1
1E−06
100
75
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 6. Breakdown Voltage vs.
Junction Temperature
1E−04
50
1E+02
TJ, JUNCTION TEMPERATURE (°C)
0.1
25
Figure 5. Gate−to−Source Leakage vs.
Junction Temperature
Figure 4. Drain−to−Source Leakage vs.
Junction Temperature
65.8
0
TJ, JUNCTION TEMPERATURE (°C)
2.6
3200
ID = 0.15 A
2800
2400
VGS = 3.0 V
2000
1600
VGS = 5.0 V
1200
800
−50
Figure 8. Transfer Function
−25
0
25
50
75
TJ, JUNCTION TEMPERATURE (°C)
Figure 9. On Resistance Variation vs
Junction Temperature
www.onsemi.com
5
100
125
NUD3160, SZNUD3160
TYPICAL PERFORMANCE CURVES
(TJ = 25°C unless otherwise specified)
90
ID = 250 mA
125 °C
VZ ZENER CLAMP VOLTAGE (V)
RDS(ON), DRAIN−TO−SOURCE
RESISTANCE (mW)
100
80
70
60
85 °C
50
25 °C
40
30
−40 °C
20
10
0
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
2.6
2.8
3.0
68.0
67.5
67.0
66.5
−40 °C
66.0
65.5
25 °C
85 °C
65.0
64.5
64.0
63.5
63.0
62.5
62.0
0.1
125 °C
1.0
VGS, GATE−TO−SOURCE VOLTAGE (V)
10
100
1000
IZ, ZENER CURRENT (mA)
Figure 11. Zener Clamp Voltage vs. Zener
Current
Figure 10. On Resistance Variation vs.
Gate−to−Source Voltage
100
600
SC74−1 (One Device Powered)
qJA (°C/W)
POWER (WATTS)
SC74−2 (Both Devices Powered Equally)
500
10
SC74−1
400
SOT23
300
1
0.1
1.0
10
200
100
SC74−2
1 oz. Copper, Single−sided Board
0
100
200
300
400
500
600
PW, PULSE WIDTH (ms)
COPPER AREA (mm2)
Figure 12. Maximum Non−repetitive Surge
Power vs. Pulse Width
Figure 13. Thermal Performance vs. Board
Copper Area
www.onsemi.com
6
700
NUD3160, SZNUD3160
APPLICATIONS INFORMATION
12 V Battery
−
+
NC
NO
Relay, Vibrator,
or
Inductive Load
Drain (3)
Gate (1)
Micro
Processor
Signal
for
Relay
10 k
100 K
NUD3160
Source (2)
Figure 14. Applications Diagram
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7
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318−08
ISSUE AS
DATE 30 JAN 2018
SCALE 4:1
D
0.25
3
E
1
2
T
HE
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH.
MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF
THE BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
DIM
A
A1
b
c
D
E
e
L
L1
HE
T
L
3X b
L1
VIEW C
e
TOP VIEW
A
A1
SIDE VIEW
SEE VIEW C
c
MIN
0.89
0.01
0.37
0.08
2.80
1.20
1.78
0.30
0.35
2.10
0°
MILLIMETERS
NOM
MAX
1.00
1.11
0.06
0.10
0.44
0.50
0.14
0.20
2.90
3.04
1.30
1.40
1.90
2.04
0.43
0.55
0.54
0.69
2.40
2.64
−−−
10 °
MIN
0.035
0.000
0.015
0.003
0.110
0.047
0.070
0.012
0.014
0.083
0°
INCHES
NOM
0.039
0.002
0.017
0.006
0.114
0.051
0.075
0.017
0.021
0.094
−−−
MAX
0.044
0.004
0.020
0.008
0.120
0.055
0.080
0.022
0.027
0.104
10°
GENERIC
MARKING DIAGRAM*
END VIEW
RECOMMENDED
SOLDERING FOOTPRINT
XXXMG
G
1
3X
2.90
3X
XXX = Specific Device Code
M = Date Code
G
= Pb−Free Package
0.90
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
0.95
PITCH
0.80
DIMENSIONS: MILLIMETERS
STYLE 1 THRU 5:
CANCELLED
STYLE 6:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
STYLE 7:
PIN 1. EMITTER
2. BASE
3. COLLECTOR
STYLE 9:
PIN 1. ANODE
2. ANODE
3. CATHODE
STYLE 10:
PIN 1. DRAIN
2. SOURCE
3. GATE
STYLE 11:
STYLE 12:
PIN 1. ANODE
PIN 1. CATHODE
2. CATHODE
2. CATHODE
3. CATHODE−ANODE
3. ANODE
STYLE 15:
PIN 1. GATE
2. CATHODE
3. ANODE
STYLE 16:
PIN 1. ANODE
2. CATHODE
3. CATHODE
STYLE 17:
PIN 1. NO CONNECTION
2. ANODE
3. CATHODE
STYLE 18:
STYLE 19:
STYLE 20:
PIN 1. NO CONNECTION PIN 1. CATHODE
PIN 1. CATHODE
2. CATHODE
2. ANODE
2. ANODE
3. GATE
3. ANODE
3. CATHODE−ANODE
STYLE 21:
PIN 1. GATE
2. SOURCE
3. DRAIN
STYLE 22:
PIN 1. RETURN
2. OUTPUT
3. INPUT
STYLE 23:
PIN 1. ANODE
2. ANODE
3. CATHODE
STYLE 24:
PIN 1. GATE
2. DRAIN
3. SOURCE
STYLE 27:
PIN 1. CATHODE
2. CATHODE
3. CATHODE
STYLE 28:
PIN 1. ANODE
2. ANODE
3. ANODE
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42226B
SOT−23 (TO−236)
STYLE 8:
PIN 1. ANODE
2. NO CONNECTION
3. CATHODE
STYLE 13:
PIN 1. SOURCE
2. DRAIN
3. GATE
STYLE 25:
PIN 1. ANODE
2. CATHODE
3. GATE
STYLE 14:
PIN 1. CATHODE
2. GATE
3. ANODE
STYLE 26:
PIN 1. CATHODE
2. ANODE
3. NO CONNECTION
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−74
CASE 318F
ISSUE P
6
1
SCALE 2:1
DATE 07 OCT 2021
GENERIC
MARKING DIAGRAM*
XXX MG
G
XXX
M
G
= Specific Device Code
= Date Code
= Pb−Free Package
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
STYLE 1:
PIN 1. CATHODE
2. ANODE
3. CATHODE
4. CATHODE
5. ANODE
6. CATHODE
STYLE 2:
PIN 1. NO CONNECTION
2. COLLECTOR
3. EMITTER
4. NO CONNECTION
5. COLLECTOR
6. BASE
STYLE 3:
PIN 1. EMITTER 1
2. BASE 1
3. COLLECTOR 2
4. EMITTER 2
5. BASE 2
6. COLLECTOR 1
STYLE 4:
PIN 1. COLLECTOR 2
2. EMITTER 1/EMITTER 2
3. COLLECTOR 1
4. EMITTER 3
5. BASE 1/BASE 2/COLLECTOR 3
6. BASE 3
STYLE 5:
PIN 1. CHANNEL 1
2. ANODE
3. CHANNEL 2
4. CHANNEL 3
5. CATHODE
6. CHANNEL 4
STYLE 7:
PIN 1. SOURCE 1
2. GATE 1
3. DRAIN 2
4. SOURCE 2
5. GATE 2
6. DRAIN 1
STYLE 8:
PIN 1. EMITTER 1
2. BASE 2
3. COLLECTOR 2
4. EMITTER 2
5. BASE 1
6. COLLECTOR 1
STYLE 9:
PIN 1. EMITTER 2
2. BASE 2
3. COLLECTOR 1
4. EMITTER 1
5. BASE 1
6. COLLECTOR 2
STYLE 10:
PIN 1. ANODE/CATHODE
2. BASE
3. EMITTER
4. COLLECTOR
5. ANODE
6. CATHODE
STYLE 11:
PIN 1. EMITTER
2. BASE
3. ANODE/CATHODE
4. ANODE
5. CATHODE
6. COLLECTOR
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42973B
SC−74
STYLE 6:
PIN 1. CATHODE
2. ANODE
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
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Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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