SVD5803NT4G

NVD5803N Power MOSFET 40 V, 85 A, Single N−Channel, DPAK Features • • • • • Low RDS(on) High Current Capability Avalanche Energy Specified AEC−Q101 Qualified These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant www.onsemi.com V(BR)DSS RDS(on) MAX ID MAX 40 V 5.7 mW @ 10 V 85 A Applications • DC Motor Drive • Reverse Battery Protection • Glow Plug D G MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Symbol Value Unit Drain−to−Source Voltage VDSS 40 V Gate−to−Source Voltage − Continuous VGS "20 V ID 85 A Continuous Drain Current (RqJC) (Note 1) TC = 25°C Steady State Power Dissipation (RqJC) (Note 1) Pulsed Drain Current TC = 100°C TC = 25°C tp = 10 ms Operating Junction and Storage Temperature Source Current (Body Diode) Single Pulse Drain−to−Source Avalanche Energy (VDD = 50 V, VGS = 10 V, RG = 25 W, IL(pk) = 40 A, L = 0.3 mH) Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) S N−CHANNEL MOSFET 4 61 1 2 PD 83 W 3 IDM 228 A TJ, Tstg −55 to 175 °C DPAK CASE 369AA (Surface Mount) STYLE 2 IS 85 A EAS 240 mJ MARKING DIAGRAM & PIN ASSIGNMENT 4 Drain TL °C 260 AYWW V58 03NG Parameter Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 2 1 Drain 3 Gate Source THERMAL RESISTANCE MAXIMUM RATINGS Parameter Symbol Value Unit Junction−to−Case (Drain) RqJC 1.8 °C/W Junction−to−Ambient − Steady State (Note 1) RqJA 42 1. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces. A Y WW 5803N G = Assembly Location* = Year = Work Week = Device Code = Pb−Free Package * The Assembly Location code (A) is front side optional. In cases where the Assembly Location is stamped in the package, the front side assembly code may be blank. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. © Semiconductor Components Industries, LLC, 2016 August, 2016 − Rev. 2 1 Publication Order Number: NVD5803N/D NVD5803N ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Symbol Test Condition Min Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 40 Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/TJ Parameter Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current 40 IDSS Gate−to−Source Leakage Current V VGS = 0 V, VDS = 40 V mV/°C TJ = 25°C 1.0 TJ = 150°C 100 IGSS VDS = 0 V, VGS = ±20 V VGS(TH) VGS = VDS, ID = 250 mA mA ±100 nA 3.5 V ON CHARACTERISTICS (Note 2) Gate Threshold Voltage Negative Threshold Temperature Coefficient VGS(TH)/TJ Drain−to−Source On Resistance Forward Transconductance 1.5 −7.4 RDS(on) gFS mV/°C VGS = 10 V, ID = 50 A 4.9 5.7 mW VGS = 5.0 V, ID = 30 A 6.7 VDS = 15 V, ID = 15 A 13.6 S 3220 pF CHARGES, CAPACITANCES AND GATE RESISTANCES Input Capacitance Ciss VGS = 0 V, f = 1.0 MHz, VDS = 25 V Output Capacitance Coss Reverse Transfer Capacitance Crss 270 Total Gate Charge QG(TOT) 51 Threshold Gate Charge QG(TH) Gate−to−Source Charge QGS Gate−to−Drain Charge QGD 12.7 td(on) 12.6 VGS = 10 V, VDS = 20 V, ID = 50 A 390 nC 3.8 12.7 SWITCHING CHARACTERISTICS (Note 3) Turn−On Delay Time Rise Time tr Turn−Off Delay Time Fall Time td(off) VGS = 10 V, VDD = 32 V, ID = 50 A, RG = 2.0 W tf ns 21.4 28.3 6.6 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge VSD VGS = 0 V, IS = 30 A TJ = 25°C 0.88 TJ = 150°C 0.73 tRR ta tb 1.2 27.2 VGS = 0 V, dIs/dt = 100 A/ms, IS = 30 A QRR V ns 14 13.2 17 nC 2. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%. 3. Switching characteristics are independent of operating junction temperatures. ORDERING INFORMATION Package Shipping† NVD5803NT4G DPAK (Pb−Free) 2500 / Tape & Reel SVD5803NT4G DPAK (Pb−Free) 2500 / Tape & Reel Order Number †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 2 NVD5803N TYPICAL CHARACTERISTICS 160 160 140 4.8 V 100 4.6 V 80 4.4 V 60 4.2 V 40 4.0 V 20 2 3 4 100 80 60 TJ = 25°C 40 TJ = 125°C TJ = −55°C 0 5 2 3 4 5 6 VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V) Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics 0.010 ID = 50 A TJ = 25°C 0.008 0.006 0.004 2 4 6 8 10 VGS, GATE−TO−SOURCE VOLTAGE (V) 0.008 TJ = 25°C 0.007 VGS = 5 V 0.006 VGS = 10 V 0.005 0.004 5 20 35 50 65 80 ID, DRAIN CURRENT (A) Figure 4. On−Resistance vs. Drain Current and Gate Voltage Figure 3. On−Resistance vs. Gate−to−Source Voltage 100000 1.8 1.7 ID = 50 A 1.6 VGS = 10 V VGS = 0 V IDSS, LEAKAGE (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 1 120 20 3.8 V 3.6 V 0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) ID, DRAIN CURRENT (A) VGS = 5 V 120 0 VDS ≥ 10 V 140 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) ID, DRAIN CURRENT (A) TJ = 25°C 10 V 1.5 1.4 1.3 1.2 1.1 1.0 10000 TJ = 150°C TJ = 125°C 1000 0.9 0.8 0.7 −55 −35 −15 5 25 45 65 100 85 105 125 145 165 5 10 15 20 25 30 35 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage www.onsemi.com 3 40 NVD5803N TYPICAL CHARACTERISTICS Ciss C, CAPACITANCE (pF) 3500 VGS, GATE−TO−SOURCE VOLTAGE (V) 15 VGS = 0 V TJ = 25°C 2500 2000 1500 1000 Coss 500 Crss 0 0 10 20 30 9 6 Qgs 12 Qgd 3 6 0 0 5 10 15 25 20 30 35 45 40 50 0 55 DRAIN−TO−SOURCE VOLTAGE (V) Qg, TOTAL GATE CHARGE (nC) Figure 7. Capacitance Variation Figure 8. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge 80 VGS = 0 V TJ = 25°C IS, SOURCE CURRENT (A) 70 100 t, TIME (ns) 18 VGS VDS 40 VDD = 32 V ID = 85 A VGS = 10 V td(off) tr td(on) 10 tf 1 1 10 100 60 50 40 30 20 10 0 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 RG, GATE RESISTANCE (W) VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current 1000 250 VGS = 10 V Single Pulse TC = 25°C 100 10 ms 100 ms 10 1 ms 10 ms dc RDS(on) Limit Thermal Limit Package Limit 0.1 0.1 1 10 EAS, SINGLE PULSE DRAIN−TO− SOURCE AVALANCHE ENERGY (mJ) ID, DRAIN CURRENT (A) 24 QT 1000 1 TJ = 25°C 12 3000 30 ID = 50 A VDS, DRAIN−TO−SOURCE VOLTAGE (V) 4000 100 ID = 85 A 200 150 100 50 0 25 50 75 100 125 150 VDS, DRAISN VOLTAGE (V) TJ, STARTING JUNCTION TEMPERATURE (°C) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature www.onsemi.com 4 175 NVD5803N RqJC(t) (°C/W) EFFECTIVE TRANSIENT THERMAL RESISTANCE TYPICAL CHARACTERISTICS 10 1 Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 0.01 Single Pulse 0.01 0.000001 0.00001 0.0001 0.001 0.01 PULSE TIME (sec) Figure 13. Thermal Response www.onsemi.com 5 0.1 1 10 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS DPAK (SINGLE GUAGE) CASE 369AA−01 ISSUE B 4 1 2 DATE 03 JUN 2010 3 SCALE 1:1 A E b3 c2 B Z D 1 L4 A 4 L3 2 b2 H DETAIL A 3 c b 0.005 (0.13) e M H C L2 GAUGE PLANE C L L1 DETAIL A A1 ROTATED 905 CW STYLE 1: PIN 1. BASE 2. COLLECTOR 3. EMITTER 4. COLLECTOR STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN STYLE 3: PIN 1. ANODE 2. CATHODE 3. ANODE 4. CATHODE STYLE 5: PIN 1. GATE 2. ANODE 3. CATHODE 4. ANODE STYLE 6: PIN 1. MT1 2. MT2 3. GATE 4. MT2 STYLE 7: PIN 1. GATE 2. COLLECTOR 3. EMITTER 4. COLLECTOR STYLE 4: PIN 1. CATHODE 2. ANODE 3. GATE 4. ANODE SOLDERING FOOTPRINT* 6.20 0.244 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. C 2.58 0.102 5.80 0.228 3.00 0.118 1.60 0.063 INCHES MIN MAX 0.086 0.094 0.000 0.005 0.025 0.035 0.030 0.045 0.180 0.215 0.018 0.024 0.018 0.024 0.235 0.245 0.250 0.265 0.090 BSC 0.370 0.410 0.055 0.070 0.108 REF 0.020 BSC 0.035 0.050 −−− 0.040 0.155 −−− MILLIMETERS MIN MAX 2.18 2.38 0.00 0.13 0.63 0.89 0.76 1.14 4.57 5.46 0.46 0.61 0.46 0.61 5.97 6.22 6.35 6.73 2.29 BSC 9.40 10.41 1.40 1.78 2.74 REF 0.51 BSC 0.89 1.27 −−− 1.01 3.93 −−− GENERIC MARKING DIAGRAM* XXXXXXG ALYWW YWW XXX XXXXXG IC Discrete XXXXXX A L Y WW G 6.17 0.243 SCALE 3:1 SEATING PLANE DIM A A1 b b2 b3 c c2 D E e H L L1 L2 L3 L4 Z = Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98AON13126D DPAK (SINGLE GAUGE) Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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