VN2410LG

   Order this document by VN2410L/D SEMICONDUCTOR TECHNICAL DATA     N–Channel — Enhancement  3 DRAIN 2 GATE 1 SOURCE MAXIMUM RATINGS Rating Symbol Value Unit Drain – Source Voltage VDSS 240 Vdc Drain – Gate Voltage VDGR 60 Vdc Gate – Source Voltage – Continuous – Non–repetitive (tp ≤ 50 µs) VGS VGSM ± 20 ± 40 Vdc Vpk Continuous Drain Current ID 200 mAdc Pulsed Drain Current IDM 500 mAdc Power Dissipation @ TC = 25°C Derate above 25°C PD 350 2.8 mW mW/°C TJ, Tstg — °C Characteristic Symbol Max Unit Thermal Resistance, Junction to Ambient RθJA 312.5 °C/W Maximum Lead Temperature for Soldering Purposes, 1/16″ from case for 10 seconds TL 300 °C Operating and Storage Temperature 1 2 3 CASE 29–04, STYLE 22 TO–92 (TO–226AA) THERMAL CHARACTERISTICS ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Characteristic Symbol Min Max Unit V(BR)DSS 240 — Vdc — — 10 500 STATIC CHARACTERISTICS Drain – Source Breakdown Voltage (VGS = 0, ID = 100 µA) µAdc Zero Gate Voltage Drain Current (VDS = 120 Vdc, VGS = 0) (VDS = 120 Vdc, VGS = 0, TA = 125°C) IDSS Gate– Body Leakage (VDS = 0, VGS = ±15 V) IGSS — ±100 nAdc Gate Threshold Voltage (VDS = VGS, ID = 1.0 mA) On–State Drain Current(1) (VGS = 10 V, VDS ≥ 2.0 VDS(on)) VGS(th) 0.8 2.0 Vdc ID(on) 1.0 — Adc Drain–Source On Resistance(1) (VGS = 2.5 V, ID = 0.1 A) (VGS = 10 V, ID = 0.5 A) Forward Transconductance(1) (VDS = 10 V, ID = 0.5 A) rDS(on) — — 10 10 300 — 1. Pulse Test; Pulse Width < 300 µs, Duty Cycle gfs Ω mS v 2.0%. TMOS is a registered trademark of Motorola, Inc. REV 1 Motorola Small–Signal Transistors, FETs and Diodes Device Data  Motorola, Inc. 1997 1 VN2410L ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Continued) Characteristic Symbol Min Max Unit Ciss — 125 pF Coss — 50 pF Crss — 20 pF t(on) — 8.0 ns t(r) — 8.0 ns t(off) — 23 ns t(f) — 34 ns DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance (VDS = 25 Vdc, Vdc VGS = 0, 0 f = 1.0 MHz) Reverse Transfer Capacitance SWITCHING CHARACTERISTICS Turn–On Time (VDD = 60 Vdc, Vdc ID = 0.4 0 4 A, A RL = 150 Ω, RG = 25 Ω) Turn–Off Time 2 Motorola Small–Signal Transistors, FETs and Diodes Device Data VN2410L PACKAGE DIMENSIONS A NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS UNCONTROLLED. 4. DIMENSION F APPLIES BETWEEN P AND L. DIMENSION D AND J APPLY BETWEEN L AND K MINIMUM. LEAD DIMENSION IS UNCONTROLLED IN P AND BEYOND DIMENSION K MINIMUM. B R P L F SEATING PLANE K D X X G J H V C SECTION X–X 1 N N CASE 029–04 (TO–226AA) ISSUE AD Motorola Small–Signal Transistors, FETs and Diodes Device Data DIM A B C D F G H J K L N P R V INCHES MIN MAX 0.175 0.205 0.170 0.210 0.125 0.165 0.016 0.022 0.016 0.019 0.045 0.055 0.095 0.105 0.015 0.020 0.500 ––– 0.250 ––– 0.080 0.105 ––– 0.100 0.115 ––– 0.135 ––– MILLIMETERS MIN MAX 4.45 5.20 4.32 5.33 3.18 4.19 0.41 0.55 0.41 0.48 1.15 1.39 2.42 2.66 0.39 0.50 12.70 ––– 6.35 ––– 2.04 2.66 ––– 2.54 2.93 ––– 3.43 ––– STYLE 22: PIN 1. SOURCE 2. GATE 3. DRAIN 3 VN2410L Motorola reserves the right to make changes without further notice to any products herein. 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