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PJP75N75

PJP75N75

  • 厂商:

    PANJIT(强茂)

  • 封装:

  • 描述:

    PJP75N75 - 75V N-Channel Enhancement Mode MOSFET - Pan Jit International Inc.

  • 数据手册
  • 价格&库存
PJP75N75 数据手册
PJP75N75 75V N-Channel Enhancement Mode MOSFET FEATURES • RDS(ON), VGS@10V,IDS@30A=12mΩ • RDS(ON), VGS@4.5V,IDS@30A=18mΩ • Advanced Trench Process Technology • High Density Cell Design For Ultra Low On-Resistance • Specially Designed for Converters and Power Motor Controls • Fully Characterized Avalanche Voltage and Current • Pb free product : 99% Sn above can meet RoHS environment substance directive request MECHANICAL DATA • Case: TO-220AB Molded Plastic • Terminals : Solderable per MIL-STD-750,Method 2026 • Marking : P75N75 Drain PIN Assignment Gate 1. Gate 2. Drain 3. Source Source Maximum RATINGS and Thermal Characteristics (TA=25OC unless otherwise noted ) PA RA M E TE R D r a i n- S o ur c e Vo l t a g e G a t e - S o ur c e Vo l t a g e C o nt i nuo us D r a i n C ur r e nt P ul s e d D r a i n C ur r e nt 1) S ym b o l VD S VGS ID ID M TA = 2 5 O C TA = 7 5 O C PD TJ , TS T G EAS RθJ C RθJ A Li mi t 75 +20 75 350 105 6 2 .5 -5 5 to + 1 5 0 420 1 .2 62 U ni t s V V A A W O M a xi m um P o w e r D i s s i p a t i o n O p e r a t i n g J u n c t i o n a n d S t o r a g e Te m p e r a t u r e R a n g e Avalanche Energy with Single Pulse ID=41A, VDD=25V, L=0.5mH Junction-to-Case Thermal Resistance Junction-to Ambient Thermal Resistance(PCB mounted)2 C mJ O C /W C /W O Note: 1. Maximum DC current limited by the package PAN JIT RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE STAD-JUN.27.2006 PAGE . 1 PJP75N75 ELECTRICALCHARACTERISTICS P a ra me te r S ta ti c D r a i n- S o ur c e B r e a k d o w n Vo l t a g e G a t e Thr e s ho l d Vo l t a g e D r a i n- S o ur c e O n- S t a t e R e s i s t a nc e D r a i n- S o ur c e O n- S t a t e R e s i s t a nc e Ze r o G a t e Vo l t a g e D r a i n C ur r e nt Gate Body Leakage Forward Transconductance Dynamic V D S = 3 0 V , ID = 3 0 A , V G S = 5 V To t a l G a t e C h a r g e Qg G a t e - S o ur c e C ha r g e G a t e - D r a i n C ha r g e Tu r n - O n D e l a y Ti m e Tu r n - O n R i s e Ti m e Tu r n - O f f D e l a y Ti m e Tu r n - O f f F a l l Ti m e In p u t C a p a c i t a n c e O ut p ut C a p a c i t a nc e R e v e r s e Tr a n s f e r C a p a c i t a n c e S o ur c e - D r a i n D i o d e M a x. D i o d e F o r w a r d C ur r e nt D i o d e F o rwa rd Vo lta g e Is VSD IS = 3 0 A , V G S = 0 V 0 .9 2 75 1 .5 A V Qg s Qg d Td ( o n ) trr td (o ff) tf Ciss Coss C rs s V D S =2 5 V, V G S =0 V f=1 .0 MHZ VD D =30V , RL =15Ω ID =2A , VG E N =10V RG =2.5Ω V D S = 3 0 V , ID = 3 0 A V G S =10V 6 3 .5 9 .2 15 18.5 16.5 52 8 .1 3200 260 210 nC 20 14 ns 68 12 pF 33 BVD SS V G S (th) RD S (o n) RD S (o n) ID S S IG S S g fS V G S = 0 V , ID = 2 5 0 u A V D S = V G S , ID = 2 5 0 u A VG S =4.5V, ID =30A VG S =10V, ID =30A VD S =60V, VG S =0V V G S =+2 0 V, V D S =0 V V D S = 1 0 V , ID = 1 5 A 75 1 30 1 4 .2 9.5 3 18 mΩ 12 1 +100 uA nA S V V S ym b o l Te s t C o n d i t i o n M i n. Ty p . M a x. U ni t s Switching Test Circuit V IN V DD RL Gate Charge Test Circuit V GS V DD RL V OUT RG 1mA RG STAD-JUN.27.2006 PAGE . 2 PJP75N75 Typical Characteristics Curves (TA=25OC,unless otherwise noted) 100 ID - Drain-to-Source Current (A) 5.0V 4.5V 80 60 ID - Drain Source Current (A) 10V 6.0V 100 80 60 40 V DS=10V 4.0V 40 3.5V 20 0 0 1 2 3 4 5 V DS - Drain-to-Source Voltage (V) 3.0V 2.5V T J=25 OC 20 T J=125 OC 0 1 1.5 2 2.5 3 T J=-55 OC 3.5 4 4.5 5 V GS - Gate-to-Source Voltage (V) Fig. 1-TYPICAL FORWARD CHARACTERISTIC FIG.1- Output Characteristic FIG.2- Transfer Characteristic 30 50 R DS(ON) - On-Resistance (m W ) R DS(ON) - On-Resistance (m W ) ID =30A 40 25 20 15 10 5 0 0 20 40 60 80 100 ID - Drain Current (A) V GS=4.5V 30 20 T J=125 OC T J=25 OC V GS=10V 10 0 2 4 6 8 10 V GS - Gate-to-Source Voltage (V) FIG.3- On Resistance vs Drain Current FIG.4- On Resistance vs Gate to Source Voltage RDS(ON) - On-Resistance (Normalized) 2 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 V GS=10V I D=30A -50 -25 0 25 50 75 100 125 150 TJ - Junction Tem perature (oC) FIG.5- On Resistance vs Junction Temperature STAD-JUN.27.2006 PAGE . 3 PJP75N75 VGS - Gate-to-Source Voltage (V) 10 8 6 4 2 0 0 10 20 30 40 50 60 70 Qg - Gate Charge (nC) Vgs Qg V DS =30V I D =30A Vgs(th) Qsw Qg(th) Qgs Qgd Qg Fig.6 - Gate Charge Waveform Fig.7 - Gate Charge 1.3 Vth - G-S Threshold Voltage (NORMALIZED) 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 -50 BVDSS - Breakdown Voltage (NORMALIZED) I D =250uA 1.2 1.15 1.1 1.05 1 0.95 I D =250uA -25 0 25 50 75 100 125 TJ - Junction Tem perature ( oC) 150 0.9 -50 -25 0 25 50 75 100 125 150 TJ - Junction Tem perature ( oC) Fig.8 - Threshold Voltage vs Temperature Fig.9 - Breakdown Voltage vs Junction Temperature 100 V GS =0V IS - Source Current (A) 10 1 T J =125 OC T J =25 OC T J =-55 OC 0.1 0.2 0.4 0.6 0.8 1 1.2 1.4 V SD - Source-to-Drain Voltage (V) 1.6 Fig.10 - Source-Drain Diode Forward Voltage LEGAL STATEMENT Copyright PanJit International, Inc 2006 The information presented in this document is believed to be accurate and reliable. The specifications and information herein are subject to change without notice. Pan Jit makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose. Pan Jit products are not authorized for use in life support devices or systems. Pan Jit does not convey any license under its patent rights or rights of others. STAD-JUN.27.2006 PAGE . 4
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