HAF2017-90L

HAF2017(L), HAF2017(S) Silicon N Channel Power MOS FET Power Switching REJ03G0234-0200Z (Previous ADE-208-1637 (Z)) Rev.2.00 Apr.13.2004 Descriptions This FET has the over temperature shutdown capability sensing the junction temperature. This FET has the built-in over temperature shutdown circuit in the gate area. And this circuit operation to shutdown the gate voltage in case of high junction temperature like applying over power consumption, over current etc.. Features • • • • Logic level operation (4 to 6 V Gate drive) High endurance capability against to the short circuit Built-in the over temperature shutdown circuit Latch type shutdown operation (Need 0 voltage recovery) Outline D LDPAK(L) 4 G LDPAK(S)-1 4 Gate Resistor Temperature Sensing Circuit Latch Circuit Gate Shutdown Circuit 1 1 2 3 2 3 1. Gate 2. Drain 3. Source 4. Drain S Rev.2.00, Apr.13.2004, page 1 of 8 HAF2017(L), HAF2017(S) Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate to source voltage Gate to source voltage Drain current Drain peak current Body-drain diode reverse drain current Channel dissipation Channel temperature Storage temperature Notes: 1. PW ≤ 10µs, duty cycle ≤ 1% 2. Value at Tch = 25°C Symbol VDSS VGSS VGSS ID ID (pulse) IDR PchNote2 Tch Tstg Note1 Rating 60 16 –2.5 20 40 20 50 150 –55 to +150 Unit V V V A A A W °C °C Typical Operation Characteristics (Ta = 25°C) Item Input voltage Input voltage Input current (Gate non shut down) Input current (Gate non shut down) Input current (Gate non shut down) Input current (Gate shut down) Input current (Gate shut down) Shutdown temperature Gate operation voltage Symbol VIH VIL IIH1 IIH2 IIL IIH(sd)1 IIH(sd)2 Tsd VOP Min 3.5 — — — — — — — 3.5 Typ — — — — — 0.8 0.35 175 — Max — 1.2 100 50 1 — — — 12 Unit V V µA µA µA mA mA °C V Test Conditions Vi = 8V, VDS =0 Vi = 3.5V, VDS =0 Vi = 1.2V, VDS =0 Vi = 8V, VDS =0 Vi = 3.5V, VDS =0 Channel temperature Rev.2.00, Apr.13.2004, page 2 of 8 HAF2017(L), HAF2017(S) Electrical Characteristics (Ta = 25°C) Item Darin current Darin current Drain to source breakdown voltage Gate to source breakdown voltage Gate to source leak current Symbol ID1 ID2 V(BR)DSS V(BR)GSS V(BR)GSS IGSS1 IGSS2 IGSS3 IGSS4 IGS(OP)1 IGS(OP)2 IDSS VGS(off) |yfs| RDS(on) RDS(on) Coss td(on) tr td(off) tf VDF trr tos1 tos2 Min 1 — 60 16 –2.5 — — — — — — — 1.4 6 — — — — — — — — — — — Typ — — — — — — — — — 0.8 0.35 — — 21 35 27 460 8.7 44.6 2 2.6 0.9 120 0.97 0.57 Max — 10 — — — 100 50 1 –100 — — 10 2.6 — 53 43 ― ― — ― — — — — — Unit A mA V V V µA µA µA µA mA mA µA V S mΩ mΩ pF µs µs µs µs V ns ms ms Test conditions VGS = 3.5 V, VDS = 2 V VGS = 1.2 V, VDS = 2 V ID = 10 mA, VGS =0 IG = 800 µA, VDS =0 IG = –100 µA, VDS =0 VGS = 8 V, VDS =0 VGS = 3.5 V, VDS =0 VGS = 1.2 V, VDS =0 VGS = –2.4 V, VDS =0 VGS = 8 V, VDS =0 VGS = 3.5 V, VDS =0 VDS = 60 V, VGS = 0 VDS = 10 V, ID = 1 mA ID =10 A, VDS =10 VNote3 ID = 10 A, VGS = 4.5 VNote3 ID = 10 A, VGS = 10 VNote3 VDS = 10 V, VGS =0, f = 1 MHz VGS = 5 V, ID= 10 A, RL = 3 Ω Input current (shut down) Zero gate voltage drain current Gate to source cutoff voltage Forward transfer admittance Static drain to source on state resistance Output capacitance Turn-on delay time Rise time Turn-off delay time Fall time Body-drain diode forward voltage Body-drain diode reverse recovery time Over load shut down operation timeNote4 IF = 20A, VGS = 0 IF = 20 A, VGS = 0, diF/dt = 50 A/µs VGS = 5 V, VDD = 16 V VGS = 5 V, VDD = 24 V Notes: 3. Pulse test 4. Include the time shift based on increasing of channel temperature when operate under over load condition. Rev.2.00, Apr.13.2004, page 3 of 8 HAF2017(L), HAF2017(S) Main Characteristics Power vs. Temperature Derating 80 500 200 60 Maximum Safe Operation Area Thermal shut down operation area 10 µs 10 Channel Dissipation Pch (W) Drain Current ID (A) 100 50 20 10 5 Operation in this area 2 is limited RDS(on) 1 0.5 Ta = 25°C 0.3 0.5 1 2 0 µs 40 1 m s 20 PW DC = 1 0 (T O c = pe ms 25 ratio °C )n 0 50 100 150 200 5 10 20 50 100 Case Temperature Tc (°C) Drain to Source voltage VDS (V) 50 Typical Output Characteristics 10 V 8V Pulse Test Typical Transfer Characteristics 50 VDS = 10 V Pulse Test 40 40 Drain Current ID (A) 6V 30 5V 4V VGS = 3.5 V 10 Drain Current ID (A) 30 Tc = -25°C 25°C 20 75°C 20 10 0 2 4 6 Drain to Source Voltage 8 10 VDS (V) 0 2 4 6 8 10 Gate to Source Voltage VGS (V) Static Drain to Source On State Resistance RDS(on) (mΩ) Drain Source Saturation Voltage vs. Gate to Source Voltage Static Drain to Source State Resistance vs. Drain Current 1000 300 100 VGS = 4.5 V 30 VGS = 10 V 10 3 Pulse Test 1 0.1 0.3 1 3 10 30 Drain Current ID (A) 100 Drain to Source Saturation Voltage VDS(on) (V) 1.0 Pulse Test 0.8 ID = 20 A 0.6 0.4 10 A 0.2 5A 0 2 4 6 Gate to Source Voltage 8 10 VGS (V) Rev.2.00, Apr.13.2004, page 4 of 8 HAF2017(L), HAF2017(S) Static Drain to Source on State Resistance vs. Temperature 100 Pulse Test 80 ID = 20 A 60 VGS = 4.5 V ID = 20 A 5A VGS = 10 V 0 25 50 75 100 125 150 Tc (°C) 10 A 10 A 5A Forward Transfer Admittance vs. Drain Current VDS = 10 V Pulse Teat 10 25°C 1 75°C Tc = -25°C Static Drain to Source On State Resistance RDS(on) (mΩ) 40 Forward Transfer Admittance |yfs| (S) 100 20 0 -25 0.1 0.01 0.01 0.1 1 10 100 Case Temperature Drain Current ID (A) Body-Drain Diode Reverse Recovery Time 1000 100 di / dt = 50 A / µs V GS = 0, Ta = 25°C Switching Characteristics V GS = 5 V, V DD = 30 V 50 PW = 300 µs, duty < 1 % tr 20 10 5 2 1 0.1 tf t d(off) 0.3 1 3 10 30 Drain Current ID (A) 100 t d(on) Reverse Recovery Time trr (ns) 500 200 100 50 20 10 0.1 0.3 1 3 10 30 100 Reverse Drain Current IDR (A) Reverse Drain Current vs. Source to Drain Voltage Pulse Test Switching Time t (µs) 50 10000 Typical Capacitance vs. Drain to Source Voltage Reverse Drain Current IDR (A) Capacitance C (pF) 40 1000 Coss 30 VGS = 0 V 20 10 V 5V 100 VGS = 0 f = 1 MHz 10 10 0 0.4 0.8 1.2 1.6 2.0 0 Source to Drain Voltage VDS (V) 10 20 30 40 50 60 Drain to Source Voltage VDS (V) Rev.2.00, Apr.13.2004, page 5 of 8 HAF2017(L), HAF2017(S) Gate to Source Voltage vs. Shutdown Time of Load-Short Test 12 10 Shutdown Case Temperature Tc (°C) VGS (V) Shutdown Case Temperature vs. Gate to Source Voltage 200 180 Gate to Source Voltage VDD = 16 V 24 V 5 160 140 120 100 0 ID = 5 A 0 100µ 1m 10m 100m 2 4 6 8 VGS (V) 10 Shutdown Time of Load-Short Test Pw (S) Gate to Source Voltage Normalized Transient Thermal Impedance vs. Pulse Width Normalized Transient Thermal Impedance γs (t) 3 Tc = 25°C 1 D=1 0.5 0.3 0.2 0.1 0.1 0.05 0.02 θch - c(t) = γs (t) • θch - c θch - c = 2.5°C/W, Tc = 25°C PDM PW T D= 0.03 PW T 1 lse 0.0 pu ot h 1s 0.01 10 µ 100 µ 1m 10 m Pulse Width PW (S) 100 m 1 10 Rev.2.00, Apr.13.2004, page 6 of 8 HAF2017(L), HAF2017(S) Package Dimensions As of January, 2003 Unit: mm (1.4) 4.44 ± 0.2 10.2 ± 0.3 1.3 ± 0.15 11.3 ± 0.5 0.3 10.0 + 0.5 – 8.6 ± 0.3 1.3 ± 0.2 1.37 ± 0.2 0.76 ± 0.1 2.54 ± 0.5 2.54 ± 0.5 11.0 ± 0.5 0.2 0.86 + 0.1 – 2.49 ± 0.2 0.4 ± 0.1 Package Code JEDEC JEITA Mass (reference value) LDPAK (L) — — 1.40 g As of January, 2003 Unit: mm 4.44 ± 0.2 10.2 ± 0.3 (1.4) 8.6 ± 0.3 + 0.3 – 0.5 10.0 (1.5) (1.5) 2.49 ± 0.2 0.2 0.1 + 0.1 – 7.8 7.0 2.2 1.37 ± 0.2 0.3 3.0 + 0.5 – 1.3 ± 0.2 2.54 ± 0.5 0.2 0.86 + 0.1 – 0.4 ± 0.1 2.54 ± 0.5 Package Code JEDEC JEITA Mass (reference value) LDPAK (S)-(1) — — 1.30 g Rev.2.00, Apr.13.2004, page 7 of 8 1.7 1.3 ± 0.15 7.8 6.6 HAF2017(L), HAF2017(S) Ordering Information Part Name HAF2017-90L HAF2017-90S HAF2017-90STL HAF2017-90STR Quantity Max: 50 pcs/ sack Max: 50 pcs/ sack 1000 pcs/ Reel 1000 pcs/ Reel Shipping Container Sack Sack Embossed tape Embossed tape Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.2.00, Apr.13.2004, page 8 of 8 Sales Strategic Planning Div. Keep safety first in your circuit designs! Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein. RENESAS SALES OFFICES Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: (408) 382-7500 Fax: (408) 382-7501 Renesas Technology Europe Limited. Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, United Kingdom Tel: (1628) 585 100, Fax: (1628) 585 900 Renesas Technology Europe GmbH Dornacher Str. 3, D-85622 Feldkirchen, Germany Tel: (89) 380 70 0, Fax: (89) 929 30 11 Renesas Technology Hong Kong Ltd. 7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Hong Kong Tel: 2265-6688, Fax: 2375-6836 Renesas Technology Taiwan Co., Ltd. FL 10, #99, Fu-Hsing N. Rd., Taipei, Taiwan Tel: (2) 2715-2888, Fax: (2) 2713-2999 Renesas Technology (Shanghai) Co., Ltd. 26/F., Ruijin Building, No.205 Maoming Road (S), Shanghai 200020, China Tel: (21) 6472-1001, Fax: (21) 6415-2952 Renesas Technology Singapore Pte. Ltd. 1, Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: 6213-0200, Fax: 6278-8001 http://www.renesas.com © 2004. Renesas Technology Corp., All rights reserved. Printed in Japan. Colophon .1.0