BD9833KV

1/4 STRUCTURE Silicon Monolithic Integrated Circuit TYPE 8 Channel Switching Regulator Controller and 1 Series Regulator for DVC PRODUCT SERIES FEATURES ＢＤ９８３３ＫＶ ・ 8 DC/DC controller,1 Series Regulator ・ DC/DC controller: FET direct driver (Pch driver:7ch, Nch driver:1ch) ・ Series Regulator: Variable output voltage stable with Ceramic Output Capacitor ・ Package: VQFP48C(0.5mm pitch) ○Absolute maximum ratings （Ta=25℃） Parameter Symbol Power Supply Voltage1 Power Supply Voltage2 Power Dissipation Operating Temperature Storage Temperature VCC,VIN2345,VIN6789 Limits 12 12 600(*1) 950(*2) -25～+85 -55～+125 Units V V mW mW ℃ ℃ VIN1 Pd Topr Tstg (*1) Without external heat sink, the power dissipation degrades by 6.0mW/℃ above 25℃. (*2) Power dissipation degrades by 9.5mW/℃ above 25℃, when mounted on a PCB (70.0mm×70.0mm×1.6mm). ○Recommended operating conditions（Ta=-25～+75℃） Parameter Symbol VCC,VIN2345,VIN6789 Spec. 4.0～10 2.8～10 Units Power Supply Voltage Oscillator Frequency VIN1 fosc V 100kHz～1.2MHz Status of this document REV.B 2/4 ○Electrical characteristics（Ta=25℃，VCC=7V, VIN1=7V STB=3V, Spec. Parameter ■DC/DC controller 【Reference Voltage】 Reference Voltage Line Regulation Load Regulation Short-Circuit Output Current 【Load Regulation】 Short-Circuit Output Current1(VCC) Hysteresis width (VCC) Threshold Voltage 2(VREF) 【Soft start】 Soft standby voltage Input Source Current 【Protection Circuit】 INV Threshold Voltage SCP Output Current SCP Threshold Voltage SCP Standby Voltage 【Triangular wave oscillator】 Oscillator Frequency Frequency Stability (Vcc) RT Output Voltage ■DC/DC controller 【Reference Voltage】 Reference Voltage Line Regulation Load Regulation Short-Circuit Output Current 【Load Regulation】 Short-Circuit Output Current1(VCC) Hysteresis width (VCC) Threshold Voltage 2(VREF) 【Soft start】 Soft standby voltage Input Source Current 【Protection Circuit】 INV Threshold Voltage 【PWM Comparator】 Input Threshold Voltage 2,3,4,5,6,7,8,9 【FET Driver】 ON Resistance Current Ability 【Control】 STB Threshold Voltage STB Input Current STB5,6 Threshold Voltage STB5,6 Input Current 【Circuit Current】 Standby Current Circuit Current on Driving 【Series Regulator】 Output Voltage Reference Voltage Output Current Ability The Difference between Input voltage and output voltage Line Regulation11 Line Regulation12 Load Regulation1 Load Regulation2 Short-Circuit Output Current Circuit Current VOUT1 pin Connect Capacitor Vo1 VFB1 Io1 DV1 DVLi11 DVLi12 DVLo1 DVLo2 Ios1 IVIN1 COUT 2.94 0.98 300 70 -140 40 2.2 3.00 1.00 120 4 4 10 30 -70 80 － 3.06 1.02 250 10 10 30 90 -35 160 － V V mA mV mV mV mV mV mA μA μF VIN1=VOUT1x0.97, IOUT1=20mA VIN1=4V to10V IOUT1=100mA VIN1=3.5V to10V IOUT1=10mA IOUT1=1mA to 100mA IOUT1=1mA to 300mA VOUT1=0V IOUT1=0mA R1=200KΩ,R2=100KΩRefer to below figure RonHI1 RonLO1 Isink1 Isource1 Vstb Istb Vstb5,6 Istb5,6 Iccs Icc 7 6 70 -240 1.0 1.0 1 14 12 170 -160 1.5 1.5 0 5 21 18 250 -80 2.0 30 2.0 30 5 10 Ω Ω mA mA V μA V μA μA mA VG2,3,4,5,6,7,8,9 VG2,3,4,5,6,7,8,9 VG2,3,4,5,6,7,8,9 VG2,3,4,5,6,7,8,9 VG=”H” VG=”L” VG=”L” VG=”H” Vref DVLi DVLo Ios Vstd1 ΔVst1 Vstd2 Vsso1 ISOFT1 2.475 -40 3.55 0.6 2.2 -2.0 2.500 -12 3.65 0.11 2.3 10 -1.0 2.525 10 10 -5 3.75 0.16 2.4 100 -0.5 V mV mV mA V V V mV μA CH2,3,4,5,6,7, INV Voltage“L” detect VSCP=0.75V Vcc=4.0V～10V Iref=-0.1mA～ -1.0mA Vref=0V VCC monitor Sweep down VREF monitor Symbol Min. Typ. Max Units unless otherwise specified） Conditions. Vscpth Iscp Vtsc Vssc fosc Df VRT Vthea VOFST Ibias1 Ibias2 Ibias3 AV BW Vfbh Vfbl Isink1 Isink2 Isource1 Isource2 VCM Vt0 Vt100 0.65 -3.0 1.4 580 0.95 0.980 -150 -170 -170 50 0.5 Vref -0.1 1.3 3.4 -240 -280 0 1.730 2.090 0.75 -2.0 1.5 10 680 0.3 1.00 1.00 0 -40 -40 65 1 0.85 -1.5 1.6 100 780 2 1.05 1.020 10 150 80 2 V μA V mV kHz % V V mV nA nA nA dB MHz RT=11kohm,CT=180pF VCC=4.0～10V CH2,3,4,5,6,7 CH8,9 CH2,3,4,5,6,7 INV pin CH8,9 INV pin CH8,9 NON pin DC Design Guarantee AV=0dB Design Guarantee 2.6 6.7 -150 -190 1.820 2.180 0.1 3.9 10 -90 -130 VCC-2 1.910 2.270 V V mA mA μA μA V V V DUTY0% DUTY100% STB=3V STB5,6=3V STB=0V REV. B 3/4 ○Package Dimensions ○Pin Description 番号 1 2 3 4 5 6 7 8 9 10 11 12 13 14 端子名 INV5 FB5 INV6 FB6 INV7 FB7 NON8 INV8 FB8 NON9 INV9 FB9 VG9 VG8 VIN6789 PGND6789 VG7 VG6 VG5 VG4 VIN2345 PGND2345 VG3 VG2 FB2 INV2 FB3 INV3 STB GND FB4 INV4 STB5 STB6 STB1 VOUT1 VIN1 FB1 N.C. SCP SOFT VREF VCC CT RT DTC5 DTC6 DTC7 機能 Error Amp inverted input（CH5) Error Amp output (CH5) Error Amp inverted input（CH6) Error Amp output (CH6) Error Amp inverted input（CH7) Error Amp output (CH7) Error Amp non-inverted input（CH8) Error Amp inverted input（CH8) Error Amp output (CH8) Error Amp non-inverted input（CH9) Error Amp inverted input（CH9) Error Amp output (CH9) FET Driver Output (CH9) FET Driver Output (CH8) Power supply for the output circuit (CH6,7,8,9) Power Ground for the output circuit (CH6,7,8,9) FET Driver Output (CH7) FET Driver Output (CH6) FET Driver Output (CH5) FET Driver Output (CH4) Power supply for the output circuit (CH2,3,4,5) Power Ground for the output circuit (CH2,3,4,5) FET Driver Output (CH3) FET Driver Output (CH2) Error Amp output (CH2) Error Amp inverted input（CH2) Error Amp output (CH3) Error Amp inverted input（CH3) SW for CH2～9，Hi：Operating Ground Error Amp output (CH4) Error Amp inverted input（CH4) SW for CH5，Hi：Operating SW for CH6，Hi：Operating SW for CH1，Hi：Operating Series Regulator Output Power supply for Series Regulator Amp inverted input Non-Connected pin A capacitor is placed to set up the delay time of the SCP Soft start/This pin connects to a capacitor to set up the start-up time Reference Voltage Output pin Power supply for DC/DC A capacitor is to set up the triangular-wave frequency A resistor is to set up the triangular-wave frequency Dead time control pin for CH5 Dead time control pin for CH6 Dead time control pin for CH7.And this pin connects to a capacitor to set up the start-up time. VQFP48C （Unit:mm） 15 16 17 18 ○Block Diagram 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 REV. B 4/4 ○Operation Notes 1) Absolute maximum ratings Use of the IC in excess of absolute maximum ratings such as the applied voltage or operating temperature range may result in IC deterioration or damage. Assumptions should not be made regarding the state of the IC (short mode or open mode) when such damage is suffered. A physical safety measure such as a fuse should be implemented when use of the IC in a special mode where the absolute maximum ratings may be exceeded is anticipated. 2) GND potential Ensure a minimum GND pin potential in all operating conditions. In addition, ensure that no pins other than the GND pin carry a voltage lower than or equal to the GND pin, including during actual transient phenomena. 3) Thermal design Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions. 4) Inter-pin shorts and mounting errors Use caution when orienting and positioning the IC for mounting on printed circuit boards. Improper mounting may result in damage to the IC. Shorts between output pins or between output pins and the power supply and GND pin caused by the presence of a foreign object may result in damage to the IC. 5) Operation in a strong electromagnetic field Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction. 6) Thermal shutdown circuit (TSD circuit) This IC incorporates a built-in thermal shutdown circuit (TSD circuit). The TSD circuit is designed only to shut the IC off to prevent runaway thermal operation. Do not continue to use the IC after operating this circuit or use the IC in an environment where the operation of the thermal shutdown circuit is assumed. 7) Testing on application boards When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress. Always discharge capacitors after each process or step. Ground the IC during assembly steps as an antistatic measure, and use similar caution when transporting or storing the IC. Always turn the IC's power supply off before connecting it to or removing it from a jig or fixture during the inspection process. 8) Common impedance Power supply and ground wiring should reflect consideration of the need to lower common impedance and minimize ripple as much as possible (by making wiring as short and thick as possible or rejecting ripple by incorporating inductance and capacitance). 9) Applications with modes that reverse VCC and pin potentials may cause damage to internal IC circuits. For example, such damage might occur when VCC is shorted with the GND pin while an external capacitor is charged. It is recommended to insert a diode for preventing back current flow in series with VCC or bypass diodes between VCC and each pin. Bypass diode Back current prevention diode VCC Output Pin 10) Timing resistor Timing resistor connected between RT and GND, has to be placed near RT terminal (45pin). With the connection must be as short as possible. 11) IC pin input This monolithic IC contains P+ isolation and PCB layers between adjacent elements in order to keep them isolated. P/N junctions are formed at the intersection of these P layers with the N layers of other elements to create a variety of parasitic elements. For example, when a resistor and transistor are connected to pins as shown in follow chart,  the P/N junction functions as a parasitic diode when GND > (Pin A) for the resistor or GND > (Pin B) for the transistor (NPN).  Similarly, when GND > (Pin B) for the transistor (NPN), the parasitic diode described above combines with the N layer of other adjacent elements to operate as a parasitic NPN transistor. The formation of parasitic elements as a result of the relationships of the potentials of different pins is an inevitable result of the IC's architecture. The operation of parasitic elements can cause interference with circuit operation as well as IC malfunction and damage. For these reasons, it is necessary to use caution so that the IC is not used in a way that will trigger the operation of parasitic elements, such as by the application of voltages lower than the GND (PCB) voltage to input and output pins. Resistance (PinA) (PinB) Transistor (NPN) Ｂ Ｃ Ｎ Ｐ Ｎ ＋ (PinA) Parasitic diode ＧＮＤ ＧＮＤ Ｅ Ｐ Ｎ Ｐ ＋ Ｐ Ｎ Ｎ ＋ Ｐ Ｐ ＋ (PinB) Ｎ Ｂ Ｃ Ｅ Ｎ P substrate ＧＮＤ P substrate ＧＮＤ Parasitic diode Parasitic elementals Other adiacent components ＧＮＤ Parasitic diode REV. B Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). 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