Datasheet
3.0 V to 36 V Input, 2.0 A Integrated FET
Single Synchronous Quiescent Operating
Current Buck DC/DC Converter for Automotive
BD9P233MUF-C
General Description
Key Specifications
BD9P233MUF-C is an ultra-low IQ Buck converter for 3.3
V output. The LLM (Light Load Mode) control ensures an
ultra-low quiescent current and high efficiency at light
load situation as well as at high load situations while
maintaining a regulated output voltage.
Input Voltage Range: ························ 3.0 V to 36 V
(initial startup is 3.6 V or more)
Output Voltage: ········································ 3.3 V
Switching Frequency: ·············· 200 kHz to 2.4 MHz
Output Current: ·································· 2 A (Max)
Shutdown Circuit Current: ········ 10 μA (Max) (25 °C)
Quiescent Operating Current: ···· 26 μA (Typ) (25 °C)
Operating Temperature Range: ··· -40 °C to +125 °C
Features
Nano Pulse Control™
AEC-Q100 Qualified (Note 1)
Low Dropout: 100 % ON Duty Cycle
Light Load Mode (LLM)
Spread Spectrum Function
Adjustable Frequency
Synchronization by External Clock
Thermal Shutdown Protection
Input Under Voltage Lockout Protection
Over Current Protection
Output Over Voltage Protection
Power Good Output
Package
W (Typ) x D (Typ) x H (Max)
5.0 mm x 5.0 mm x 1.0 mm
VQFN32FAV050:
Close-up
(Note 1) Grade 1
Applications
Automotive Battery Powered Supplies
(Cluster Panel, Car infotainment)
Industrial/Consumer Supplies
VQFN32FAV050
Wettable Flank Package
Typical Application Circuit
VIN
C IN
PVIN
SW
PVIN
SW
VO
L1
CO
SW
PVIN
VIN
VOUT
VREGB
VOUT
RT
COMP
CVREGB
RRT
VEN
R1
EN
C1
C2
VSYNC
SYNC
VREG3
CVREG3
VSPS
SPS
SS
CSS
VFPWM
FPWM
GND
PGOOD
PGND
R2
“Nano Pulse Control™” is a trademark of ROHM Co., Ltd.
〇Product structure : Silicon integrated circuit
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 14 • 001
〇This product has no designed protection against radioactive rays.
1/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
EXP-PAD
N.C.
SW
SW
SW
N.C.
N.C.
C.N.C.
(TOP VIEW)
N.C.
Pin Configuration
32
31
30
29
28
27
26
25
EXP-PAD
PVIN 1
24 PGND
PVIN 2
23 PGND
PVIN 3
22 PGND
21 SYNC
VIN 4
EXP-PAD
20 PGOOD
VREGB 5
EN 7
18 SPS
FPWM 8
17 N.C.
Pin Description
Pin No.
Pin Name
1,2,3
4
PVIN
VIN
14
15
16
N.C.
13
RT
12
SS
11
VOUT
10
VOUT
VREG3
9
EXP-PAD
COMP
19 N.C.
GND
N.C. 6
EXP-PAD
Function
Power supply input for output FET.
Power supply input.
Internal regulator output. Used as supply to driver circuits for high side FET. Do not
5
VREGB
connect to any external loads. Connect a 1.0 μF ceramic capacitor from this pin to the VIN
pin. The voltage between the VIN pin and the VREGB pin is 4.8 V (Typ).
6
N.C.
No internal connection pin.
Enable input. The device is active when this pin is high and shutdown when this pin is low.
7
EN
EN slew rate should be faster than 1 V/ms.
8
FPWM
Forced PWM mode select pin.
Internal regulator output. It supplies power to internal blocks. It cannot connect to external
9
VREG3
loads except FPWM, SPS and a pull-up resistor to PGOOD. Connect a 1.0 μF ceramic
capacitor from this pin to GND.
10,11
VOUT
Feedback input to regulator. Connect to the output voltage sense point.
12
GND
Reference ground.
13
COMP
Error amplifier output. Connect frequency compensation parts.
14
SS
Soft start time set pin. Connect a ceramic capacitor between this pin and GND.
15
RT
Switching frequency setting pin. Connect a resistor between this pin and GND.
16,17
N.C.
No internal connection pin.
18
SPS
Spread spectrum select pin. It should be connected to GND when this pin is not used.
19
N.C.
No internal connection pin.
An open drain output. Connect a pull-up resistor. Output “high” indicates normal state of
20
PGOOD
regulator output and “low” indicates the error state.
Synchronization signal input pin. Used to synchronize the switching frequency with the
21
SYNC
system clock. It should be connected to GND when this pin is not used.
22,23,24
PGND
Power ground pin. It is connected to internal low side FET. Connect to GND.
25,26
N.C.
No internal connection pin.
27,28,29
SW
The output of internal MOSFET. Connect to power inductor.
30
N.C.
No internal connection pin.
Exposed pad. This pin can be connected to PGND through the center EXP-PAD.
31
EXP-PAD
For details, refer to directions for pattern layout of PCB on page 36.
No internal connection pin. This pin can be connected to PGND through the center
32
N.C.
EXP-PAD. For detail, refer to directions for pattern layout of PCB on page 36.
C.N.C.
Corner no internal connection pin. This pin should not be connected to any other lines.
Exposed pad. Connect center EXP-PAD to the internal PCB ground plane using multiple
EXP-PAD
via, it will provide excellent heat dissipation characteristics. Three corner EXP-PADs and
pin 31 are connected to center EXP-PAD with internal frame.
The N.C. pin 6, 26 and 30 should not be connected to any other lines for the safety against adjacent inter-pin shorts.
The N.C. pin 16, 17, 19 and 25 can be connected to GND or opened.
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
2/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Block Diagram
FPWM_INT
FPWM
FPWM
PVIN
VBAT
FPWM
SYNC
SYNC
CLK
OSC
SPS
SPS
SLOPE
HG_SNS
SSOK
COMP
SCP
BUFFER
REF_SS
VREGB
PWM
REF_OSC
SS
HS DRIVER
HS CUR
LMT
SPREAD
SPECTRUM
RT
VREGB
HS_OCP
SOFT
START
SSOK
OVP
UVLO
ERROR
AMPLIFIER
TSD
DROP
SW
VO
LG_SNS
MAIN
LOGIC
VREG3
PGND
LS DRIVER
SWDCHG
EN_INT
UVLO
REF
DISCHARGE
ZERO
VOUT
VO
FPWM_INT
SCP
PGND
0A
PGOK
REF_DROP
LS_OCP
PG_CTRL
LS CUR
LMT
SCP
REF_SCP
OVP
VIN
VOUT
VBAT
OVP
REF_OVP
SWDCHG
PGOK
EN
REG
EN_INT
REF_PG
PREREG
REF
VREG3
REF_UVLO
REF_TSD
PGOOD
PGOOD
REF_OSC
PGOOD
REF_SS
PG_CTRL
VREF
REF_SCP
VREG3
REF_UVLO
UVLO
UVLO
REF_TSD
REF_OVP
TSD
TSD
GND
REF_PG
REF_DROP
Description of Blocks
1.
REG (for internal power supply)
The REG block generates the power supply for the internal circuits and low side driver. After the completion of the soft
start function, this power supply is sourced through switches from the VOUT pin connected to V O voltage. Placing a 1 μF
ceramic capacitor between the VREG3 pin and the GND pin is recommended for decouple.
By connecting the VOUT pin to the VO, almost internal circuits are powered from the VOUT and the power consumption
from VIN is reduced after the soft start function is completed.
2.
VREF
The VREF block generates internal reference voltages for ERROR AMPLIFIER and circuits for protection.
3.
UVLO
The UVLO function is for under voltage lockout protection.
The operation of this device is available when VIN rises 2.8 V (Typ) or more. When VIN falls 2.5 V (Typ) or below, the
device is shut down. The threshold voltage has a hysteresis of 300 mV (Typ).
4.
TSD
This is the thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always be within the
IC’s power dissipation rating. However, if the rating is exceeded for a continued period, the junction temperature (Tj) will
rise which will activate the TSD circuit [Tj ≥ 175 °C (Typ)] that will turn OFF output FET and VREG3 output. When the Tj
falls below the TSD threshold, the circuits are automatically restored to normal operation. Note that the TSD circuit
operates in a situation that exceeds the absolute maximum ratings and therefore, under no circumstances, should the
TSD circuit be used in a set design or for any purpose other than protecting the IC from heat damage.
5.
SCP
The SCP comparator is for detection of short circuit. When the output voltage falls 70 % (Typ) or below after the
completion of the soft start, this comparator outputs the detect signal.
6.
OVP
The OVP comparator is for protection of over voltage. When the output voltage goes 110 % (Typ) or more, High Side
FET and Low Side FET are turned off. When the output voltage falls 105 % (Typ) or below, the operation will recover.
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
3/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Description of Blocks – continued
7.
SOFTSTART
The SOFTSTART block slows down the rise of output voltage during startup. This function allows the prevention of
output voltage overshoot and inrush current.
8.
ERROR AMPLIFIER
The ERROR AMPLIFIER block is an error amplifier and its inputs are the reference voltage, the SS pin voltage and the
feedback voltage of the VOUT pin. Phase compensation can be set by connecting a resistor and a capacitor to the
COMP pin. See selection of the phase compensation circuit R1, C1, and C2 on page 27.
9.
MAIN LOGIC
The MAIN LOGIC block controls main operation of this device.
10. PGOOD
When the VOUT pin voltage reaches to 95 % (Typ) of the regulated voltage, the Nch FET for power good indication
turns off. When the output voltage falls below 90 % (Typ) for 25 μs (Typ) or more, the Nch FET turns on. This function is
available after the completion of the soft start function. An external pull-up resistor is required for a logic supply at the
PGOOD pin.
11. FPWM
By setting the FPWM pin 2.5 V or more, the device switches to forced PWM mode. By setting the FPWM pin 0.8 V or
less, the device switches to forced LLM. For the method of the mode change using this pin, refer to page 16.
12. OSC
The OSC block generates clock signal for the switching operation and slope waveform for PWM control. The switching
frequency is determined by the RRT connected to the RT pin. See Figure 32, Table 4 and Table 5 on page 26.
13. SPREAD SPECTRUM
By setting the SPS pin 2.5 V or more, the device starts to spread spectrum function. See the Spread Spectrum on page
16.
14. HS/LS DRIVER
The HS/LS Driver blocks drive Power FETs connected to the SW pin.
15. ZERO
The ZERO block detects that the current of inductor reverses from the SW pin to the PGND pin when Low Side FET is
turned on. The detected signal input to the internal logic and used for the diode emulation function in LLM.
16. HS/LS OCP
The HS/LS OCP block detects whether the current passes through FETs reaches to the limited value. See the operation
description on page 19.
17. PWM
The PWM comparator adjusts duty for switching operation.
18. DROP
The DROP comparator generates the signal for LLM.
19. DISCHARGE
The DISCHARGE block is for discharging output capacitor through the SW pin when the TSD, UVLO or EN OFF.
20. VREGB
The VREGB block generates the power supply for the high-side driver. VREGB voltage is VIN voltage -4.8 V (Typ) when
VIN voltage is 13 V. Place a 1 μF ceramic capacitor between the VIN pin and the VREGB pin.
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
4/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Absolute Maximum Ratings (Ta = 25 °C)
Parameter
Symbol
Rating
Unit
VPVIN,VVIN
-0.3 to +42
V
VPVIN - VREGB, VVIN - VREGB
-0.3 to +7
V
VEN
-0.3 to VVIN
V
VVREG3 , VSYNC , VFPWM , VSPS , VVOUT,
VPGOOD
-0.3 to +7
V
Tj
-40 to +150
°C
Tjmax
150
°C
Tstg
-55 to +150
°C
Input Voltage
PVIN – VREGB, VIN – VREGB Pin Voltage
EN Pin Voltage
VREG3, SYNC, FPWM, SPS, VOUT, PGOOD Pin
Voltage
Junction Temperature Range
Maximum Junction Temperature
Storage Temperature Range
Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is
operated over the absolute maximum ratings.
Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the
properties of the chip. In case of exceeding this absolute maximum rating, design a PCB with thermal resistance taken into consideration by
increasing board size and copper area so as not to exceed the maximum junction temperature rating.
Thermal Resistance (Note 1)
Parameter
Thermal Resistance (Typ)
Symbol
Unit
1s (Note 3)
2s2p (Note 4)
θJA
125.5
29.9
°C/W
ΨJT
11
6
°C/W
VQFN32FAV050
Junction to Ambient
Junction to Top Characterization
Parameter(Note 2)
(Note 1) Based on JESD51-2A (Still-Air). Using a BD9P233MUF-C chip.
(Note 2) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside
surface of the component package.
(Note 3) Using a PCB board based on JESD51-3.
(Note 4) Using a PCB board based on JESD51-5, 7.
Layer Number of
Measurement Board
Single
Material
Board Size
FR-4
114.3 mm x 76.2 mm x 1.57 mmt
Top
Copper Pattern
Thickness
Footprints and Traces
70 μm
Layer Number of
Measurement Board
4 Layers
Material
Board Size
FR-4
114.3 mm x 76.2 mm x 1.6 mmt
Top
2 Internal Layers
Thermal Via (Note 5)
Pitch
Diameter
1.20 mm
Φ0.30 mm
Bottom
Copper Pattern
Thickness
Copper Pattern
Thickness
Copper Pattern
Thickness
Footprints and Traces
70 μm
74.2 mm x 74.2 mm
35 μm
74.2 mm x 74.2 mm
70 μm
(Note 5) This thermal via connects with the copper pattern of all layers.
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
5/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Recommended Operating Conditions
Parameter
Symbol
Min
Max
Unit
Operating Power Supply Voltage
VVIN
3 (Note 1)
36
V
Output Current
IOUT
-
2
A
Switching Frequency
fOSC
200
2400
kHz
Min ON Pulse Width
tONMIN
-
60
ns
Synchronous Operation Frequency Range
fSYNC
200
2400
kHz
Operating Temperature
Topr
-40
+125
°C
(Note 1) Initial startup is 3.6 V or more.
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
6/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Electrical Characteristics (Unless otherwise specified, Ta = - 40 °C to +125 °C, VVIN = 13 V, VEN = 3 V)
Parameter
Symbol
Min
Typ
Max
Unit
Conditions
Shutdown Current
ISDN
-
7
10
μA
VEN = 0 V, Ta = 25 °C
Quiescent Current
IQ
-
26
60
μA
IOUT = 0 A,
VFPWM = VSPS = 0 V
Under Voltage Lockout
Threshold Voltage
VUVLO-TH
-
2.50
2.99
V
VVIN: falling
Under Voltage Lockout
Hysteresis Voltage
VUVLO-HYS
150
300
600
mV
3.234
3.300
3.366
V
VVIN = 4 V to 36 V, PWM mode
3.20 (Note 1) 3.30 (Note 1) 3.40 (Note 1)
V
VVIN = 13 V, LLM, IOUT = 0 A
Including output ripple
Output Voltage
VOUT
High Side FET ON Resistance
RONH
-
190
375
mΩ
ISW = -50 mA, VVIN = 13 V
Low Side FET ON Resistance
RONL
-
120
244
mΩ
ISW = -50 mA, VVIN = 13 V
High Side FET Current
Protection (Note 1)
IHSOCP
3.5
5.0
6.5
A
Low Side FET Current
Protection (Note 1)
ILSOCP
2.5
3.8
-
A
Error Amplifier
Transconductance
GEA
140
280
420
μA/V VCOMP = 1 V
Oscillator Frequency1
fOSC1
2.0
2.2
2.4
MHz
RRT = 27 kΩ, VVIN = 7 V to 18 V,
VFPWM = 3 V, IOUT = 0 A
Oscillator Frequency2
(Spread Spectrum)
fOSC2
1.95
2.25
2.55
MHz
RRT = 24 kΩ, VVIN = 7 V to 18 V,
VFPWM = VSPS = 3 V, IOUT = 0 A
Oscillator Frequency3 (Note 1)
fOSC3
328
400
472
kHz
RRT = 210 kΩ, VVIN = 5 V to 36
V, VFPWM = 3 V, IOUT = 0 A
SYNC High Threshold Voltage
VIH-SYNC
2.5
-
-
V
SYNC State High
SYNC Low Threshold Voltage
VIL-SYNC
-
-
0.8
V
SYNC State Low
ISYNC
3
6
12
μA
VSYNC = 3 V
SYNC Input Pulse High Width
tH-SYNC
100
-
-
ns
SYNC Input Pulse Low Width
tL-SYNC
100
-
-
ns
FPWM ON Threshold Voltage
VIH-FPWM
2.5
-
-
V
Forced PWM mode
FPWM OFF Threshold Voltage
VIL-FPWM
-
-
0.8
V
LLM
FPWM Sink Current
IFPWM
-
0.1
1.0
μA
VFPWM = 3 V
SPS ON Threshold Voltage
VIH-SPS
2.5
-
-
V
Spread Spectrum ON
SPS OFF Threshold Voltage
VIL-SPS
-
-
0.8
V
Spread Spectrum OFF
SPS Sink Current
ISPS
-
0.1
1.0
μA
VSPS = 3 V
Soft Start Charge Current
ISS
1.3
1.9
2.4
μA
SYNC Sink Current
(Note 1) Not production tested.
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
7/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Electrical Characteristics – continued
(Unless otherwise specified, Ta = - 40 °C to +125 °C, VVIN = 13 V, VEN = 3 V)
Parameter
Symbol
Min
Typ
Max
Unit
EN ON Threshold Voltage
VIH-EN
2.5
-
-
V
EN OFF Threshold Voltage
VIL-EN
-
-
0.8
V
IEN
-
0.1
1.0
μA
VEN = 3 V
PGOOD Threshold Voltage
VPGD
-15
-10
-5
%
% of VOUT at PWM mode,
VOUT: falling
PGOOD ON Sink Current
IPGD
0.5
2
-
mA
VPGOOD = 0.5 V
PGOOD Leak Current
IPGDLEAK
-
0
1.0
μA
VPGOOD = 3.3 V
SCP Threshold Voltage
VSCP
-35
-30
-25
%
OVP Threshold Voltage
VOVP
5
10
15
%
ISWSHUT
4.7
8.2
-
mA
EN Sink Current
SW OFF Shut Sink Current
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
8/43
Conditions
% of VOUT at PWM mode,
VOUT: falling
% of VOUT at PWM mode,
VOUT: rising
VEN = 0 V, VSW = 3.3 V
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Typical Performance Curves
(Unless otherwise specified, Ta = - 40 °C to +125 °C, VVIN = 13 V, VEN = 3 V)
20
60
50
16
Quiescent Current : IQ [μA]
Shutdown Current : ISDN [μA]
18
14
12
10
8
6
Ta = +125 °C
4
Ta = +25 °C
2
Ta = -40 °C
40
30
20
10
Ta = 25 °C, IOUT = 0 A, FPWM = L
0
0
0
10
20
30
Input Voltage : VVIN [V]
40
0
Figure 1. Shutdown Current vs Input Voltage
40
Figure 2. Quiescent Current vs Input Voltage
600
Under Voltage Lockout Hysteresis Voltage :
VUVLO-HYS [V]
3.00
Under Voltage Lockout Threshold Voltage :
VUVLO-TH [V]
10
20
30
Input Voltage : VVIN [V]
2.50
2.00
1.50
1.00
0.50
0.00
550
500
450
400
350
300
250
200
150
-40
-20
0
20
40
60
80
100
120
Ambient Temperature : Ta [°C]
-20
0
20
40
60
80
100
120
Ambient Temperature : Ta [°C]
Figure 3. Under Voltage Lockout Threshold Voltage vs
Ambient Temperature
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
-40
9/43
Figure 4. Under Voltage Lockout Hysteresis Voltage vs
Ambient Temperature
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Typical Performance Curves – continued
(Unless otherwise specified, Ta = - 40 °C to +125 °C, VVIN = 13 V, VEN = 3 V)
300
3.38
280
High, Low Side FET ON Resistance :
RONH, RONL [mΩ]
3.40
Output Voltage : VOUT [V]
3.36
3.34
3.32
3.30
3.28
3.26
3.24
3.22
V
FPWM
=H
VVIN=13V,
mode
VIN = 13 V,PWM
260
240
220
200
180
160
140
120
100
V
High Side
Side
VVIN=13V,
VIN = 13 V, High
80
V
Low Side
Side
VVIN=13V,
VIN = 13 V, Low
60
3.20
-40
-20
0
20
40
60
80
100
-40
120
-20
20
40
60
80
100
120
Ambient Temperature : Ta [°C]
Ambient Temperature : Ta [°C]
Figure 5. Output Voltage vs Ambient Temperature
Figure 6. High/Low Side FET ON Resistance
vs Ambient Temperature
420
Error Amplifier Transconductance : GEA
[μA/V]
6.5
High, Low side FET Current Protection :
IHSOCP, ILSOCP [A]
0
6.0
5.5
5.0
4.5
4.0
3.5
High Side
3.0
Low Side
380
340
300
260
220
180
140
2.5
-40
-20
0
20
40
60
80
100
120
-20
0
20
40
60
80
100
120
Ambient Temperature : Ta [°C]
Ambient Temperature : Ta [°C]
Figure 8. Error Amplifier Transconductance
vs Ambient Temperature
Figure 7. High/Low Side FET Current Protection
vs Ambient Temperature
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
-40
10/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Typical Performance Curves – continued
(Unless otherwise specified, Ta = - 40 °C to +125 °C, VVIN = 13 V, VEN = 3 V)
2.55
Oscillator Frequency2 (Spread Spectrum) :
fOSC2 [MHz]
Oscillator Frequency1 : fOSC1 [MHz]
2.40
2.35
2.30
2.25
2.20
2.15
2.10
2.05
RRT=27kohm,
SPS=L
RRT = 27 kΩ, SPS
=L
2.00
2.45
2.35
2.25
2.15
2.05
RRT=24kohm,
SPS=L
RRT = 24 kΩ, SPS
=H
1.95
-40
-20
0
20
40
60
80
100
120
-40
-20
Ambient Temperature : Ta [°C]
20
40
60
80
100
120
Ambient Temperature : Ta [°C]
Figure 9. Oscillator Frequency1
vs Ambient Temperature
Figure 10. Oscillator Frequency2 (Spread Spectrum)
vs Ambient Temperature
2.0
SYNC High / Low Threshold Voltage :
VIH-SYNC, VIL-SYNC[V]
480
Oscillator Frequency3 : fOSC3 [kHz]
0
460
440
420
400
380
360
340
RRT=210kohm,
SPS=L
R
= 210 kΩ, SPS
=L
RT
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
High
1.1
Low
1.0
320
-40
-20
0
20
40
60
80
100
120
-20
0
20
40
60
80
100
120
Ambient Temperature : Ta [°C]
Ambient Temperature : Ta [°C]
Figure 11. Oscillator Frequency3
vs Ambient Temperature
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
-40
Figure 12. SYNC High/Low Threshold Voltage
vs Ambient Temperature
11/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
2.0
2.0
1.8
1.9
FPWM ON, OFF Threshold Voltage :
VIH-FPWM, VIL-FPWM [V]
SYNC Sink Current : ISYNC [μA]
Typical Performance Curves – continued
(Unless otherwise specified, Ta = - 40 °C to +125 °C, VVIN = 13 V, VEN = 3 V)
1.6
1.4
1.2
1.0
0.8
0.6
Ta = +125 °C
125°C
0.4
25°C
Ta = +25 °C
0.2
-40°C
Ta = -40 °C
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
OFF
1.0
0.0
0
2
4
6
SYNC Voltage : VSYNC [V]
-40
8
Figure 13. SYNC Sink Current vs SYNC Voltage
-20
0
20
40
60
80 100
Ambient Temperature : Ta [°C]
120
Figure 14. FPWM ON/OFF Threshold Voltage
vs Ambient Temperature
2.0
1.0
Ta = +125 °C
125°C
1.9
SPS ON, OFF Threshold Voltage :
VIH-SPS, VIL-SPS[V]
0.9
FPWM Sink Current : IFPWM [μA]
ON
25°C
Ta = +25 °C
0.8
-40°C
Ta = -40 °C
0.7
0.6
0.5
0.4
0.3
0.2
1.8
1.7
1.6
1.5
1.4
1.3
1.2
0.1
1.1
0.0
1.0
0
2
4
6
FPWM Voltage : VFPWM [V]
8
Figure 15. FPWM Sink Current vs FPWM Voltage
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
12/43
ON
OFF
-40
-20
0
20
40
60
80 100
Ambient Temperature : Ta [°C]
120
Figure 16. SPS ON/OFF Threshold Voltage
vs Ambient Temperature
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Typical Performance Curves – continued
(Unless otherwise specified, Ta = - 40 °C to +125 °C, VVIN = 13 V, VEN = 3 V)
1.0
2.4
125°C
Ta = +125 °C
25°C
Ta = +25 °C
0.8
-40°C
Ta = -40 °C
Soft Start Charge Current :
ISS [µA]
SPS Sink Current : ISPS [μA]
0.9
0.7
0.6
0.5
0.4
0.3
0.2
2.2
2.0
1.8
1.6
0.1
0.0
1.4
0
2
4
6
SPS Voltage : VSPS [V]
8
-40
-20
0
40
60
80
100
120
Ambient Temperature : Ta [°C]
Figure 17. SPS Sink Current vs SPS Voltage
Figure 18. Soft Start Charge Current
vs Ambient Temperature
2.0
30
Ta = +125 °C
125°C
1.9
25
1.8
EN Sink Current : IEN [μA]
EN ON, OFF Threshold Voltage :
VIH-EN, VIL-EN [V]
20
1.7
1.6
1.5
1.4
1.3
1.2
ON
1.1
25°C
Ta = +25 °C
-40°C
Ta = -40 °C
20
15
10
5
OFF
0
1.0
-40
-20
0
20
40
60
80 100
Ambient Temperature : Ta [°C]
120
10
20
30
EN Voltage : VEN [V]
40
Figure 20. EN Sink Current vs EN Voltage
Figure 19. EN ON/OFF Threshold Voltage
vs Ambient Temperature
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
0
13/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Typical Performance Curves – continued
(Unless otherwise specified, Ta = - 40 °C to +125 °C, VVIN = 13 V, VEN = 3 V)
4.0
10
3.5
5
PGOOD ON Sink Current :
IPGD [mA]
PGOOD, SCP, OVP Threshold Voltage :
VPGD, VSCP, VOVP [%]
15
0
-5
-10
-15
OVP
-20
PGOOD
-25
SCP
3.0
2.5
2.0
1.5
1.0
-30
0.5
-35
-40
0.0
-40
-20
0
20
40
60
80
100
120
-40
-20
Ambient Temperature : Ta [°C]
20
40
60
80
100
120
Ambient Temperature : Ta [°C]
Figure 21. PGOOD/SCP/OVP Threshold Voltage
vs Ambient Temperature
Figure 22. PGOOD ON Sink Current
vs Ambient Temperature
1.0
12
0.9
11
SW OFF Shut Sink Current :
ISWSHUT [mA]
0.8
PGOOD Leak Current :
IPGDLEAK [µA]
0
0.7
0.6
0.5
0.4
0.3
0.2
10
9
8
7
6
5
0.1
0.0
4
-40
-20
0
20
40
60
80
100
120
Ambient Temperature : Ta [°C]
-20
0
20
40
60
80
100
120
Ambient Temperature : Ta [°C]
Figure 23. PGOOD Leak Current
vs Ambient Temperature
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
-40
Figure 24. SW OFF Shut Sink Current
vs Ambient Temperature
14/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Function Explanations
1.
Start Up/Shutdown Operation
Start up and shutdown are controlled by the voltage applied to the EN pin. The device starts up with an input voltage of
2.5 V or more and shuts down with a voltage of 0.8 V or less. If this function is unnecessary, the EN pin can directly
connect to the VIN pin. However, the EN pin is recommended to pull-up to the VIN pin with the resistance for the safety
against adjacent inter-pin shorts between the EN pin and the FPWM pin. The EN pin must not be left floating. This
device prevents the output voltage overshoot and inrush current by soft start operation at start up. The switching
frequency during start up rises in proportion to the SS pin voltage. A timing chart of typical startup and shutdown is
shown in Figure 25.
VIN
4.8V
VREGB
0V
EN
0V
3.3V
VREG3
0V
tENDELAY1
SS
0V
COMP
0V
3.3V
VOUT
0V
tSS
PGOOD
0V
tPGDELAY
tENDELAY2
Figure 25
Typical timing characteristics
tENDELAY1: 165 µs (Typ)
tENDELAY2: 10 µs (Typ)
The soft start function is completed when the time tPGDELAY is passed after the time of tENDELAY1. tPGDELAY is about 1.5
times of tSS (Refer to setting of soft start time on page 28) and obtained by the following equation.
𝑡𝑃𝐺𝐷𝐸𝐿𝐴𝑌 =
𝐶𝑆𝑆 (𝑛𝐹)×1.2(𝑉)
𝐼𝑆𝑆 (𝜇𝐴)
[ms]
The power good output is available after the completion of this function.
2.
LLM and Forced PWM mode
This device has two modes as shown in Table 1. These modes are controlled by the FPWM input.
The FPWM pin should not be allowed to float.
Table 1
FPWM
INPUT
Mode name
Description
H:
≥ 2.5 V
Forced PWM
(FPWM)
The device is locked in FPWM mode with a constant frequency and
current mode synchronous converter for all loads.
L:
≤ 0.8 V
LLM
The device operates as LLM. The switching frequency depends on
the load current state in LLM.
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
15/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
2.
LLM and Forced PWM mode – continued
In FPWM mode, the device is locked in PWM mode. PWM control is maintained by allowing the inductor current to flow
from the output to the IC even in no load. The switching frequency is constant in this mode, but reduces efficiency in the
light load.
In PWM, the device operates as the current mode synchronous converter that adjusts the pulse width at a fixed cycle
and controls the output voltage depending on the load current. This provides excellent line and load regulation and low
output voltage ripple.
In LLM, the high side FET is turned on intermittently to supply energy to the load. The cycle is determined by the load
current and the efficiency is increased by the diode emulation. This operation reduces the input current supplied for the
output voltage regulation and provides a high efficiency. However, the output ripple voltage increases and switching
cycle is not constant in LLM. Therefore, in LLM it may not get good EMI performance in AM band by the load condition.
To avoid this, use FPWM mode.
LLM is available in frequency setting of 2.2 MHz or more (refer to Table 4 and Table 5 on page 26) and load current of
less than 50 mA. If load current is 50 mA or more, turn the FPWM pin to H then apply the load. To disable FPWM, turn
the FPWM pin to L after the load drops less than 50 mA (refer to Figure 26).
During soft start operation, the device is locked in FPWM mode. LLM is available after the completion of the soft start
function.
When switching frequency setting is lower than 2.2 MHz, connect the FPWM pin to the VREG3 or the VOUT pin and use
only FPWM mode.
Low pulse width for the FPWM input tPWL should be more than following equation determined by the value of
capacitance with output line CO.
𝑡𝑃𝑊𝐿 > 𝐶𝑂 (𝐹) × 2200 [s]
CO : Total value of capacitance with output line
H
FPWM
H
L
L
50 mA or more
IOUT
less than 50 mA
tPWL
less than 50 mA
Figure 26
3.
Spread Spectrum
This device has the function to spread spectrum on EMI performance. This function is enabled by the SPS input as
shown in Table 2.
Table 2
SPS INPUT
SPS Mode
Description
≥ 2.5 V
Enable
The frequency decreases by 6.25 % (Typ) from the frequency set by the
resistor connected to the RT pin. It spreads from -4% to + 4% (Typ)
around the frequency of -6.25%.
≤ 0.8 V
Disable
The frequency is determined by the resistor connected to the RT pin.
The RT voltage changes as a triangular wave with a period of 22 μs. Therefore, the switching frequency ramps down
4 % and back to center frequency in 11 μs and also ramps up 4 % and back to center frequency in 11 μs. The cycle
repeats.
A typical timing chart of input/output of this function is shown in Figure 27. SPS mode is available after the completion of
the soft start function. The SPS pin can be connected to the VREG3 pin or the VOUT pin.
SPS
0V
VRT_default
RT
VRT_sps_up
VRT_sps_down
11 µs 11 µs
0V
fOSC
-6.25 %
100 µs
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
+4 %
-4 %
Figure 27
16/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Function Explanations – continued
4.
Synchronizing Input
This device has synchronizing function by PLL (Phase Locked Loop) using a clock input from the SYNC pin.
In order to activate the synchronizing function, set to the FPWM mode and then input a synchronizing signal from the
SYNC pin. In LLM, input to the SYNC pin is ignored. If five positive edges are inputted and 128 times of cycle time
passed, the device starts the synchronize function by PLL mode.
If input to the SYNC pin is fixed to Low or High state for four times of cycle time, PLL mode is disabled.
The “cycle time” in this function indicates the period determined by the R RT connected to the RT pin.
The range of switching frequency of the external synchronization is limited within ±30 % of the switching frequency
determined by the RRT.
i.e. When RRT is 300 kΩ (fOSC = 290 kHz), the switching frequency range of the external synchronization is 203 kHz to
377 kHz.
RRT setting mode
PLL mode (synchronizing)
RRT setting mode
SW
[4 V/div]
SYNC input 5 edge +
128 times of cycle time
SYNC
[2 V/div]
100 μs/div
100 μs/div
Figure 28. PLL OFF to ON waveform
(RRT setting : 290 kHz, SYNC : 377 kHz)
5.
Figure 29. PLL ON to OFF waveform
(RRT setting : 290 kHz, SYNC : 377 kHz)
Power Good
This device has the function to watch the state of the output voltage. The PGOOD output consists of an open drain Nch
FET. This output pin is required that an external pull-up resistor placed between this pin and either VOUT or VREG3 for
a logic supply. When the VOUT voltage reaches to 95 % (Typ) or more of the regulating output voltage, Nch FET is
turned off and the PGOOD indicates High state. When the VOUT voltage falls below 90 % (Typ), Nch FET is turned on
and the PGOOD indicates Low state. This function is available after the completion of the soft start function.
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
17/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Function Explanations – continued
6.
Power supply from the output
This device has the function to supply power for the control circuits from the output through the VOUT pin. This function
is available when PGOOD is detected after the completion of the soft start function. The current for the control of circuits
is reduced by the ratio of VO/VIN. It is helpful to improve the efficiency at light loads.
The difference of the current path at startup and the state after the soft start function is shown in Figure 30 and Figure
31.
At the startup, the power supply of VREG3 and PREREG comes from the VIN. After the completion of the soft start
function and the detection of PGOOD, the almost power for control circuits is sourced through switches from the VOUT
pin connected to VO voltage.
At the startup
VIN
supply current for circuits from VIN
switch
VOUT
PREREG
OFF
feed back from
VO (3.3V)
power supply
to circuits
switch
VREG3
OFF
VREG3
power supply
to circuits
(mainly DRIVER)
Figure 30
At the state after the soft start function
supply current for circuits from VOUT
VIN
supply current for circuits from VIN
switch
PREREG
ON
VOUT
feed back from
VO (3.3V)
power supply
to circuits
switch
VREG3
ON
VREG3
power supply
to circuits
(mainly DRIVER)
Figure 31
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
18/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Protection
1.
Over Current Protection (OCP) and Short Circuit Protection (SCP)
The device has valley current limit with low side FET and peak current limit with high side FET to detect the inductor current
against over current load and output short circuit.
The inductor current decreases when the low side FET is turned on. If the inductor current does not drop below 3.8 A (Typ)
before the next turn-on, the turn-on operation is skipped by the low side FET current limit. Then, the low side FET keeps on
until the inductor current drops below 3.8 A (Typ).
If this situation is detected in 9 times during 32 switching cycles, the device turns off both high and low side FETs for the time
that corresponds to 7 times of tPGDELAY. It is called “HICCUP” action. After that, startup operation by soft-start function will be
done. In addition, if the valley current limit is detected with the detection of SCP, the voltage of output drops under 70 %, the
device also turns off both switches for the “HICCUP” time.
A timing chart about valley current limit and skip pulse is shown in Case1 and Case2.
When the peak inductor current reaches 5 A (Typ), the inductor current is limited by the high side FET. This limit is a
cycle-by-cycle.
If this situation occurs 9 times during 32 clock cycles, the device turns off both switches as same as valley current limit for the
“HICCUP” time. A timing chart about peak current limit is shown in Case3.
In addition, if the high side current limit is detected with the detection of SCP, the device also turns off both switches for the
“HICCUP” time. A timing chart of typical short circuit transient is shown in Case4, and “HICCUP” time and recovery is shown
in Case5.
Case1: Detecting valley current limit 9 times
Skipped
Skipped
Skipped
SW
Current limit detection 9 counts in 32 clock cycles
ILSOCP [3.8 A (Typ) ]
IL
VOUT
VSCP [VOUT 70 % (Typ) ]
Not detection of SCP
SS
tPGDELAY
Case2: Detecting valley current limit when SCP is detected
Skipped
Skipped
Skipped
SW
detection of LSOCP and SCP
ILSOCP [3.8 A (Typ) ]
IL
VOUT
VSCP [VOUT 70 % (Typ) ]
Detection of SCP
SS
tPGDELAY
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
19/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Protection – continued
Case3: Detecting peak current limit 9 times
SW
Current limit detection 9 counts in 32 clock cycles
IHSO CP [5.0 A (Typ) ]
IL
VOUT
VSCP [VOUT 70 % (Typ) ]
Not detection of SCP
SS
tPGDELAY
Case4: Detecting peak current limit when SCP is detected
SW
Detection of HSOCP and SCP
IHSO CP [5.0 A (Typ) ]
IL
VOUT
VSCP [VOUT 70 % (Typ) ]
VSCP
Detection of SCP
SS
tPGDELAY
Case5: “HICCUP” time and recovery
Release from short circuit
VOUT
VSCP
0V
Normal operation
output VOUT recovery
Current limit detection by short circuit
SS
tPGDELAY
tSS
HICCUP action
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
20/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Protection – continued
2.
Over Voltage Protection (OVP)
This device has the function to detect the over voltage of the VOUT.
This function compares internal node voltage divided VOUT voltage with the internal reference voltage. When the VOUT
voltage goes 110 % (Typ) or more of the regulated output, High Side FET and Low Side FET turn off. When the VOUT
voltage falls 105 % (Typ) or less, it returns to the normal operation.
3.
Thermal Shutdown (TSD)
This device has the function to protect itself from excessive temperature.
Normal operation should always be within the IC’s power dissipation rating. However, if the rating is exceeded for a
continued period, the junction temperature (Tj) will rise which will activate the TSD circuit [Tj ≥ 175 °C (Typ)] that will turn
OFF output FETs and VREG3 output. When the Tj falls below the TSD threshold, the circuits are automatically restored
to normal operation. Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and
therefore, under no circumstances, should the TSD circuit be used in a set design or for any purpose other than
protecting the IC from heat damage.
4.
Under Voltage Lock-Out (UVLO)
This device has the function for an input under voltage lockout (UVLO).
The operation of this device is available when the VIN voltage rises 2.8 V (Typ) or more. When the VIN voltage falls
below 2.5 V (Typ), the device is shut down. The threshold voltage has a hysteresis of 300 mV (Typ).
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
21/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Application Example
The figure below is the application sample circuit.
VIN
CIN11
L2
CBUL K
CPVIN1 CPVIN2 CPVIN3
PVIN
SW
PVIN
SW
PVIN
SW
VIN
VOUT
CVIN
VREGB
VOUT
RT
COMP
VO
L1
CO1
CO2
RVO
CVREGB
RRT
VEN
R1
EN
C1
C2
VSYNC
SYNC
VREG3
CVREG3
VSPS
SPS
SS
CSS
VFPWM
FPWM
GND
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
PGOOD
PGND
22/43
R2
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Selection of Components Externally Connected
1.
Selection of the inductor L1 value
When the switching regulator supplies current continuously to the load, the LC filter is necessary for the smoothness of
the output voltage. The Inductor ripple current ΔIL that flows to the inductor becomes small when an inductor with a large
inductance value is selected. Consequently, the voltage of the output ripple also becomes small. It is the trade-off
between the size and the cost of the inductor.
The recommended inductance value of the inductor is shown in the following table:
Table 4
Frequency setting
L1
200 kHz ≤ fOSC < 1 MHz
6.8 µH to 10 µH
1 MHz ≤ fOSC ≤ 2.4 MHz
2.2 µH to 6.8 µH
Maximum ΔIL and ΔVPP are shown in the following equation.
∆𝐼𝐿 =
(𝑉𝑉𝐼𝑁(𝑀𝑎𝑥) −𝑉𝑂𝑈𝑇)×𝑉𝑂𝑈𝑇
[A]
𝑉𝑉𝐼𝑁(𝑀𝑎𝑥) ×𝑓𝑂𝑆𝐶 ×𝐿1
∆𝑉𝑃𝑃 = ∆𝐼𝐿 × 𝐸𝑆𝑅 + 8×𝐶
∆𝐼𝐿
[V]
𝑂 ×𝑓𝑂𝑆𝐶
···· (a)
Where:
𝑉𝑉𝐼𝑁(𝑀𝑎𝑥) is the maximum input voltage
𝐸𝑆𝑅 is the equivalent series resistance of output capacitor
𝐶𝑂 is the output capacitor
Generally, even if ΔIL is somewhat large, the ΔVPP target is satisfied because the ceramic capacitor has a very-low ESR.
It also contributes to the miniaturization of the application board. Also, because of the lower rated current, smaller
inductor is possible since the inductance is small. The disadvantages are increase in core losses in the inductor and the
decrease in maximum output current. When other capacitors (electrolytic capacitor, tantalum capacitor, and electro
conductive polymer etc.) are used for output capacitor C O, check the ESR from the manufacturer's data sheet and
determine the ΔIL to fit within the acceptable range of ΔVPP. Especially in the case of electrolytic capacitor, because the
decrease in capacitance at low temperatures is significantly large, this will make ΔVPP increase.
The maximum output electric current is limited to the overcurrent protection as shown in the following equation.
𝐼𝑂𝑈𝑇(𝑀𝑎𝑥) = 𝐼𝐻𝑆𝑂𝐶𝑃(𝑀𝑖𝑛) −
∆𝐼𝐿
2
[A]
Where:
𝐼𝑂𝑈𝑇(𝑀𝑎𝑥) is the maximum output current
𝐼𝐻𝑆𝑂𝐶𝑃(𝑀𝑖𝑛) is the OCP operation current (Min)
A
IOUT(Max) +ΔIL/2 = IHSOCP(Min)
IL
IOUT(Max)
IOUT(Max) -ΔIL/2
t
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
23/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Selection of Components Externally Connected – continued
2.
Selection of output Capacitor CO
The output capacitor is selected based on the ESR that is required from the equation (a).
𝐶𝑜 >
∆𝐼𝐿
8×𝑓𝑂𝑆𝐶 ×(∆𝑉𝑃𝑃 −∆𝐼𝐿 ×𝐸𝑆𝑅)
[F]
ΔVPP can be reduced by using a capacitor with a small ESR. The ceramic capacitor is the best option that meets this
requirement. It is because not only does it has a small ESR but the ceramic capacitor also contributes to the size
reduction of the application circuit. Please confirm the frequency characteristics of ESR from the datasheet of the
manufacturer, and consider a low ESR value for the switching frequency being used. It is necessary to consider the
ceramic capacitor because the DC biasing characteristic is important. For the voltage rating of the ceramic capacitor,
twice or more than the maximum output voltage is usually required. By selecting a high voltage rating, it is possible to
reduce the influence of DC bias characteristics. Moreover, in order to maintain good temperature characteristics, the
one with the characteristics of X7R or better is recommended. Because the voltage rating of a large ceramic capacitor is
low, the selection becomes difficult for an application with high output voltage. In that case, please connect multiple
ceramic capacitors in series or select electrolytic capacitor. Consider having a voltage rating of 1.2 times or more of the
output voltage when using electrolytic capacitor. Electrolytic capacitors have a high voltage rating, large capacitance,
small amount of DC biasing characteristics, and are generally reasonable. Since the electrolytic capacitor is usually
OPEN when it fails, it is effective to use for applications when reliability is required such as automotive. But there are
disadvantages such as, ESR is relatively high, and decreases capacitance value at low temperatures. In this case,
please take note that ΔVPP may increase at low temperature conditions. Moreover, consider the lifetime characteristic of
this capacitor because it has a possibility to dry up. A tantalum capacitor and a conductive polymer hybrid capacitor
have excellent temperature characteristics unlike the electrolytic capacitor. Moreover, since their ESR is smaller than an
electrolytic capacitor, the ripple voltage is relatively-small over a wide temperature range. Since these capacitors have
almost no DC bias characteristics, design will be easier. Regarding voltage rating, the tantalum capacitor is selected
such that its capacitance is twice the value of the output voltage, and for the conductive polymer hybrid capacitor, it is
selected such that the voltage rating is 1.2 times the value of the output voltage. The disadvantage of a tantalum
capacitor is that it is SHORTED when it is destroyed, and its breakdown voltage is low. It is not generally selected in an
application that reliability is a demand such as in automotive. An electro conductive polymer hybrid capacitor is OPEN
when destroyed. Though it is effective for reliability, its disadvantage is that it is generally expensive.
To improve the performance of ripple voltage in this condition, following is recommended:
1. Use low ESR capacitor like ceramic or conductive polymer hybrid capacitor.
2. Use a capacitor CO with a higher capacitance value.
These capacitors are rated in ripple current. The RMS values of the ripple current that can be obtained in the following
equation must not exceed the ripple current rating.
𝐼𝐶𝑂(𝑅𝑀𝑆) =
∆𝐼𝐿
√12
[A]
Where:
𝐼𝐶𝑂(𝑅𝑀𝑆) is the value of the ripple electric current
In addition, for the total value of capacitance in the output line CO(Max), choose a capacitance value less than the value
obtained by the following equation:
𝐶𝑂(𝑀𝑎𝑥) <
𝑡𝑆𝑆(𝑀𝑖𝑛) ×(𝐼𝐻𝑆𝑂𝐶𝑃(𝑀𝑖𝑛) −𝐼𝑂𝑆𝑇𝐴𝑅𝑇(𝑀𝑎𝑥) )
𝑉𝑂
[F]
Where:
𝐼𝐻𝑆𝑂𝐶𝑃(𝑀𝑖𝑛) is the High side FET Current Protection (Min)
𝑡𝑆𝑆(𝑀𝑖𝑛) is the Soft Start Time (Min)
𝐼𝑂𝑆𝑇𝐴𝑅𝑇(𝑀𝑎𝑥) is the maximum output current during startup
Startup failure may happen if the limits from the above-mentioned are exceeded. Especially if the capacitance value is
extremely large, over-current protection may be activated by the inrush current at startup preventing the output to turn
on. Please confirm this on the actual application. For stable transient response, the loop is dependent to C O. Please
select after confirming the setting of the phase compensation circuit.
Also, in case of large changing input voltage and load current, select the capacitance accordingly by verifying that the
actual application setup meets the required specification.
Also at low load conditions the output buffer capacitor is determining the output voltage ripple but via a different
mechanism. Generally, this leads to a somewhat larger voltage ripple as in higher load conditions.
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
24/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Selection of Components Externally Connected – continued
3.
Selection of capacitor CVIN/CPVIN2/CPVIN3/CBULK input
The input capacitor is usually required for two types of decoupling capacitors C IN and bulk capacitors CBULK. At least
three ceramic capacitors need for the decoupling capacitors. Ceramic capacitors with values of 4.7 µF or more for CPVIN2
and 0.1 µF or more for CPVIN3 are recommended for the PVIN pin. Ceramic capacitor with value of 0.1 µF or more for
CVIN is recommended for the VIN pin.
Ceramic capacitors are effective by being placed as close as possible to the PVIN pin and the VIN pin. Voltage rating is
recommended to more than or equal to 1.2 times the maximum input voltage, or more than or equal to twice the normal
input voltage. The CPVIN2 value including temperature change, DC bias change, and aging change must be larger than
2.5 µF. In addition, the IC might not function properly when the PCB layout or the position of the capacitor is not good.
Check “Directions for Pattern Layout of PCB” on page 36.
The bulk capacitor is an option. The bulk capacitor prevents the decrease in the line voltage and serves a backup power
supply to keep the input potential constant. The low ESR electrolytic capacitor with large capacity is suitable for the bulk
capacitor. It is necessary to select the best capacitance value as per set of application. In that case, consider not to
exceed the rated ripple current of the capacitor.
The RMS value of the input ripple current is obtained in the following equation.
𝐼𝐶𝐼𝑁 = √𝐷 {
∆𝐼𝐿 2
12
+ 𝐼𝑂𝑈𝑇 2 (1 − 𝐷)}
[Arms]
Where:
𝐼𝐶𝐼𝑁 is the Arms value of the input ripple
𝐷 is switching pulse ON Duty
𝐼𝑂𝑈𝑇 is the output current
In addition, in the automotive and other applications requiring high reliability, it is recommended that the multiple
electrolytic capacitors are connected in parallel to avoid a dry up. In order to reduce a risk of destruction because of
short in a ceramic capacitor, we recommend using 2 serials +2 parallel structure.
Since the lineup also of what packed 2 series and 2 parallel structure in 1package, respectively is carried out by each
capacitor supplier, please confirm to each supplier.
When impedance on the input side is high because of wiring from the power supply to the PVIN pin and the VIN pin is
long, etc., high capacitance is needed. In actual conditions, it is necessary to verify that there is no problem like IC
operation is turned off or overshoot the output when the PVIN pin or the VIN pin voltage changes at transient response.
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
25/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Selection of Components Externally Connected – continued
4.
Selection of the switching frequency setting resistance RRT
The internal switching frequency can be set by connecting a resistor between the RT pin and the GND pin.
Range of the setting is 200 kHz to 2400 kHz, and the relation between resistance and the switching frequency is
decided as shown in Figure 32. Do not use a setting beyond this range.
2500
Switching Frequency : fOSC [kHz]
2000
1500
1000
SPS=L
SPS=H
500
0
0
50
100
150
200
250
300
350
Switching Frequency Setting Resistance : RRT [kΩ]
400
450
500
Figure 32. Switching Frequency vs Switching Frequency Setting Resistance
Table 4. Switching Frequency (SPS = L) Setting Resistance
Resistance
Table 5. Switching Frequency (SPS = H) Setting
RRT [kΩ]
fOSC [kHz]
(SPS = L)
RRT [kΩ]
fOSC [kHz]
(SPS = L)
RRT [kΩ]
fOSC [kHz]
(SPS = H)
RRT [kΩ]
fOSC [kHz]
(SPS = H)
24(Note 1)
2400
110(Note 2)
710
24(Note 1)
2250
110(Note 2)
661
27(Note 1)
2200
120(Note 2)
660
27(Note 2)
2060
120(Note 2)
614
30(Note 2)
2030
130(Note 2)
610
30(Note 2)
1898
130(Note 2)
568
33(Note 2)
1890
150(Note 2)
540
33(Note 2)
1766
150(Note 2)
502
36(Note 2)
1770
160(Note 2)
510
36(Note 2)
1653
160(Note 2)
475
39(Note 2)
1660
180(Note 2)
460
39(Note 2)
1550
180(Note 2)
428
43(Note 2)
1540
200(Note 2)
420
43(Note 2)
1437
200(Note 2)
391
47(Note 2)
1430
220(Note 2)
390
47(Note 2)
1333
220(Note 2)
363
51(Note 2)
1350
240(Note 2)
360
51(Note 2)
1258
240(Note 2)
335
56(Note 2)
1250
270(Note 2)
320
56(Note 2)
1164
270(Note 2)
298
62(Note 2)
1150
300(Note 2)
290
62(Note 2)
1071
300(Note 2)
270
68(Note 2)
1070
330(Note 2)
270
68(Note 2)
996
330(Note 2)
251
75(Note 2)
980
360(Note 2)
250
75(Note 2)
912
360(Note 2)
233
82(Note 2)
910
390(Note 2)
230
82(Note 2)
847
390(Note 2)
214
91(Note 2)
840
430(Note 2)
210
91(Note 2)
782
100(Note 2)
770
100(Note 2)
717
(Note 1) LLM (FPWM = L) and FPWM mode (FPWM = H) are available.
(Note 2) Only FPWM (FPWM = H) is available.
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
26/43
(Note 1) LLM (FPWM = L) and FPWM mode (FPWM = H) are available.
(Note 2) Only FPWM (FPWM = H) is available.
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Selection of Components Externally Connected – continued
5.
Selection of the phase compensation circuit R1, C1, C2
VO
VOUT
SW
R3
R2
ERROR
AMPLIFIER
VO
L1
BUFFER
CO
RO
SOFT
START
VREF
COMP
R1
C2
C1
Figure 33. Setting Phase Compensation Circuit
The cross over frequency fC (frequency at 0 dB gain) should be set lower than the frequency f C_MAX shown in Figure 34.
Maximum Cross Over Frequency :
fC_MAX [kHz]
25
20
15
Setting Area
10
5
0
200
600
1000
1400
1800
Switching Frequency : fOSC [kHz]
2200
Figure 34. Maximum Cross Over Frequency vs Switching Frequency
(1) Selection of the phase compensation setting resistance R1
R1 is determined in the following equation.
𝑅1 = 𝑓𝐶 ×
𝑅2 +𝑅3
𝑔𝑚 ×𝑅2
× 2𝜋 × 𝑅𝑠 × 𝐶𝑜
[Ω]
Where:
𝑓𝐶
is the Crossover Frequency [kHz].
𝑅2 +𝑅3
𝑅2
is the Feedback Resistance 4.125 (Typ)
𝑅𝑆
is the current sense Gain 230 [mΩ] (Typ)
𝑔𝑚
is the Error Amplifier Trans conductance 280 [µA/V] (Typ) x Buffer Voltage Gain 2.0 [V/V] (Typ)
𝐶𝑜
is the output capacitor [μF]
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
27/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Selection of Components Externally Connected – continued
(2) Selection of the phase compensation setting capacitor C1
To select the compensation capacitor C1, set the zero frequency created by R1 and C1.
This zero frequency is determined in the following equation.
𝑓𝑍 =
1
[Hz]
2𝜋×𝐶1 ×𝑅1
Set fZ to the frequency between 0.05 times and 1.5 times of crossover frequency fC, as the following equation.
0.05 × 𝑓𝐶 < 𝑓𝑍 < 1.5 × 𝑓𝐶 [Hz]
Therefore, C1 is determined in the following equation.
1
2𝜋×1.5×𝑓𝐶 ×𝑅1
< 𝐶1 <
1
2𝜋×0.05×𝑓𝐶 ×𝑅1
[F]
(3) Selection of the phase compensation setting capacitor C2
C2 and R1 form the pole fP. Set the fP much higher than fC for decreasing gain at high frequency.
C2 is determined in the following equation.
1
𝐶2 = 2𝜋×𝑅
[F]
1 ×𝑓𝑝
6.
Setting of soft start time (tSS)
The soft start function is necessary to prevent inrush of the inductor current and the output voltage overshoot at startup.
This IC has an internal pull-up current source of ISS that charges the external soft start capacitor. The soft start time can
be calculated by using the equation.
𝑡𝑆𝑆 =
𝐶𝑆𝑆 (𝑛𝐹)×0.8(𝑉)
𝐼𝑆𝑆 (𝜇𝐴)
[ms]
Where:
CSS is the capacitor connected to the SS pin.
ISS is soft start charge current.
CSS can be set between 2200 pF and 68000 pF.
EN 2 V/div
SS 1 V/div
VO 2 V/div
tSS
Figure 35. Soft start waveform
(VVIN = 13 V, CSS = 0.01 μF, 2 ms/div)
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
28/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Application Example1
Parameter
Symbol
Specification case
Product Name
IC
BD9P233MUF-C
Input Voltage
VVIN
8 V to 18 V
Output Voltage
VO
3.3 V
Output Current
IOUT
Min 0.5 A/Typ 1.0 A/Max 1.5 A
Switching Frequency
fOSC
2.2 MHz, SPS = H
Ambient Temperature
Ta
-40 °C to +105 °C
Specification Example
VIN
LF1
CF2
CF1
CPVIN1 CPVIN2 CPVIN3
PVIN
SW
PVIN
SW
PVIN
SW
VIN
CO1
VOUT
CVIN
VREGB
VOUT
RT
COMP
VO
L1
CO2
RVO
CVREGB
RRT
VEN
R1
EN
C1
C2
VSYNC
VREG3
SYNC
CVREG3
SPS
SS
CSS
VFPWM
FPWM
GND
PGOOD
R2
PGND
Reference Circuit
No.
Size
Parameters
Part name (series)
Manufacturer
-
Type
Electrolytic
capacitor
-
CF1
ϕ10 mm x L10 mm
220 μF, 50 V
UCD1H221MNL1GS
CPVIN1
3225
Open
CPVIN2
3225
4.7 μF, X7R, 50 V
GCM32ER71H475KA
Ceramic
MURATA
CPVIN3
2012
CVIN
2012
0.1 μF, X7R, 50 V
CEU4J2X7R1H104K
Ceramic
TDK
0.1 μF, X7R, 50 V
CEU4J2X7R1H104K
Ceramic
TDK
CVREGB
1608
1.0 μF, X7R ,16 V
GCM188R71C105KA
Ceramic
MURATA
CVREG3
R1
1608
1.0 μF, X7R ,16 V
GCM188R71C105KA
Ceramic
MURATA
1005
10 kΩ, 1 %, 1/16 W
MCR01MZPF1002
Chip resistor
ROHM
C1
1005
0.01 μF, R, 50 V
GCM155R11H103KA
Ceramic
MURATA
C2
1005
10 pF, CH, 50 V
GCM1552C1H100JA
Ceramic
MURATA
CSS
1005
2200 pF, R, 50 V
GCM155R11H222KA
Ceramic
MURATA
R2
1005
10 kΩ, 1 %, 1/16 W
MCR01MZPF1002
Chip resister
ROHM
RRT
1005
24 kΩ, 1 %, 1/16 W
MCR01MZPF2402
Chip resister
ROHM
L1
W6.0 x H4.5 x L6.3
mm3
NICHICON
-
2.2 μH
CLF6045NIT-2R2N-D
Inductor
TDK
CO1
3225
22 μF, R, 10 V
GCM32ER11A226KE11
Ceramic
MURATA
CO2
3225
22 μF, R, 10 V
GCM32ER11A226KE11
Ceramic
MURATA
RVO
-
Short
-
-
-
CF2
3225
4.7 μF, X7R, 50 V
GCM32ER71H475KA
Ceramic
MURATA
LF1
W6.0 x H4.5 x L6.3 mm3
2.2 μH
CLF6045NIT-2R2N-D
Inductor
TDK
Parts List
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
29/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Characteristic Data (Application Example1)
100
500
90
80
450
FPWM = L
400
Input Current [µA]
Efficiency [%]
70
60
50
40
30
20
10
200
150
0
0.1
1
10
100
Output Current [mA]
1000
10
180
45
135
15
45
0
0
Gain
-15
-45
-30
-90
-45
-135
-60
1000
10000
100000
Frequency [Hz]
VO 10 mV/div
-180
1000000
Figure 39. Output Ripple Voltage
(VVIN = 13 V, Ta = 25 °C, IOUT = 1.0 A, 10 μs/div)
Figure 38. Frequency Characteristic
(VVIN = 13 V, Ta = 25 °C, IOUT = 1.0 A)
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
1000
90
Phase [deg]
Phase
100
Output Current [µA]
Figure 37. Input Current vs Output Current
(VVIN = 13 V, Ta = 25 °C, LLM)
60
30
Gain [dB]
250
50
Figure 36. Efficiency vs Output Current
(VVIN = 13 V, Ta = 25 °C)
100
300
100
FPWM = H
0
0.01
350
30/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Characteristic Data (Application Example1) - continued
IOUT 0.5 A/div
IOUT 0.5 A/div
VO 100 mV/div
offset 3.3 V
VO 100 mV/div
offset 3.3 V
Figure 40. Load Response 1
(VVIN = 13 V, Ta = 25 °C, FPWM = H,
IOUT = 10 mA to 1.0 A, 1 ms/div)
Figure 41. Load Response 2
(VVIN = 13 V, Ta = 25 °C, FPWM = H,
IOUT = 0.5 A to 1.5 A, 100 μs/div)
FPWM 5 V/div
SW 10 V/div
VO 50 mV/div
offset 3.3 V
Figure 42. FPWM ON/OFF Response
(VVIN = 13 V, Ta = 25 °C, IOUT = 100 μA, 10 ms/div)
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
31/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Application Example2
Parameter
Symbol
Specification case
Product Name
IC
BD9P233MUF-C
Input Voltage
VVIN
8 V to 18 V
Output Voltage
VO
3.3 V
Output Current
IOUT
Min 0.5 A/Typ 1.0 A/Max 1.5 A
Switching Frequency
fOSC
391 kHz, SPS = H, FPWM = H
Ambient Temperature
Ta
-40 °C to +105 °C
Specification Example
VIN
CF2
LF1
CF1
CPVIN1 CPVIN2 CPVIN3
PVIN
SW
PVIN
SW
PVIN
SW
VIN
CO1
VOUT
CVIN
VREGB
VOUT
RT
COMP
VO
L1
CO2
RVO
CVREGB
RRT
VEN
R1
EN
C1
C2
VSYNC
VREG3
SYNC
CVREG3
SPS
SS
CSS
FPWM
PGOOD
R2
GND
PGND
Reference Circuit
No.
Size
Parameters
Part name (series)
Manufacturer
GCM32ER71H475KA
Type
Electrolytic
capacitor
Ceramic
CF1
ϕ10 mm x L10 mm
220 μF, 50 V
UCD1H221MNL1GS
CPVIN1
3225
4.7 μF, X7R, 50 V
CPVIN2
3225
4.7 μF, X7R, 50 V
GCM32ER71H475KA
Ceramic
MURATA
CPVIN3
2012
CVIN
2012
0.1 μF, X7R, 50 V
CEU4J2X7R1H104K
Ceramic
TDK
0.1 μF, X7R, 50 V
CEU4J2X7R1H104K
Ceramic
TDK
CVREGB
1608
1.0 μF, X7R ,16 V
GCM188R71C105KA
Ceramic
MURATA
CVREG3
R1
1608
1.0 μF, X7R ,16 V
GCM188R71C105KA
Ceramic
MURATA
1005
4.7 kΩ, 1 %, 1/16 W
MCR01MZPF4701
Chip resistor
ROHM
C1
C2
1005
0.01 μF, R, 50 V
GCM155R11H103KA
Ceramic
MURATA
1005
100 pF, CH, 50 V
GCM1552C1H101JA
Ceramic
MURATA
CSS
1005
2200 pF, R, 50 V
GCM155R11H222KA
Ceramic
MURATA
R2
1005
10 kΩ, 1 %, 1/16 W
MCR01MZPF1002
Chip resister
ROHM
RRT
1005
200 kΩ, 1 %, 1/16 W
MCR01MZPF2003
Chip resister
ROHM
L1
W6.0 x H4.5 x L6.3
mm3
NICHICON
MURATA
6.8 μH
CLF6045NIT-6R8N-D
Inductor
TDK
CO1
3225
22 μF, R, 10 V
GCM32ER11A226KE11
Ceramic
MURATA
CO2
3225
22 μF, R, 10 V
GCM32ER11A226KE11
Ceramic
MURATA
RVO
-
Short
-
-
-
CF2
3225
4.7 μF, X7R, 50 V
GCM32ER71H475KA
Ceramic
MURATA
LF1
W6.0 x H4.5 x L6.3 mm3
10 μH
CLF6045NIT-100M-D
Inductor
TDK
Parts List
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
32/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
100
20
90
18
80
16
70
14
Input Current [mA]
Efficiency [%]
Characteristic Data (Application Example2)
60
50
40
30
10
8
6
20
4
10
2
0
0.01
0
0.1
1
10
100
Output Current [mA]
1000
10
Figure 43. Efficiency vs Output Current
(VVIN = 13 V, Ta = 25 °C, FPWM = H)
180
45
135
15
45
0
0
-15
Gain
-45
-30
-90
-45
-135
-60
100
1000
10000
100000
Frequency [Hz]
VO 10 mV/div
-180
1000000
Figure 45. Frequency Characteristic
(VVIN = 13 V, Ta = 25 °C, IOUT = 1.0 A)
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
1000
90
Phase [deg]
Phase
100
Output Current [µA]
Figure 44. Input Current vs Output Current
(VVIN = 13 V, Ta = 25 °C, FPWM = H)
60
30
Gain [dB]
12
Figure 46. Output Ripple Voltage
(VVIN = 13 V, Ta = 25 °C, IOUT = 1.0 A, 10 μs/div)
33/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Characteristic Data (Application Example2) - continued
IOUT 0.5 A/div
IOUT 0.5 A/div
VO 100 mV/div
offset 3.3 V
VO 100 mV/div
offset 3.3 V
Figure 48. Load Response 2
(VVIN = 13 V, Ta = 25 °C, FPWM = H,
IOUT = 0.5 A to 1.5 A, 100 μs/div)
Figure 47. Load Response 1
(VVIN = 13 V, Ta = 25 °C, FPWM = H,
IOUT = 10 mA to 1.0 A, 1 ms/div)
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
34/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Automotive Power Supply Line Circuit
BATTERY
LINE
Reverse-touching
protection Diode
VIN
L
BD906xx-C series
D
TVS
C
C
π type filter
Figure 49. Automotive Power Supply Line Circuit
As a reference, the automotive power supply line circuit example is given in Figure 49.
π-type filter is a third-order LC filter. In general, it is used in combination with decoupling capacitors for high frequency. Large
attenuation characteristics can be obtained and thus excellent characteristic as a EMI filter. Devices used for π-type filters
should be placed close to each other.
TVS (Transient Voltage Suppressors) is used for primary protection of the automotive power supply line. Since it is
necessary to withstand high energy of load dump surge, a general zener diode is insufficient. Recommended device is
shown in the following table.
In addition, a reverse polarity protection diode is needed considering if a power supply such as battery is accidentally
connected in the opposite direction.
Device
Part name (series)
Manufacturer
Device
Part name (series)
Manufacturer
L
CLF series
TDK
TVS
SM8 series
Vishay
D
S3A to S3M series
Vishay
L
XAL series
Coilcraft
C
UCJ series / UCZ series
NICHICON
Parts of Automotive Power Supply Line Circuit
Recommended Parts Manufacturer List
Shown below is the list of the recommended parts manufacturers for reference.
Type
Manufacturer
Electrolytic capacitor
NICHICON
www.nichicon.com
Ceramic capacitor
Ceramic capacitor
Inductor
Inductor
Murata
www.murata.com
Coilcraft
www.coilcraft.com
Inductor
SUMIDA
www.sumida.com
Diode
Vishay
www.vishay.com
Diode/Resistor
ROHM
www.rohm.com
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
TDK
35/43
URL
www.global.tdk.com
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Directions for Pattern Layout of PCB
The PCB layout greatly influences the stable operation of the IC. Depending on the PCB layout, IC might not show its original
characteristics or might not function properly. Note the following points when creation the PCB layout. Moreover, Figure 51
on page 37 shows the recommended layout pattern and component placement. 4 layers PCB is recommended for this IC.
Power Ground
Reference Ground
Figure 50. PCB pattern around IC
1.
4.7 μF (CPVIN2) and 0.1 μF (CPVIN3) decoupling capacitors should be placed closest to the PVIN pins (pin1, 2, 3) and the
PGND pins (pin 22, 23, 24). As shown in the recommended layout example, both decoupling capacitors are placed
closest to the PVIN pins, the shortest wiring distance to the PGND pins can be drawn by routing it to the back side of the
IC via EXP-PAD (pin 31) and N.C. pin (pin 32). In addition, placing a capacitor CPVIN3 which is smaller than 4.7 μF
(CPVIN2) close to the PVIN pin results in minimizing the high-frequency noise.
2.
Make a slit between the PVIN pin and the VIN pin (pin 4). As the VIN pin is a power supply to the internal circuit, it needs
a stable supply voltage. By making a slit, it minimizes the influence of the spike generated at the PVIN pins to the VIN
pin directly. 0.1 μF decoupling capacitor of the VIN pin should be placed within the slit as shown in the recommended
layout example and should be connected to the reference ground.
3.
The IC, the input capacitor, the inductor and the output capacitor should be placed on the same side of the board and
the connection of each part should be made on the same layer.
4.
Place the ground plane in a layer closest to the surface layer where the IC is mounted.
5.
The GND pin (pin 12) is the reference ground and the PGND pins are the power ground. A stable ground inside the IC
can be obtained by separating these pins on the surface layer. Therefore, the GND pin should be separated from the
ground line of the IC backside.
6.
Separate the reference ground and the power ground on the surface layer and connect them to ground plane through
VIA. Each ground connection can be summarized as follows.
· Reference ground : the GND pin, ground of CVIN, CVREG3, C1, C2, CSS, RRT
· Power ground : the PGND pin, center EXP-PAD, pin 31 (EXP-PAD), pin 32 (N.C. pin), ground of input decoupling
capacitor (CPVIN1 to 3)
7.
To minimize the emission noise from switching node, the distance between the SW pin to inductor should be as short as
possible and not to expand the copper area more than necessary.
8.
Make the feedback line from the output away from the inductor and the switching node. If this line is affected by external
noise, an error may be occurred in the output voltage or the control may become unstable. Therefore, move the
feedback line to back side layer of the board through VIA and directly connect it to the VOUT pins (pin 10, 11). The
frequency characteristics (phase margin) can be measured by inserting a resistor at the location of RVO (refer to Bottom
view) and using FRA. However, do not insert any components on feedback line during normal operation.
9.
Connect phase compensation circuit (R1, C1 and C2) as close as possible to the COMP pin (pin 13).
10. Connect CSS as close as possible to the SS pin (pin 14).
11. Connect RRT as close as possible to the RT pin (pin 15).
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
36/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Directions for Pattern Layout of PCB – continued
Top view
Bottom view
Top layer
Middle layer1
Middle layer2
Bottom layer
Figure 51. Reference PCB pattern
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
37/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
I/O Equivalence Circuit
5. VREGB
7. EN, 8. FPWM, 18. SPS
PVIN
EN /
FPWM /
SPS
10 kΩ
1000 kΩ
100 kΩ
VREGB
10 Ω
100 Ω
GND
PGND
GND
9. VREG3
10. 11. VOUT
VREG3
VIN
40 Ω
PVIN
VOUT
1250 kΩ
VREG3
3000 kΩ
400 kΩ
GND
GND
13. COMP
14. SS
VREG3
VREG3
10 kΩ
10 kΩ
2.5 kΩ
10 kΩ
SS
50 kΩ
COMP
50 Ω
10 kΩ
1 kΩ
800 kΩ
GND
GND
15. RT
20. PGOOD
VREG3
PGOOD
225 Ω
333 Ω
RT
GND
GND
21. SYNC
27. 28. 29. SW
VIN
VREG3
PVIN
SYNC
SW
250 kΩ
250 Ω
250 kΩ
GND
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
PGND
38/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at
all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic
capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition. However,
pins that drive inductive loads (e.g. motor driver outputs, DC-DC converter outputs) may inevitably go below ground
due to back EMF or electromotive force. In such cases, the user should make sure that such voltages going below
ground will not cause the IC and the system to malfunction by examining carefully all relevant factors and conditions
such as motor characteristics, supply voltage, operating frequency and PCB wiring to name a few.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Recommended Operating Conditions
The function and operation of the IC are guaranteed within the range specified by the recommended operating
conditions. The characteristic values are guaranteed only under the conditions of each item specified by the electrical
characteristics.
6.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power
supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and
routing of connections.
7.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
8.
Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
9.
Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge
acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause
unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power
supply or ground line.
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
39/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Operational Notes – continued
10. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
C
E
Pin A
N
P+
P
N
N
P+
N
Pin B
B
Parasitic
Elements
N
P+
N P
N
P+
B
N
C
E
Parasitic
Elements
P Substrate
P Substrate
GND
GND
Parasitic
Elements
GND
Parasitic
Elements
GND
N Region
close-by
Figure 52. Example of monolithic IC structure
11. Ceramic Capacitor
When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
12. Thermal Shutdown Circuit (TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always
be within the IC’s maximum junction temperature rating. If however the rating is exceeded for a continued period, the
junction temperature (Tj) will rise which will activate the TSD circuit that will turn OFF power output pins. When the Tj
falls below the TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from
heat damage.
13. Over Current Protection Circuit (OCP)
This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This
protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should
not be used in applications characterized by continuous operation or transitioning of the protection circuit.
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
40/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Ordering Information
B
D
9
Part Number
P
2
Current
Capacity
2:2A
3
3
Output
Voltage
3 : 3.3 V
M
U
F
-
Package
MUF : VQFN32FAV050
C
E
2
Product Rank
C : for Automotive
Packaging Specification
E2 : Embossed tape and reel
Making Diagram
VQFN32FAV050 (TOP VIEW)
Part Number Marking
D9P233
LOT Number
Pin 1 Mark
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
41/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
BD9P233MUF-C
Physical Dimension and Packing Information
Package Name
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
VQFN32FAV050
42/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
Revision History
Date
Revision
19.Jul.2019
001
Changes
New Release
www.rohm.com
© 2019 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
43/43
TSZ02201-0J1J0AL01460-1-2
19.Jul.2019 Rev.001
Notice
Precaution on using ROHM Products
1.
If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1),
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.
However, recommend sufficiently about the residue.); or Washing our Products by using water or water-soluble
cleaning agents for cleaning residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PAA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.004
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl 2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PAA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.004
Datasheet
General Precaution
1. Before you use our Products, you are requested to carefully read this document and fully understand its contents.
ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this document is current as of the issuing date and subject to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales
representative.
3.
The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001
工商网监
湘ICP备2023018690号
