BU21180FS-E2

Datasheet Capacitive Switch Controller ICs Capacitive Switch Controller IC BU21180FS General Description Key Specifications  Power Supply Voltage Range:  Operating Temperature Range:  Operating Current: BU21180FS is a capacitive switch controller for switch operation. This IC uses changes in capacitance to detect Switch ON / OFF / Long Press. Features         Package 20 Capacitive Sensor Ports. Switch ON / OFF / Long Press Detection. Information by Interrupt Terminal. Noise Calibration Function. Drift Calibration Function. Switch Detection Time Function. 2-wire Serial Bus Interface. Single Power Supply. 3.0V to 5.5V -25°C to +85°C 3.5mA(Typ) W(Typ) x D(Typ) x H(Max) SSOP-A32 13.60mm x 7.80mm x 2.01mm Applications     Office Automation Appliance as Printer. AV Appliance as TV and HDD Recorder. Home Appliance as Air Conditioner, Refrigerator and Rice Cooker. Electrical Equipment with Multiple Switches. SSOP-A32 Typical Application Circuit VDD VDD VDD VDD (Note 1) 32 1 VSS SDA SCL INTB RSTB ADDR TEST2 TEST1 HOST Sensor Electrode CS19 CS18 CS17 CS16 CS15 CS14 CS13 CS12 (Note 2) DVDD 1.0μF 4.7μF NC 0.1μF VDD AVDD CS0 CS1 CS2 CS3 CS4 CS5 CS6 CS7 CS8 CS9 CS10 CS11 2.2μF 17 16 (Note 1) The pull-up resistors must be connected to VDD. Choose the value of the pull-up resistors so as to meet 2-wire Serial Bus Interface Electrical Characteristics. (Note 2) For noise protection, choose the value of the resistors by evaluation. Figure 1. Typical Application Circuit 〇Product structure : Silicon monolithic integrated circuit www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111・14・001 〇This product has no designed protection against radioactive rays 1/40 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS Contents General Description ................................................................................................................................................................ 1 Features ................................................................................................................................................................................. 1 Applications ............................................................................................................................................................................ 1 Key Specifications ................................................................................................................................................................... 1 Package ................................................................................................................................................................................. 1 Typical Application Circuit ........................................................................................................................................................ 1 Contents ................................................................................................................................................................................. 2 Pin Configuration .................................................................................................................................................................... 3 Pin Description........................................................................................................................................................................ 3 I/O Equivalent Circuit .............................................................................................................................................................. 4 Block Diagram ........................................................................................................................................................................ 5 Description of Block ................................................................................................................................................................ 5 Absolute Maximum Ratings ..................................................................................................................................................... 6 Thermal Resistance ................................................................................................................................................................ 6 Recommended Operating Conditions ...................................................................................................................................... 7 Electrical Characteristics ......................................................................................................................................................... 7 Interface Specification ............................................................................................................................................................. 8 2-wire Serial Bus Interface Electrical Characteristics ............................................................................................................. 8 2-wire Serial Bus Protocol .................................................................................................................................................... 9 Power-on Sequence / Reset Timing ....................................................................................................................................... 10 Register Map ........................................................................................................................................................................ 11 Register Description .............................................................................................................................................................. 17 Status Register Description ................................................................................................................................................ 17 Configuration Register Description ..................................................................................................................................... 23 Command Register Description.......................................................................................................................................... 33 Operational Notes ................................................................................................................................................................. 36 Ordering Information ............................................................................................................................................................. 38 Marking Diagram................................................................................................................................................................... 38 Physical Dimension and Packing Information ......................................................................................................................... 39 Revision History .................................................................................................................................................................... 40 www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 2/40 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS Pin Configuration 32 1 VSS SDA SCL INTB DVDD NC VDD AVDD RSTB ADDR TEST2 TEST1 CS19 CS18 CS17 CS16 CS15 CS14 CS13 CS12 CS0 CS1 CS2 CS3 CS4 CS5 CS6 CS7 CS8 CS9 CS10 CS11 TOP VIEW 17 16 Figure 2. Pin Configuration Pin Description Pin No. Pin Name I/O Type 1 VSS - 2 SDA IN/OUT 3 SCL IN/OUT Power Initial Condition (RSTB=L) I/O Equivalent Circuit - - - Host interface pin: Serial Data Line VDD HIZ Figure 3 Host interface pin: Serial Clock Line VDD HIZ Figure 3 VDD HIZ Figure 3 VDD L Figure 4 VDD HIZ Figure 4 VDD HIZ Figure 4 VDD HIZ Figure 4 Function Ground Interrupt pin Active low interrupt Reset pin L : Reset H : Normal Operate 7bit Slave address selection pin L : Slave address 0x5C H : Slave address 0x5D Test pin Connect to Ground. Test pin Connect to Ground. 4 INTB OUT 5 RSTB IN 6 ADDR IN 7 TEST2 IN 8 TEST1 IN 9 CS19 IN/OUT Sensor pin(Note 3) AVDD HIZ Figure 5 10 CS18 IN/OUT Sensor pin(Note 3) AVDD HIZ Figure 5 11 CS17 IN/OUT Sensor pin(Note 3) AVDD HIZ Figure 5 12 CS16 IN/OUT Sensor pin(Note 3) AVDD HIZ Figure 5 13 CS15 IN/OUT Sensor pin(Note 3) AVDD HIZ Figure 5 14 CS14 IN/OUT Sensor pin(Note 3) AVDD HIZ Figure 5 15 CS13 IN/OUT Sensor pin(Note 3) AVDD HIZ Figure 5 16 CS12 IN/OUT Sensor pin(Note 3) AVDD HIZ Figure 5 www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 3/40 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS Pin Description - continued Power Initial Condition (RSTB=L) I/O Equivalent Circuit Sensor pin(Note 3) AVDD HIZ Figure 5 IN/OUT Sensor pin(Note 3) AVDD HIZ Figure 5 CS9 IN/OUT Sensor pin(Note 3) AVDD HIZ Figure 5 20 CS8 IN/OUT Sensor pin(Note 3) AVDD HIZ Figure 5 21 CS7 IN/OUT Sensor pin(Note 3) AVDD HIZ Figure 5 22 CS6 IN/OUT Sensor pin(Note 3) AVDD HIZ Figure 5 23 CS5 IN/OUT Sensor pin(Note 3) AVDD HIZ Figure 5 24 CS4 IN/OUT Sensor pin(Note 3) AVDD HIZ Figure 5 25 CS3 IN/OUT Sensor pin(Note 3) AVDD HIZ Figure 5 26 CS2 IN/OUT Sensor pin(Note 3) AVDD HIZ Figure 5 27 CS1 IN/OUT Sensor pin(Note 3) AVDD HIZ Figure 5 28 CS0 IN/OUT Sensor pin(Note 3) AVDD HIZ Figure 5 29 AVDD OUT LDO output pin for sensor block - 0V - 30 VDD - Power - - - No Connect pin with pull-down resistor This pin should be left as open circuit - - - LDO output pin for digital block - 1.5V - Pin No. Pin Name I/O Type 17 CS11 IN/OUT 18 CS10 19 31 NC - 32 DVDD OUT Function (Note 3) If not used, this pin must be left as an open circuit. I/O Equivalent Circuit VDD AVDD VDD ASW AIN CIN I PAD I PAD www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 PAD OEN OEN Figure 3. I/O Equivalent Circuit I Figure 4. I/O Equivalent Circuit 4/40 Figure 5. I/O Equivalent Circuit TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS Block Diagram ・ ・ ・ MUX + Driver CS0 ・ ・ ・ LDO28 AVDD LDO15 DVDD C/V Converter , A/D Converter CS19 dummy VDD Analog Controller Instruction Memory Power On Reset Work Memory MPU WDT Timer Timing Generator OSC BUS RSTB HOST I/F TEST LOGIC TEST1 SDA,SCL ADDR INTB TEST2 VDD VSS Figure 6. Block Diagram Description of Block MUX, Driver, C/V Converter, A/D Converter This block converts from capacitance to voltage and the voltage to digital value for each sensor. LDO28 This block is AVDD LDO that supplies 2.8V to MUX, Driver, C/V Converter and A/D Converter. Referred to as AVDD in this document. LDO15 This block is DVDD LDO that supplies 1.5V to OSC and LOGIC. Referred to as DVDD in this document. OSC This block is ring oscillator for MPU and LOGIC. MPU This block detects ON / OFF / Long Press of switches and performs automatic calibration based on the detection results. The result is informed by the INTB pin. Instruction Memory This block is Program ROM for MPU. Work Memory This block is Working RAM for MPU. HOST I/F 2-wire serial bus interface compatible with I 2C protocol. Analog Controller This block is control sequencer for MUX, Driver, C/V Converter and A/D Converter. WDT This block is watchdog timer reset. When the MPU is hang-upped, the system is reset by WDT. Timing Generator, Timer This block generates clock for MPU peripherals based on OSC clock. www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 5/40 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS Absolute Maximum Ratings (Ta=25°C) Parameter Power Supply Voltage Input Terminal Voltage Maximum Junction Temperature Storage Temperature Range Symbol Rating Unit VDD -0.3 to +7.0 V VIN -0.3 to VDD +0.3 V Tjmax 125 °C Tstg -55 to +125 °C Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over the absolute maximum ratings. Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, design a PCB boards with thermal resistance taken into consideration by increasing board size and copper area so as not to exceed the maximum junction temperature rating. Thermal Resistance(Note 4) Parameter Symbol Thermal Resistance (Typ) Unit 1s(Note 6) 2s2p(Note 7) θJA 82.9 45.2 °C/W ΨJT 6 6 °C/W SSOP-A32 Junction to Ambient Junction to Top Characterization Parameter (Note 5) (Note 4) Based on JESD51-2A(Still-Air) (Note 5) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside surface of the component package. (Note 6) Using a PCB board based on JESD51-3. Layer Number of Measurement Board Single Material Board Size FR-4 114.3mm x 76.2mm x 1.57mmt Top Copper Pattern Thickness Footprints and Traces 70μm (Note 7) Using a PCB board based on JESD51-7. Layer Number of Measurement Board Material Board Size 4 Layers FR-4 114.3mm x 76.2mm x 1.6mmt Top 2 Internal Layers Bottom Copper Pattern Thickness Copper Pattern Thickness Copper Pattern Thickness Footprints and Traces 70μm 74.2mm x 74.2mm 35μm 74.2mm x 74.2mm 70μm www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 6/40 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS Recommended Operating Conditions Parameter Symbol Min Typ Max Unit Power Supply Voltage VDD 3.0 5.0 5.5 V Operating Temperature Topr -25 +25 +85 °C Electrical Characteristics (Unless otherwise specified VDD=5.0V Ta=25°C) Parameter Symbol Limit Min Typ Max Unit Conditions Input High Voltage VIH VDD x 0.7 - VDD + 0.3 V - Input Low Voltage VIL VSS - 0.3 - VDD x 0.3 V - VOHCS VAVDD x 0.7 - VAVDD V IOH = -1mA (CS pin) VOLCS VSS - VAVDD x 0.3 V IOL = +1mA (CS pin) VOL1 VSS - VSS + 0.4 V IOL = +3mA (SDA/SCL/INTB pin) VOL2 VSS - VSS + 0.6 V IOL = +6mA (SDA/SCL/INTB pin) Oscillator Clock Frequency fOSC 45 50 55 MHz - DVDD LDO Output Voltage VDVDD 1.35 1.50 1.65 V - AVDD LDO Output Voltage VAVDD 2.67 2.80 2.93 V When AVDD is set to 2.8V. Standby Current ISTBY - 70 200 µA RSTB=L Active Current IACT 1.9 3.5 5.0 mA RSTB=H and Sensor enable CS terminals: No load Output High Voltage Output Low Voltage www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 7/40 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS Interface Specification 2-wire Serial Bus Interface Compatible with I2C Protocol Support Slave Mode Only 7bit Slave Address = 0x5C (in case of ADDR=L) / 0x5D (in case of ADDR=H) Support Sequential Read Support Clock Stretching SDA 1-7 SCL 8 9 1-7 8 9 1-7 8 9 P S START Address R/W ACK Data ACK NACK /ACK Data STOP Figure 7. 2-wire Serial Bus Data Format SDA tHD;STA tSU;DAT tHD;STA tBUF tLOW SCL tHD;DAT START condition tHIGH tSU;STA tSU;STO repeated START condition STOP condition START condition Figure 8. 2-wire Serial Bus Data Timing Chart 2-wire Serial Bus Interface Electrical Characteristics (Unless otherwise specified VDD=5.0V Ta=25°C) Parameter Symbol Limit Unit Conditions Min Typ Max fSCL 0 - 400 kHz - Hold Time (repeated) START Condition tHD;STA 0.6 - - µs - Low Period of the SCL Clock tLOW 1.3 - - µs - High Period of the SCL Clock tHIGH 0.6 - - µs - Data Hold Time tHD;DAT 0 - - µs - Data Set-up Time tSU;DAT 0.1 - - µs - Set-up Time for a Repeated START Condition tSU;STA 0.6 - - µs - Set-up Time for STOP Condition tSU;STO 0.6 - - µs - tBUF 1.3 - - µs - SCL Clock Frequency Bus Free Time between STOP and START Condition www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 8/40 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS 2-wire Serial Bus Protocol Write Protocol S T A R T Slave Address with Write Bit S S S S S S S A A A A A A A 6 5 4 3 2 1 0 1 W R A I C T K E Register Address A C K R R R R R R R R A A A A A A A A 7 6 5 4 3 2 1 0 W W W W W W W W D D D D D D D D 7 6 5 4 3 2 1 0 3 2 A C K Write Data[0] A C K Write Data[1] Write Data[n] W W W W W W W W D D D D D D D D 7 6 5 4 3 2 1 0 W W W W W W W W D D D D D D D D 7 6 5 4 3 2 1 0 4 4 4 S A T C O K P 5 controlled by HOST controlled by BU21180FS Figure 9. 2-wire Serial Bus Write Protocol 1: The communication starts when IC received the START condition. 2: IC transmits ACK signal when 7-bit slave address and write bit are received. IC carries out processing by MPU after the transmission of ACK signal. Clock stretch is carried out during the processing. 3: IC transmits ACK signal when 8-bit write register address are received. IC carries out processing by MPU after the transmission of ACK signal. Clock stretch is carried out during the processing. 4: IC transmits ACK signal when 8-bit write data are received. IC carries out processing by MPU after the transmission of ACK signal. Clock stretch is carried out during the processing. IC supports sequential write. So the register address is incremented, and the next of 0xFF becomes 0x00. 5: The communication finishes when IC received the STOP condition. Read Protocol S T A R T Slave Address with Write Bit S S S S S S S A A A A A A A 6 5 4 3 2 1 0 1 2 W R A I C T K E S A T C A K R T Register Address R R R R R R R R A A A A A A A A 7 6 5 4 3 2 1 0 3 Slave Address with Read Bit S S S S S S S A A A A A A A 6 5 4 3 2 1 0 4 R E A D A C K R R R R R R R R D D D D D D D D 7 6 5 4 3 2 1 0 6 5 A C K Read Data[0] Read Data[1] N A C K S T O P R R R R R R R R D D D D D D D D 7 6 5 4 3 2 1 0 6 7 controlled by HOST controlled by BU21180FS Figure 10. 2-wire Serial Bus Read Protocol 1: The communication starts when IC received the START condition. 2: IC transmits ACK signal when 7-bit slave address and write bit are received. IC carries out processing by MPU after the transmission of ACK signal. Clock stretch is carried out during the processing. 3: IC transmits ACK signal when 8-bit read register address are received. IC carries out processing by MPU after the transmission of ACK signal. Clock stretch is carried out during the processing. 4: The communication continues when IC received start condition signal. 5: IC transmits ACK signal when 7-bit slave address and read bit are received. IC carries out processing by MPU after the transmission of ACK signal. Clock stretch is carried out during the processing. 6: IC transmits read data every clock is received until NACK signal. IC carries out processing by MPU after receiving ACK or NACK signal. Clock stretch is carried out during the processing. IC supports sequential read. So the register address is incremented, and the next of 0xFF becomes 0x00. 7: The communication finishes when IC received the STOP condition. www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 9/40 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS Power-on Sequence / Reset Timing Built-in LDO (DVDD) boots after VDD power is supplied. The reset condition is released by setting RSTB from low to high after DVDD booted. IC is accessible from host after initializing MPU. IC is accessible from host after the build-in power-on reset circuit was released in the case the RSTB pin is connected to the VDD pin. The filter circuit is integrated for the RSTB pin. The signal less than “Rejected RSTB Pulse Width” are rejected by the filter. To initialize IC, the signal larger than “Detected RSTB Pulse Width” is required. Power-on Flowchart Power-on （RSTB is controlled) Power-on （RSTB is connected to VDD） VDD Supply VDD Supply Wait for boot time of DVDD Wait for boot time of DVDD Release Reset Change RSTB to ‘H’ I/F communication standby time Wait more than 10ms I/F communication standby time Wait more than 10ms End Power-on （RSTB is controlled) End Power-on （RSTB is connected to VDD） Figure 11. Power-on Flowchart Power-on Timing tVR 90% VDD 10% tRC RSTB (Active Low) DVDD (Built-in LDO) tRW tSTBY (RSTB is controlled) tSTBY (RSTB is connected to VDD) AVDD （Built-in LDO） Power-on Reset (Active Low) I/F Access INTB Figure 12. Power-on Timing Power-on / Reset Timing Electrical Characteristics (Unless otherwise specified VDD=5.0V Ta=25°C) Limit Parameter Symbol Unit Conditions Min Typ Max VDD Rise Time tVR 1 - 10 ms - tSTBY - - 10 ms - Rejected RSTB Pulse Width tRC - - 3 µs - Detected RSTB Pulse Width tRW 10 - - µs - I/F Communication Standby Time www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 10/40 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS Register Map Unless otherwise specified oscillator frequency is 50MHz. Accessing the reserved area is prohibited. Initial value is the value after initialization by MPU. Status Register Address R/W Initial 0x00 R 0x00 Bit7 Bit6 Bit5 Bit4 DATA_CS0[7:0] Bit3 0x01 R 0x00 DATA_CS1[7:0] 0x02 R 0x00 DATA_CS2[7:0] 0x03 R 0x00 DATA_CS3[7:0] 0x04 R 0x00 DATA_CS4[7:0] 0x05 R 0x00 DATA_CS5[7:0] 0x06 R 0x00 DATA_CS6[7:0] 0x07 R 0x00 DATA_CS7[7:0] 0x08 R 0x00 DATA_CS8[7:0] 0x09 R 0x00 DATA_CS9[7:0] 0x0A R 0x00 DATA_CS10[7:0] 0x0B R 0x00 DATA_CS11[7:0] 0x0C R 0x00 DATA_CS12[7:0] 0x0D R 0x00 DATA_CS13[7:0] 0x0E R 0x00 DATA_CS14[7:0] 0x0F R 0x00 DATA_CS15[7:0] 0x10 R 0x00 DATA_CS16[7:0] 0x11 R 0x00 DATA_CS17[7:0] 0x12 R 0x00 DATA_CS18[7:0] 0x13 R 0x00 DATA_CS19[7:0] 0x14 - - 0x15 R 0x00 FDATA_CS0[15:8] 0x16 R 0x00 FDATA_CS0[7:0] 0x17 R 0x00 FDATA_CS1[15:8] 0x18 R 0x00 FDATA_CS1[7:0] Bit1 Bit0 RESERVED 0x19 R 0x00 FDATA_CS2[15:8] 0x1A R 0x00 FDATA_CS2[7:0] 0x1B R 0x00 FDATA_CS3[15:8] 0x1C R 0x00 FDATA_CS3[7:0] 0x1D R 0x00 FDATA_CS4[15:8] 0x1E R 0x00 FDATA_CS4[7:0] 0x1F R 0x00 FDATA_CS5[15:8] 0x20 R 0x00 FDATA_CS5[7:0] 0x21 R 0x00 FDATA_CS6[15:8] 0x22 R 0x00 FDATA_CS6[7:0] 0x23 R 0x00 FDATA_CS7[15:8] 0x24 R 0x00 FDATA_CS7[7:0] 0x25 R 0x00 FDATA_CS8[15:8] 0x26 R 0x00 FDATA_CS8[7:0] 0x27 R 0x00 FDATA_CS9[15:8] 0x28 R 0x00 FDATA_CS9[7:0] 0x29 R 0x00 FDATA_CS10[15:8] 0x2A R 0x00 FDATA_CS10[7:0] 0x2B R 0x00 FDATA_CS11[15:8] 0x2C R 0x00 FDATA_CS11[7:0] www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 Bit2 11/40 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS Register Map - continued Status Register Address R/W Initial 0x2D R 0x00 FDATA_CS12[15:8] 0x2E R 0x00 FDATA_CS12[7:0] 0x2F R 0x00 FDATA_CS13[15:8] 0x30 R 0x00 FDATA_CS13[7:0] 0x31 R 0x00 FDATA_CS14[15:8] 0x32 R 0x00 FDATA_CS14[7:0] 0x33 R 0x00 FDATA_CS15[15:8] 0x34 R 0x00 FDATA_CS15[7:0] 0x35 R 0x00 FDATA_CS16[15:8] 0x36 R 0x00 FDATA_CS16[7:0] 0x37 R 0x00 FDATA_CS17[15:8] 0x38 R 0x00 FDATA_CS17[7:0] 0x39 R 0x00 FDATA_CS18[15:8] 0x3A R 0x00 FDATA_CS18[7:0] 0x3B R 0x00 FDATA_CS19[15:8] 0x3C R 0x00 FDATA_CS19[7:0] 0x3D-0x3F - - 0x40 R Bit7 R 0x00 0x42 R 0x00 0x43 R 0x00 0x44 R 0x00 0x45 R 0x00 0x46 R 0x00 0x47 R 0x00 0x48 R 0x00 0x49 R 0x00 0x4A R 0x00 0x4B R 0x00 0x4C R 0x00 0x4D R 0x00 0x4E R 0x00 0x4F R 0x00 0x50 R 0x00 0x51 R 0x00 0x52 R 0x00 0x53 R 0x00 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 RESERVED INT_ NOISE 0x01 0x41 Bit6 INT_UNK - - - INT_MULT_ OFF INT_MULT_ ON INT_ FALCAL INT_ HLDRPT - - - - - - - DET_ON _CS7 DET_ON _CS15 DET_ON _CS6 DET_ON _CS14 DET_ON _CS5 DET_ON _CS13 DET_ON _CS4 DET_ON _CS12 DET_ON _CS3 DET_ON _CS11 DET_ON _CS19 DET_OFF _CS3 DET_OFF _CS11 DET_OFF _CS19 DET_HLD _CS3 DET_HLD _CS11 DET_HLD _CS19 DET_HLD RPT _CS3 DET_HLD RPT _CS11 DET_HLD RPT _CS19 DET_MULT _ON_D DET_MULT _OFF_D DET_UNK _CS3 DET_UNK _CS11 DET_UNK _CS19 SW_STAT _CS3 SW_STAT _CS11 SW_STAT _CS19 DET_ON _CS2 DET_ON _CS10 DET_ON _CS18 DET_OFF _CS2 DET_OFF _CS10 DET_OFF _CS18 DET_HLD _CS2 DET_HLD _CS10 DET_HLD _CS18 DET_HLD RPT _CS2 DET_HLD RPT _CS10 DET_HLD RPT _CS18 DET_MULT _ON_C DET_MULT _OFF_C DET_UNK _CS2 DET_UNK _CS10 DET_UNK _CS18 SW_STAT _CS2 SW_STAT _CS10 SW_STAT _CS18 INT_ SW_OFF INT_ AVDDOFF DET_ON _CS1 DET_ON _CS9 DET_ON _CS17 DET_OFF _CS1 DET_OFF _CS9 DET_OFF _CS17 DET_HLD _CS1 DET_HLD _CS9 DET_HLD _CS17 DET_HLD RPT_CS1 DET_HLD RPT_CS9 DET_HLD RPT_CS17 DET_MULT _ON_B DET_MULT _OFF_B DET_UNK _CS1 DET_UNK _CS9 DET_UNK _CS17 SW_STAT _CS1 SW_STAT _CS9 SW_STAT _CS17 - RUN_CAL RUN_AFE - - - - - DET_OFF _CS7 DET_OFF _CS15 DET_OFF _CS6 DET_OFF _CS14 DET_OFF _CS5 DET_OFF _CS13 DET_OFF _CS4 DET_OFF _CS12 - - - - DET_HLD _CS7 DET_HLD _CS15 DET_HLD _CS6 DET_HLD _CS14 DET_HLD _CS5 DET_HLD _CS13 DET_HLD _CS4 DET_HLD _CS12 - - - - DET_HLD RPT_CS7 DET_HLD RPT_CS15 DET_HLD RPT _CS6 DET_HLD RPT _CS14 DET_HLD RPT _CS5 DET_HLD RPT _CS13 DET_HLD RPT _CS4 DET_HLD RPT _CS12 - - - - DET_MULT _ON_H DET_MULT _OFF_H DET_UNK _CS7 DET_UNK _CS15 DET_MULT _ON_G DET_MULT _OFF_G DET_UNK _CS6 DET_UNK _CS14 DET_MULT _ON_F DET_MULT _OFF_F DET_UNK _CS5 DET_UNK _CS13 DET_MULT _ON_E DET_MULT _OFF_E DET_UNK _CS4 DET_UNK _CS12 - - - - SW_STAT _CS7 SW_STAT _CS15 SW_STAT _CS6 SW_STAT _CS14 SW_STAT _CS5 SW_STAT _CS13 SW_STAT _CS4 SW_STAT _CS12 - 0x54 R 0x00 0x55 R 0x00 0x56 R 0x00 - - - 0x57 R 0x00 - - - 0x58 R 0x00 - INT_HLD INT_ FININI INT_ SW_ON INT_ AVDDON DET_ON _CS0 DET_ON _CS8 DET_ON _CS16 DET_OFF _CS0 DET_OFF _CS8 DET_OFF _CS16 DET_HLD _CS0 DET_HLD _CS8 DET_HLD _CS16 DET_HLD RPT_CS0 DET_HLD RPT_CS8 DET_HLD RPT_CS16 DET_MULT _ON_A DET_MULT _OFF_A DET_UNK _CS0 DET_UNK _CS8 DET_UNK _CS16 SW_STAT _CS0 SW_STAT _CS8 SW_STAT _CS16 - NUM_FALCAL[7:0] 0x59-0x5E - - RESERVED 0x5F R 0x09 FW_VER[7:0] www.rohm.com © 2017 ROHM Co., Ltd. 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TSZ22111 • 15 • 001 INT_ FINCAL 12/40 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS Register Map - continued Configuration Register Address R/W Initial 0x60 R/W 0x00 Bit7 Bit6 0x61 R/W 0x00 0x62 R/W 0x50 0x63 R/W 0x55 0x64 R/W 0x55 0x65 - - 0x66 R/W 0x7F VAL_GA_CS1[3:0] VAL_GA_CS0[3:0] 0x67 R/W 0x77 VAL_GA_CS3[3:0] VAL_GA_CS2[3:0] 0x68 R/W 0x77 VAL_GA_CS5[3:0] VAL_GA_CS4[3:0] 0x69 R/W 0x77 VAL_GA_CS7[3:0] VAL_GA_CS6[3:0] 0x6A R/W 0x77 VAL_GA_CS9[3:0] VAL_GA_CS8[3:0] CS3_SCAN_SEL[1:0] Bit5 Bit4 Bit3 Bit2 Bit1 CS1_SCAN_SEL[1:0] CS0_SCAN_SEL[1:0] CS7_SCAN_SEL[1:0] CS6_SCAN_SEL[1:0] CS5_SCAN_SEL[1:0] CS4_SCAN_SEL[1:0] CS11_SCAN_SEL[1:0] CS10_SCAN_SEL[1:0] CS9_SCAN_SEL[1:0] CS8_SCAN_SEL[1:0] CS15_SCAN_SEL[1:0] CS14_SCAN_SEL[1:0] CS13_SCAN_SEL[1:0] CS12_SCAN_SEL[1:0] CS19_SCAN_SEL[1:0] CS18_SCAN_SEL[1:0] CS17_SCAN_SEL[1:0] CS16_SCAN_SEL[1:0] RESERVED 0x6B R/W 0xFF VAL_GA_CS11[3:0] VAL_GA_CS10[3:0] 0x6C R/W 0xFF VAL_GA_CS13[3:0] VAL_GA_CS12[3:0] 0x6D R/W 0xFF VAL_GA_CS15[3:0] VAL_GA_CS14[3:0] 0x6E R/W 0xFF VAL_GA_CS17[3:0] VAL_GA_CS16[3:0] 0x6F R/W 0xFF VAL_GA_CS19[3:0] 0x70 R/W 0xC8 VAL_TH_ON_CS0[7:0] 0x71 R/W 0x64 VAL_TH_OFF_CS0[7:0] 0x72 R/W 0xC8 VAL_TH_ON_CS1[7:0] 0x73 R/W 0x64 VAL_TH_OFF_CS1[7:0] 0x74 R/W 0xC8 VAL_TH_ON_CS2[7:0] 0x75 R/W 0x64 VAL_TH_OFF_CS2[7:0] 0x76 R/W 0xC8 VAL_TH_ON_CS3[7:0] 0x77 R/W 0x64 VAL_TH_OFF_CS3[7:0] 0x78 R/W 0xC8 VAL_TH_ON_CS4[7:0] VAL_GA_CS18[3:0] 0x79 R/W 0x64 VAL_TH_OFF_CS4[7:0] 0x7A R/W 0xC8 VAL_TH_ON_CS5[7:0] VAL_TH_OFF_CS5[7:0] 0x7B R/W 0x64 0x7C R/W 0xC8 VAL_TH_ON_CS6[7:0] 0x7D R/W 0x64 VAL_TH_OFF_CS6[7:0] 0x7E R/W 0xC8 VAL_TH_ON_CS7[7:0] 0x7F R/W 0x64 VAL_TH_OFF_CS7[7:0] 0x80 R/W 0xC8 VAL_TH_ON_CS8[7:0] 0x81 R/W 0x64 VAL_TH_OFF_CS8[7:0] 0x82 R/W 0xC8 VAL_TH_ON_CS9[7:0] 0x83 R/W 0x64 VAL_TH_OFF_CS9[7:0] 0x84 R/W 0xC8 VAL_TH_ON_CS10[7:0] 0x85 R/W 0x64 VAL_TH_OFF_CS10[7:0] 0x86 R/W 0xC8 VAL_TH_ON_CS11[7:0] 0x87 R/W 0x64 VAL_TH_OFF_CS11[7:0] 0x88 R/W 0xC8 VAL_TH_ON_CS12[7:0] VAL_TH_OFF_CS12[7:0] 0x89 R/W 0x64 0x8A R/W 0xC8 VAL_TH_ON_CS13[7:0] 0x8B R/W 0x64 VAL_TH_OFF_CS13[7:0] 0x8C R/W 0xC8 VAL_TH_ON_CS14[7:0] 0x8D R/W 0x64 VAL_TH_OFF_CS14[7:0] 0x8E R/W 0xC8 VAL_TH_ON_CS15[7:0] 0x8F R/W 0x64 VAL_TH_OFF_CS15[7:0] www.rohm.com © 2017 ROHM Co., Ltd. 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TSZ22111 • 15 • 001 Bit0 CS2_SCAN_SEL[1:0] 13/40 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS Register Map - continued Configuration Register Address R/W Initial 0x90 R/W 0xC8 Bit7 Bit6 Bit5 VAL_TH_ON_CS16[7:0] Bit4 Bit3 0x91 R/W 0x64 VAL_TH_OFF_CS16[7:0] 0x92 R/W 0xC8 VAL_TH_ON_CS17[7:0] 0x93 R/W 0x64 VAL_TH_OFF_CS17[7:0] 0x94 R/W 0xC8 VAL_TH_ON_CS18[7:0] 0x95 R/W 0x64 VAL_TH_OFF_CS18[7:0] 0x96 R/W 0xC8 VAL_TH_ON_CS19[7:0] 0x97 R/W 0x64 VAL_TH_OFF_CS19[7:0] 0x98 R/W 0x30 0x99 R/W 0x50 - 0x9A R/W 0x03 - - - - - 0x9B R/W 0x80 MLT_SW _EN - - CAL_SFT _EN LOWER _CAL_EN 0x9C R/W 0x03 - - - - 0x9D R/W 0x09 - - ADJ_DET_NUM[4:0] 0x9E R/W 0x89 - - NOISE_DET_NUM[4:0] VAL_ADJ_DAT[3:0] ADJ_ALL _EN NOISE _SFT_EN TIM_AFE[2:0] Bit2 Bit1 Bit0 - - - - - - - - FIL_CFG[2:0] UNK_CAL _EN ADJ_OFS _ENB OST[3:0] 0x9F R/W 0x3C TIME_PERCAL[7:0] 0xA0-0xA1 R/W 0x00 RESERVED 0xA2 R/W 0x00 TIME_UNKNOWN_A[7:0] 0xA3 R/W 0x00 TIME_UNKNOWN_B[7:0] 0xA4 R/W 0x00 TIME_HLD_A[7:0] 0xA5 R/W 0x00 TIME_HLD_RPT_A[7:0] 0xA6 R/W 0x00 TIME_HLD_B[7:0] 0xA7 R/W 0x00 TIME_HLD_RPT_B[7:0] 0xA8 R/W 0x00 TIME_HLD_C[7:0] 0xA9 R/W 0x00 TIME_HLD_RPT_C[7:0] 0xAA R/W 0x00 TIME_HLD_D[7:0] 0xAB R/W 0x00 TIME_HLD_RPT_D[7:0] 0xAC R/W 0x00 TIME_HLD_E[7:0] 0xAD R/W 0x00 TIME_HLD_RPT_E[7:0] 0xAE R/W 0x00 TIME_HLD_F[7:0] 0xAF R/W 0x00 TIME_HLD_RPT_F[7:0] 0xB0 R/W 0x00 TIME_HLD_G[7:0] 0xB1 R/W 0x00 TIME_HLD_RPT_G[7:0] 0xB2 R/W 0x00 UNK_CS1 HLD_CS1[2:0] UNK_CS0 HLD_CS0[2:0] 0xB3 R/W 0x00 UNK_CS3 HLD_CS3[2:0] UNK_CS2 HLD_CS2[2:0] 0xB4 R/W 0x00 UNK_CS5 HLD_CS5[2:0] UNK_CS4 HLD_CS4[2:0] 0xB5 R/W 0x00 UNK_CS7 HLD_CS7[2:0] UNK_CS6 HLD_CS6[2:0] 0xB6 R/W 0x00 UNK_CS9 HLD_CS9[2:0] UNK_CS8 HLD_CS8[2:0] 0xB7 R/W 0x00 UNK_CS11 HLD_CS11[2:0] UNK_CS10 HLD_CS10[2:0] 0xB8 R/W 0x00 UNK_CS13 HLD_CS13[2:0] UNK_CS12 HLD_CS12[2:0] 0xB9 R/W 0x00 UNK_CS15 HLD_CS15[2:0] UNK_CS14 HLD_CS14[2:0] 0xBA R/W 0x00 UNK_CS17 HLD_CS17[2:0] UNK_CS16 HLD_CS16[2:0] 0xBB R/W 0x00 UNK_CS19 HLD_CS19[2:0] UNK_CS18 HLD_CS18[2:0] www.rohm.com © 2017 ROHM Co., Ltd. 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TSZ22111 • 15 • 001 14/40 SCAN _SEL TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS Register Map - continued Configuration Register Address R/W Initial 0xBC R/W 0x00 0xBD R/W 0x00 0xBE R/W 0x00 0xBF R/W 0x00 0xC0 R/W 0x00 0xC1 R/W 0x00 0xC2 R/W 0x00 0xC3 R/W 0x00 0xC4 R/W 0x00 0xC5 R/W 0x00 0xC6 R/W 0x00 0xC7 R/W 0x00 0xC8 R/W 0x00 0xC9 R/W 0x00 0xCA R/W 0x00 0xCB R/W 0x00 0xCC R/W 0x00 0xCD R/W 0x00 0xCE R/W 0x00 0xCF R/W 0x00 0xD0 R/W 0x00 0xD1 R/W 0x00 Bit7 Bit6 Bit5 Bit4 MULT_A _CS7 MULT_A _CS15 MULT_A _CS6 MULT_A _CS14 MULT_A _CS5 MULT_A _CS13 MULT_A _CS4 MULT_A _CS12 - - - - MULT_B _CS7 MULT_B _CS15 MULT_B _CS6 MULT_B _CS14 MULT_B _CS5 MULT_B _CS13 MULT_B _CS4 MULT_B _CS12 - - - - MULT_C _CS7 MULT_C _CS15 MULT_C _CS6 MULT_C _CS14 MULT_C _CS5 MULT_C _CS13 MULT_C _CS4 MULT_C _CS12 - - - - MULT_D _CS7 MULT_D _CS15 MULT_D _CS6 MULT_D _CS14 MULT_D _CS5 MULT_D _CS13 MULT_D _CS4 MULT_D _CS12 - - - - MULT_E _CS7 MULT_E _CS15 MULT_E _CS6 MULT_E _CS14 MULT_E _CS5 MULT_E _CS13 MULT_E _CS4 MULT_E _CS12 - - - - MULT_F _CS7 MULT_F _CS15 MULT_F _CS6 MULT_F _CS14 MULT_F _CS5 MULT_F _CS13 MULT_F _CS4 MULT_F _CS12 - - - - MULT_G _CS7 MULT_G _CS15 MULT_G _CS6 MULT_G _CS14 MULT_G _CS5 MULT_G _CS13 MULT_G _CS4 MULT_G _CS12 - - - - MULT_H _CS7 MULT_H _CS15 MULT_H _CS6 MULT_H _CS14 MULT_H _CS5 MULT_H _CS13 MULT_H _CS4 MULT_H _CS12 0xD2 R/W 0x00 0xD3 R/W 0x00 0xD4 R/W 0x00 - - - - 0x00 MSK_INT _NOISE - - - 0xD5 0xD6 R/W R/W R/W 0x00 0xD8 R/W 0x00 0xD9 R/W 0x00 0xDA R/W 0x00 0xDB R/W 0x00 0xDC R/W 0x00 0xDD R/W 0x00 0xDE R/W 0x00 0xDF R/W 0x00 Bit2 Bit1 Bit0 MULT_A _CS3 MULT_A _CS11 MULT_A _CS19 MULT_B _CS3 MULT_B _CS11 MULT_B _CS19 MULT_C _CS3 MULT_C _CS11 MULT_C _CS19 MULT_D _CS3 MULT_D _CS11 MULT_D _CS19 MULT_E _CS3 MULT_E _CS11 MULT_E _CS19 MULT_F _CS3 MULT_F _CS11 MULT_F _CS19 MULT_G _CS3 MULT_G _CS11 MULT_G _CS19 MULT_H _CS3 MULT_H _CS11 MULT_H _CS19 MSK_INT _FALCAL MULT_A _CS2 MULT_A _CS10 MULT_A _CS18 MULT_B _CS2 MULT_B _CS10 MULT_B _CS18 MULT_C _CS2 MULT_C _CS10 MULT_C _CS18 MULT_D _CS2 MULT_D _CS10 MULT_D _CS18 MULT_E _CS2 MULT_E _CS10 MULT_E _CS18 MULT_F _CS2 MULT_F _CS10 MULT_F _CS18 MULT_G _CS2 MULT_G _CS10 MULT_G _CS18 MULT_H _CS2 MULT_H _CS10 MULT_H _CS18 MSK_INT _FINCAL MULT_A _CS1 MULT_A _CS9 MULT_A _CS17 MULT_B _CS1 MULT_B _CS9 MULT_B _CS17 MULT_C _CS1 MULT_C _CS9 MULT_C _CS17 MULT_D _CS1 MULT_D _CS9 MULT_D _CS17 MULT_E _CS1 MULT_E _CS9 MULT_E _CS17 MULT_F _CS1 MULT_F _CS9 MULT_F _CS17 MULT_G _CS1 MULT_G _CS9 MULT_G _CS17 MULT_H _CS1 MULT_H _CS9 MULT_H _CS17 MULT_A _CS0 MULT_A _CS8 MULT_A _CS16 MULT_B _CS0 MULT_B _CS8 MULT_B _CS16 MULT_C _CS0 MULT_C _CS8 MULT_C _CS16 MULT_D _CS0 MULT_D _CS8 MULT_D _CS16 MULT_E _CS0 MULT_E _CS8 MULT_E _CS16 MULT_F _CS0 MULT_F _CS8 MULT_F _CS16 MULT_G _CS0 MULT_G _CS8 MULT_G _CS16 MULT_H _CS0 MULT_H _CS8 MULT_H _CS16 - MSK_INT_ AVDDON MSK_DET _ON_CS0 MSK_DET _ON_CS8 - - - - - - MSK_DET _ON_CS7 MSK_DET _ON_CS15 MSK_DET _ON_CS6 MSK_DET _ON_CS14 MSK_DET _ON_CS5 MSK_DET _ON_CS13 MSK_DET _ON_CS4 MSK_DET _ON_CS12 MSK_DET _ON_CS3 MSK_DET _ON_CS11 MSK_DET _ON_CS2 MSK_DET _ON_CS10 MSK_INT_ AVDDOFF MSK_DET _ON_CS1 MSK_DET _ON_CS9 - - - - MSK_DET _OFF_CS7 MSK_DET _OFF_CS15 MSK_DET _OFF_CS6 MSK_DET _OFF_CS14 MSK_DET _OFF_CS5 MSK_DET _OFF_CS13 MSK_DET _OFF_CS4 MSK_DET _OFF_CS12 MSK_DET _ON_CS19 MSK_DET _OFF_CS3 MSK_DET _OFF_CS11 MSK_DET _OFF_CS19 MSK_DET _ON_CS18 MSK_DET _OFF_CS2 MSK_DET _OFF_CS10 MSK_DET _OFF_CS18 MSK_DET _ON_CS17 MSK_DET _OFF_CS1 MSK_DET _OFF_CS9 MSK_DET _OFF_CS17 MSK_DET _ON_CS16 MSK_DET _OFF_CS0 MSK_DET _OFF_CS8 MSK_DET _OFF_CS16 MSK_UNK _CS3 MSK_UNK _CS11 MSK_UNK _CS19 MSK_UNK _CS2 MSK_UNK _CS10 MSK_UNK _CS18 MSK_UNK _CS1 MSK_UNK _CS9 MSK_UNK _CS17 MSK_UNK _CS0 MSK_UNK _CS8 MSK_UNK _CS16 0x00 0xD7 Bit3 TIME_DET[7:0] - - - - MSK_UNK _CS7 MSK_UNK _CS15 MSK_UNK _CS6 MSK_UNK _CS14 MSK_UNK _CS5 MSK_UNK _CS13 MSK_UNK _CS4 MSK_UNK _CS12 - - - - www.rohm.com © 2017 ROHM Co., Ltd. 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TSZ22111 • 15 • 001 15/40 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS Register Map - continued Command Register Address R/W Initial Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 0xE0 R/W 0x00 CLR_INT _NOISE - - - CLR_INT _FALCAL CLR_INT _FINCAL - 0xE1 R/W 0x00 - - - - - - CLR_INT_ AVDDOFF CLR_INT _FININI CLR_INT_ AVDDON 0xE2 R/W 0x00 0xE3 R/W 0x00 CLR_DET _ON_CS7 CLR_DET _ON_CS15 CLR_DET _ON_CS6 CLR_DET _ON_CS14 CLR_DET _ON_CS5 CLR_DET _ON_CS13 CLR_DET _ON_CS4 CLR_DET _ON_CS12 0xE4 R/W 0x00 0xE5 R/W 0x00 0xE6 R/W 0x00 0xE7 R/W 0x00 CLR_DET _ON_CS3 CLR_DET _ON_CS11 CLR_DET _ON_CS19 CLR_DET _OFF_CS3 CLR_DET _OFF_CS11 CLR_DET _OFF_CS19 CLR_DET _ON_CS2 CLR_DET _ON_CS10 CLR_DET _ON_CS18 CLR_DET _OFF_CS2 CLR_DET _OFF_CS10 CLR_DET _OFF_CS18 CLR_DET _ON_CS1 CLR_DET _ON_CS9 CLR_DET _ON_CS17 CLR_DET _OFF_CS1 CLR_DET _OFF_CS9 CLR_DET _OFF_CS17 CLR_DET _ON_CS0 CLR_DET _ON_CS8 CLR_DET _ON_CS16 CLR_DET _OFF_CS0 CLR_DET _OFF_CS8 CLR_DET _OFF_CS16 CLR_HLD _CS3 CLR_HLD _CS11 CLR_HLD _CS19 CLR_HLD RPT_CS3 CLR_HLD RPT_CS11 CLR_HLD RPT_CS19 CLR_MULT _ON_D CLR_MULT _OFF_D CLR_UNK _CS3 CLR_UNK _CS11 CLR_UNK _CS19 CLR_HLD _CS2 CLR_HLD _CS10 CLR_HLD _CS18 CLR_HLD RPT_CS2 CLR_HLD RPT_CS10 CLR_HLD RPT_CS18 CLR_MULT _ON_C CLR_MULT _OFF_C CLR_UNK _CS2 CLR_UNK _CS10 CLR_UNK _CS18 CLR_HLD _CS1 CLR_HLD _CS9 CLR_HLD _CS17 CLR_HLD RPT_CS1 CLR_HLD RPT_CS9 CLR_HLD RPT_CS17 CLR_MULT _ON_B CLR_MULT _OFF_B CLR_UNK _CS1 CLR_UNK _CS9 CLR_UNK _CS17 CLR_HLD _CS0 CLR_HLD _CS8 CLR_HLD _CS16 CLR_HLD RPT_CS0 CLR_HLD RPT_CS8 CLR_HLD RPT_CS16 CLR_MULT _ON_A CLR_MULT _OFF_A CLR_UNK _CS0 CLR_UNK _CS8 CLR_UNK _CS16 0xE8 R/W 0x00 0xE9 R/W 0x00 0xEA R/W 0x00 0xEB R/W 0x00 0xEC R/W 0x00 0xED R/W 0x00 - - - - CLR_DET _OFF_CS7 CLR_DET _OFF_CS15 CLR_DET _OFF_CS6 CLR_DET _OFF_CS14 CLR_DET _OFF_CS5 CLR_DET _OFF_CS13 CLR_DET _OFF_CS4 CLR_DET _OFF_CS12 - - - - CLR_HLD _CS7 CLR_HLD _CS15 CLR_HLD _CS6 CLR_HLD _CS14 CLR_HLD _CS5 CLR_HLD _CS13 CLR_HLD _CS4 CLR_HLD _CS12 - - - - CLR_HLD RPT_CS7 CLR_HLD RPT_CS15 CLR_HLD RPT_CS6 CLR_HLD RPT_CS14 CLR_HLD RPT_CS5 CLR_HLD RPT_CS13 CLR_HLD RPT_CS4 CLR_HLD RPT_CS12 - - - - CLR_MULT _ON_H CLR_MULT _OFF_H CLR_UNK _CS7 CLR_UNK _CS15 CLR_MULT _ON_G CLR_MULT _OFF_G CLR_UNK _CS6 CLR_UNK _CS14 CLR_MULT _ON_F CLR_MULT _OFF_F CLR_UNK _CS5 CLR_UNK _CS13 CLR_MULT _ON_E CLR_MULT _OFF_E CLR_UNK _CS4 CLR_UNK _CS12 - - - - 0xEE R/W 0x00 0xEF R/W 0x00 0xF0 R/W 0x00 0xF1 R/W 0x00 0xF2 R/W 0x00 0xF3 R/W 0x00 SRST[7:0] 0xF4 R/W 0x00 SRST[15:8] Bit0 0xF5-0xFD - - 0xFE R/W 0x00 - - SEL_AVDD[1:0] - - - AVDD_ON 0xFF R/W 0x00 - - - - STR_CFG STR_CAL STR_AFE www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 RESERVED 16/40 - TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS Register Description Status Register Description 0x00-0x13: Sensor Data Name: DATA_CS Address: 0x00-0x13 Description: These registers show 8-bit sensor data of each sensor. These are compared with the register “Switch ON Threshold / Switch OFF Threshold”, and these results are set to the register “Switch ON Detection” and “Switch OFF Detection”. These 8-bit sensor data become 0 after calibration. Address R/W Initial 0x00 R 0x00 DATA_CS0[7:0] 0x01 R 0x00 DATA_CS1[7:0] 0x02 R 0x00 DATA_CS2[7:0] 0x03 R 0x00 DATA_CS3[7:0] 0x04 R 0x00 DATA_CS4[7:0] 0x05 R 0x00 DATA_CS5[7:0] 0x06 R 0x00 DATA_CS6[7:0] 0x07 R 0x00 DATA_CS7[7:0] 0x08 R 0x00 DATA_CS8[7:0] 0x09 R 0x00 DATA_CS9[7:0] 0x0A R 0x00 DATA_CS10[7:0] 0x0B R 0x00 DATA_CS11[7:0] 0x0C R 0x00 DATA_CS12[7:0] 0x0D R 0x00 DATA_CS13[7:0] 0x0E R 0x00 DATA_CS14[7:0] 0x0F R 0x00 DATA_CS15[7:0] 0x10 R 0x00 DATA_CS16[7:0] 0x11 R 0x00 DATA_CS17[7:0] 0x12 R 0x00 DATA_CS18[7:0] 0x13 R 0x00 DATA_CS19[7:0] www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 Bit7 Bit6 Bit5 17/40 Bit4 Bit3 Bit2 Bit1 Bit0 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS 0x15-0x3C: Filter Sensor Data Name: FILTER_DATA_CS Address: 0x15-0x3C Description: These registers show RAW sensor data of each sensor from 0 to 5000 after calibration. The values of the register “Sensor Data” are the processed values of the amount of change of these registers. The bit “INT_FALCAL” in the register “Interrupt Factor” is set to 1 and calibration is performed again when this register does not become within the range from 2186 to 2814 after calibration. The relationship between the register “Sensor Data” and the register “Filter Sensor Data” is as follows. The associated registers are the register “Sensitivity” and the register “Digital Gain”. The register “Sensor Data” = [(The register “Filter Sensor Data” - 2500) - (315  The register “Sensitivity”)]  (The register “Digital Gain” + 1) Address R/W Initial 0x15 R 0x00 FDATA_CS0[15:8] 0x16 R 0x00 FDATA_CS0[7:0] 0x17 R 0x00 FDATA_CS1[15:8] 0x18 R 0x00 FDATA_CS1[7:0] 0x19 R 0x00 FDATA_CS2[15:8] 0x1A R 0x00 FDATA_CS2[7:0] 0x1B R 0x00 FDATA_CS3[15:8] 0x1C R 0x00 FDATA_CS3[7:0] 0x1D R 0x00 FDATA_CS4[15:8] 0x1E R 0x00 FDATA_CS4[7:0] 0x1F R 0x00 FDATA_CS5[15:8] 0x20 R 0x00 FDATA_CS5[7:0] 0x21 R 0x00 FDATA_CS6[15:8] 0x22 R 0x00 FDATA_CS6[7:0] 0x23 R 0x00 FDATA_CS7[15:8] 0x24 R 0x00 FDATA_CS7[7:0] 0x25 R 0x00 FDATA_CS8[15:8] 0x26 R 0x00 FDATA_CS8[7:0] 0x27 R 0x00 FDATA_CS9[15:8] 0x28 R 0x00 FDATA_CS9[7:0] 0x29 R 0x00 FDATA_CS10[15:8] 0x2A R 0x00 FDATA_CS10[7:0] 0x2B R 0x00 FDATA_CS11[15:8] 0x2C R 0x00 FDATA_CS11[7:0] 0x2D R 0x00 FDATA_CS12[15:8] 0x2E R 0x00 FDATA_CS12[7:0] 0x2F R 0x00 FDATA_CS13[15:8] 0x30 R 0x00 FDATA_CS13[7:0] 0x31 R 0x00 FDATA_CS14[15:8] 0x32 R 0x00 FDATA_CS14[7:0] 0x33 R 0x00 FDATA_CS15[15:8] 0x34 R 0x00 FDATA_CS15[7:0] 0x35 R 0x00 FDATA_CS16[15:8] 0x36 R 0x00 FDATA_CS16[7:0] 0x37 R 0x00 FDATA_CS17[15:8] 0x38 R 0x00 FDATA_CS17[7:0] 0x39 R 0x00 FDATA_CS18[15:8] 0x3A R 0x00 FDATA_CS18[7:0] 0x3B R 0x00 FDATA_CS19[15:8] 0x3C R 0x00 FDATA_CS19[7:0] www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 Bit7 Bit6 Bit5 18/40 Bit4 Bit3 Bit2 Bit1 Bit0 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS 0x40-0x42: Interrupt Factor Name: INTERRUPT Address: 0x40-0x42 Description: These registers show the interrupt factor. The INTB pin outputs low level when the logical disjunction (hereinafter, referred to as “OR”) of the register address 0x40-0x42 becomes to 1, and outputs HIZ when the result becomes 0. In the case the bit "MLT_SW_EN" in the register "Control Mode" is set to 0, while the OR of the register address 0x41 is 1, the other switch operations are not detected. After the OR becomes 0, the next switch operation is detectable. 0: Interrupt is undetected 1: Interrupt is detected INT_FININI : Initialization Completion Interrupt When the initialization of MPU is completed, this bit is set to 1. This bit is cleared by setting 0 to the bit “CLR_INT_FININI” in the register “Clear Interrupt Factor”. INT_FINCAL : Software Calibration Completion Interrupt When software calibration is completed, this bit is set to 1. This bit is cleared by setting 0 to the bit “CLR_INT_FINCAL” in the register “Clear Interrupt Factor”. INT_FALCAL : Calibration Failure Interrupt When software calibration is failed, this bit is set to 1. This bit is cleared by setting 0 to the bit “CLR_INT_FALCAL” in the register “Clear Interrupt Factor”. INT_UNK : Unexpected Long Press Detection Interrupt When unexpected long press is detected, this bit is set to 1. The bit is set to 1 when the OR of the register “Unexpected Long Press Detection” is 1. This bit is cleared by setting 0 to the register “Clear Unexpected Long Press Detection”. INT_NOISE : Noise Detection Interrupt When the sensors detect the noise, this bit is set to 1. This bit is cleared by setting 0 to the bit “CLR_INT_NOISE” in the register “Clear Interrupt Factor”. INT_SW_ON : Switch ON Detection Interrupt When the OR of the register “Switch ON Detection” is 1, this bit is set to 1. This bit is cleared by setting 0 to the register “Clear Switch ON Detection”. INT_SW_OFF : Switch OFF Detection Interrupt When the OR of the register “Switch OFF Detection” is 1, this bit is set to 1. This bit is cleared by setting 0 to the register “Clear Switch OFF Detection”. INT_HLD : Switch Long Press Detection Interrupt When the OR of the register “Switch Long Press Detection” is 1, this bit is set to 1. This bit is cleared by setting 0 to the register “Clear Switch Long Press Detection”. INT_HLDRPT : Switch Repeated Long Press Detection Interrupt When the OR of the register “Switch Repeated Long Press Detection” is 1, this bit is set to 1. This bit is cleared by setting 0 to the register “Clear Switch Repeated Long Press Detection”. INT_MULT_ON : Multiple Pattern Switches ON Detection Interrupt When the OR of the register “Multiple Pattern Switches ON Detection” is 1, this bit is set to 1. This bit is cleared by setting 0 to the register “Clear Multiple Pattern Switches ON Detection”. INT_MULT_OFF: Multiple Pattern Switches OFF Detection Interrupt When the OR of the register “Multiple Pattern Switches OFF Detection” is 1, this bit is set to 1. This bit is cleared by setting 0 to the register “Clear Multiple Pattern Switches OFF Detection”. INT_AVDDON : AVDD ON Detection Interrupt When AVDD voltage outputs, this bit is set to 1. This bit is cleared by setting 0 to the bit “CLR_INT_AVDDON” in the register “Clear Interrupt Factor”. This function is not for failure diagnosis of AVDD. INT_AVDDOFF : AVDD OFF Detection Interrupt When AVDD voltage does not output, this bit is set to 1. This bit is cleared by setting 0 to the bit “CLR_INT_AVDDOFF” in the register “Clear Interrupt Factor”. This function is not for failure diagnosis of AVDD. Address R/W Initial Bit7 Bit6 Bit5 Bit4 0x40 R 0x01 INT_ NOISE INT_UNK - - 0x41 R 0x00 - - INT_MULT _OFF 0x42 R 0x00 - - - www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 19/40 Bit3 Bit2 Bit1 INT_ FINCAL - INT_MULT _ON INT_ FALCAL INT_ HLDRPT - - INT_HLD - INT_ SW_OFF INT_ AVDDOFF Bit0 INT_ FININI INT_ SW_ON INT_ AVDDON TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS 0x43-0x45: Switch ON Detection Name: DET_ON Address: 0x43-0x45 Description: These registers show the state of each switch changed from OFF to ON. The bit “INT_SW_ON” in the register “Interrupt Factor” shows the OR of these registers. These are cleared by setting 0 to the register “Clear Switch ON Detection”. 0: ON-undetected Address R/W Initial 0x43 R 0x00 0x44 R 0x00 0x45 R 0x00 1: ON-detected Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 DET_ON _CS7 DET_ON _CS15 DET_ON _CS6 DET_ON _CS14 DET_ON _CS5 DET_ON _CS13 DET_ON _CS4 DET_ON _CS12 - - - - DET_ON _CS3 DET_ON _CS11 DET_ON _CS19 DET_ON _CS2 DET_ON _CS10 DET_ON _CS18 DET_ON _CS1 DET_ON _CS9 DET_ON _CS17 DET_ON _CS0 DET_ON _CS8 DET_ON _CS16 0x46-0x48: Switch OFF Detection Name: DET_OFF Address: 0x46-0x48 Description: These registers show the state of each switch changed from ON to OFF. The bit “INT_SW_OFF” in the register Interrupt Factor shows the OR of these registers. These are cleared by setting 0 to the register “Clear Switch OFF Detection”. 0: OFF-undetected Address R/W Initial 0x46 R 0x00 0x47 R 0x00 0x48 R 0x00 1: OFF-detected Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 DET_OFF _CS7 DET_OFF _CS15 DET_OFF _CS6 DET_OFF _CS14 DET_OFF _CS5 DET_OFF _CS13 DET_OFF _CS4 DET_OFF _CS12 - - - - DET_OFF _CS3 DET_OFF _CS11 DET_OFF _CS19 DET_OFF _CS2 DET_OFF _CS10 DET_OFF _CS18 DET_OFF _CS1 DET_OFF _CS9 DET_OFF _CS17 DET_OFF _CS0 DET_OFF _CS8 DET_OFF _CS16 0x49-0x4B: Switch Long Press Detection Name: DET_HLD Address: 0x49-0x4B Description: These registers show that long press was detected. The bit “INT_HLD” in the register “Interrupt Factor” shows the OR of these registers. These are cleared by setting 0 to the register “Clear Switch Long Press Detection”. The long press detect duration is able to be set up to 7 types from A to G. The durations are set by the register “Long Press Detection Time / Repeated Long Press Detection Time”. And the duration types are assigned to each sensor by the register “Long Press Detection Assignment / Unexpected Long Press Detection Assignment”. 0: Long Press - undetected Address R/W Initial 0x49 R 0x00 0x4A R 0x00 0x4B R 0x00 1: Long Press - detected Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 DET_HLD _CS7 DET_HLD _CS15 DET_HLD _CS6 DET_HLD _CS14 DET_HLD _CS5 DET_HLD _CS13 DET_HLD _CS4 DET_HLD _CS12 - - - - DET_HLD _CS3 DET_HLD _CS11 DET_HLD _CS19 DET_HLD _CS2 DET_HLD _CS10 DET_HLD _CS18 DET_HLD _CS1 DET_HLD _CS9 DET_HLD _CS17 DET_HLD _CS0 DET_HLD _CS8 DET_HLD _CS16 0x4C-0x4E: Switch Repeated Long Press Detection Name: DET_HLDRPT Address: 0x4C-0x4E Description: These registers show that repeated long press was detected. The bit “INT_HLD_RPT” in the register “Interrupt Factor” shows the OR of these registers. These are cleared by setting 0 to the register “Clear Switch Repeated Long Press Detection”. The repeated long press detect duration is able to be set up to 7 types from A to G. The durations are set by the register “Long Press Detection Time / Repeated Long Press Detection Time”. And the duration types are assigned to each sensor by the register “Long Press Detection Assignment / Unexpected Long Press Detection Assignment”. 0: Repeated Long Press - undetected Address R/W Initial 0x4C R 0x00 0x4D R 0x00 0x4E R 0x00 1: Repeated Long Press - detected Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 DET_HLD RPT_CS7 DET_HLD RPT_CS15 DET_HLD RPT_CS6 DET_HLD RPT_CS14 DET_HLD RPT _CS5 DET_HLD RPT_CS13 DET_HLD RPT_CS4 DET_HLD RPT_CS12 - - - - DET_HLD RPT_CS3 DET_HLD RPT_CS11 DET_HLD RPT_CS19 DET_HLD RPT_CS2 DET_HLD RPT_CS10 DET_HLD RPT_CS18 DET_HLD RPT_CS1 DET_HLD RPT_CS9 DET_HLD RPT_CS17 DET_HLD RPT_CS0 DET_HLD RPT_CS8 DET_HLD RPT_CS16 www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 20/40 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS 0x4F: Multiple Pattern Switches ON Detection Name: DET_MULT_ON Address: 0x4F Description: This register shows that the state of multiple pattern switches changed from OFF to ON simultaneously within the fixed time. The bit “INT_MULT_ON” in the register “Interrupt Factor” shows the OR of this register. This is cleared by setting 0 to the register “Clear Multiple Pattern Switches ON Detection”. The fixed time is set by the register “Switch Detection Time”. The multiple pattern switch combinations are set by the register “Multiple Pattern Switches Assignment”. 0: Multiple Pattern Switches ON - undetected 1: Multiple Pattern Switches ON - detected Address R/W Initial Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 0x4F R 0x00 DET_MULT _ON_H DET_MULT _ON_G DET_MULT _ON_F DET_MULT _ON_E DET_MULT _ON_D DET_MULT _ON_C DET_MULT _ON_B DET_MULT _ON_A 0x50: Multiple Pattern Switches OFF Detection Name: DET_MULT_OFF Address: 0x50 Description: This register shows that that the state of multiple pattern switches changed from ON to OFF simultaneously. The bit “INT_MULT_OFF” in the register “Interrupt Factor” shows the OR of this register. This is cleared by setting 0 to the register “Clear Multiple Pattern Switches OFF Detection”. 0: Multiple Pattern Switches OFF - undetected 1: Multiple Pattern Switches OFF - detected Address R/W Initial Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 0x50 R 0x00 DET_MULT _OFF_H DET_MULT _OFF_G DET_MULT _OFF_F DET_MULT _OFF_E DET_MULT _OFF_D DET_MULT _OFF_C DET_MULT _OFF_B DET_MULT _OFF_A 0x51-0x53: Unexpected Long Press Detection Name: DET_UNKNOWN Address: 0x51-0x53 Description: These registers show that unexpected long press was detected. The bit “INT_UNK” in the register “Interrupt Factor” shows the OR of these registers. These are cleared by setting 0 to the register “Clear Unexpected Long Press Detection”. The unexpected long press duration is set by the register “Unexpected Long Press Detection Time”. 0: Unexpected Long Press - undetected Address R/W Initial 0x51 R 0x00 0x52 R 0x00 0x53 R 0x00 1: Unexpected Long Press - detected Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 DET_UNK _CS7 DET_UNK _CS15 DET_UNK _CS6 DET_UNK _CS14 DET_UNK _CS5 DET_UNK _CS13 DET_UNK _CS4 DET_UNK _CS12 - - - - DET_UNK _CS3 DET_UNK _CS11 DET_UNK _CS19 DET_UNK _CS2 DET_UNK _CS10 DET_UNK _CS18 DET_UNK _CS1 DET_UNK _CS9 DET_UNK _CS17 DET_UNK _CS0 DET_UNK _CS8 DET_UNK _CS16 0x54-0x56: Switch ON / OFF State Name: SW_STATE Address: 0x54-0x56 Description: These registers show ON / OFF state of switch. These states are the result filtered by the register “Oversampling”. 0: OFF state Address R/W Initial 0x54 R 0x00 0x55 R 0x00 0x56 R 0x00 www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 1: ON state Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 SW_STAT _CS7 SW_STAT _CS15 SW_STAT _CS6 SW_STAT _CS14 SW_STAT _CS5 SW_STAT _CS13 SW_STAT _CS4 SW_STAT _CS12 - - - - SW_STAT _CS3 SW_STAT _CS11 SW_STAT _CS19 SW_STAT _CS2 SW_STAT _CS10 SW_STAT _CS18 SW_STAT _CS1 SW_STAT _CS9 SW_STAT _CS17 SW_STAT _CS0 SW_STAT _CS8 SW_STAT _CS16 21/40 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS 0x57: State of IC Name: RUN_STATE Address: 0x57 Description: This register shows the state of IC. RUN_AFE: This bit shows the state of sensor. 0: Under suspension 1: Under detection RUN_CAL: This bit shows the state of calibration. 0: Under no-calibration 1: Under calibration Address R/W Initial Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 0x57 R 0x00 - - - - - RUN_CAL RUN_AFE - 0x58: Calibration Failure Number of Times Name: NUM_FALCAL Address: 0x58 Description: This register shows the number of times of calibration failure. It is incremented every time calibration fails. When it reaches 255, the next will be 0. Address R/W Initial 0x58 R 0x00 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Bit2 Bit1 Bit0 NUM_FALCAL[7:0] 0x5F: Firmware Version Name: FW_VER Address: 0x5F Description: This register shows the firmware version. Address R/W Initial 0x5F R 0x09 www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 Bit7 Bit6 Bit5 Bit4 Bit3 FW_VER[7:0] 22/40 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS Configuration Register Description 0x60-0x64: Sensor Function Name: SW_EN_CFG Address: 0x60-0x64 Description: These registers configure the function of CS pins. CS*_SCAN_SEL[1:0] = 0x0: The CS pin becomes a capacitive sensor pin. CS*_SCAN_SEL[1:0] = 0x1: The CS pin outputs low level. CS*_SCAN_SEL[1:0] = 0x2: The CS pin outputs high level. CS*_SCAN_SEL[1:0] = 0x3: The CS pin becomes the high impedance. * represent the sensor number from 0 to 19. Address R/W Initial 0x60 R/W 0x00 CS3_SCAN_SEL[1:0] Bit7 Bit6 CS2_SCAN_SEL[1:0] Bit5 Bit4 CS1_SCAN_SEL[1:0] Bit3 Bit2 CS0_SCAN_SEL[1:0] Bit1 Bit0 0x61 R/W 0x00 CS7_SCAN_SEL[1:0] CS6_SCAN_SEL[1:0] CS5_SCAN_SEL[1:0] CS4_SCAN_SEL[1:0] 0x62 R/W 0x50 CS11_SCAN_SEL[1:0] CS10_SCAN_SEL[1:0] CS9_SCAN_SEL[1:0] CS8_SCAN_SEL[1:0] 0x63 R/W 0x55 CS15_SCAN_SEL[1:0] CS14_SCAN_SEL[1:0] CS13_SCAN_SEL[1:0] CS12_SCAN_SEL[1:0] 0x64 R/W 0x55 CS19_SCAN_SEL[1:0] CS18_SCAN_SEL[1:0] CS17_SCAN_SEL[1:0] CS16_SCAN_SEL[1:0] 0x66-0x6F: Sensitivity Name: VAL_GA_CFG Address: 0x66-0x6F Description: These registers configure the sensor sensitivity. The sensitivity adjustment is 15 steps. The smaller the setting value is, the higher the sensor sensitivity is. The sensor which has the unallowable setting value is disabled. Allowable setting range: 0x1 (high sensitivity) ≤ VAL_GA_CS* ≤ 0xF (low sensitivity) * represent the sensor number from 0 to 19. Address R/W Initial 0x66 R/W 0x7F VAL_GA_CS1[3:0] VAL_GA_CS0[3:0] 0x67 R/W 0x77 VAL_GA_CS3[3:0] VAL_GA_CS2[3:0] 0x68 R/W 0x77 VAL_GA_CS5[3:0] VAL_GA_CS4[3:0] 0x69 R/W 0x77 VAL_GA_CS7[3:0] VAL_GA_CS6[3:0] 0x6A R/W 0x77 VAL_GA_CS9[3:0] VAL_GA_CS8[3:0] 0x6B R/W 0xFF VAL_GA_CS11[3:0] VAL_GA_CS10[3:0] 0x6C R/W 0xFF VAL_GA_CS13[3:0] VAL_GA_CS12[3:0] 0x6D R/W 0xFF VAL_GA_CS15[3:0] VAL_GA_CS14[3:0] 0x6E R/W 0xFF VAL_GA_CS17[3:0] VAL_GA_CS16[3:0] 0x6F R/W 0xFF VAL_GA_CS19[3:0] VAL_GA_CS18[3:0] www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 Bit7 Bit6 Bit5 23/40 Bit4 Bit3 Bit2 Bit1 Bit0 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS 0x70-0x97: Switch ON Threshold / Switch OFF Threshold Name: VAL_TH_ON_CFG / VAL_TH_OFF_CFG Address: 0x70-0x97 Description: These registers configure the threshold to judge the state of switch. The register “Sensor Data” is compared with these registers. The state of switch is ON when the register “Sensor Data” is larger than VAL_TH_ON_CS*. And the state of switch is OFF when the register “Sensor Data” is smaller than VAL_TH_OFF_CS*. The sensor which has the unallowable setting value is disabled. Allowable setting value range: 0x03 < VAL_TH_OFF_CS* < VAL_TH_ON_CS* < 0xFF * represent the sensor number from 0 to 19. Address R/W Initial 0x70 R/W 0xC8 VAL_TH_ON_CS0[7:0] 0x71 R/W 0x64 VAL_TH_OFF_CS0[7:0] 0x72 R/W 0xC8 VAL_TH_ON_CS1[7:0] 0x73 R/W 0x64 VAL_TH_OFF_CS1[7:0] 0x74 R/W 0xC8 VAL_TH_ON_CS2[7:0] 0x75 R/W 0x64 VAL_TH_OFF_CS2[7:0] 0x76 R/W 0xC8 VAL_TH_ON_CS3[7:0] 0x77 R/W 0x64 VAL_TH_OFF_CS3[7:0] 0x78 R/W 0xC8 VAL_TH_ON_CS4[7:0] 0x79 R/W 0x64 VAL_TH_OFF_CS4[7:0] 0x7A R/W 0xC8 VAL_TH_ON_CS5[7:0] 0x7B R/W 0x64 VAL_TH_OFF_CS5[7:0] 0x7C R/W 0xC8 VAL_TH_ON_CS6[7:0] 0x7D R/W 0x64 VAL_TH_OFF_CS6[7:0] 0x7E R/W 0xC8 VAL_TH_ON_CS7[7:0] 0x7F R/W 0x64 VAL_TH_OFF_CS7[7:0] 0x80 R/W 0xC8 VAL_TH_ON_CS8[7:0] 0x81 R/W 0x64 VAL_TH_OFF_CS8[7:0] 0x82 R/W 0xC8 VAL_TH_ON_CS9[7:0] 0x83 R/W 0x64 VAL_TH_OFF_CS9[7:0] 0x84 R/W 0xC8 VAL_TH_ON_CS10[7:0] 0x85 R/W 0x64 VAL_TH_OFF_CS10[7:0] 0x86 R/W 0xC8 VAL_TH_ON_CS11[7:0] 0x87 R/W 0x64 VAL_TH_OFF_CS11[7:0] 0x88 R/W 0xC8 VAL_TH_ON_CS12[7:0] 0x89 R/W 0x64 VAL_TH_OFF_CS12[7:0] 0x8A R/W 0xC8 VAL_TH_ON_CS13[7:0] 0x8B R/W 0x64 VAL_TH_OFF_CS13[7:0] 0x8C R/W 0xC8 VAL_TH_ON_CS14[7:0] 0x8D R/W 0x64 VAL_TH_OFF_CS14[7:0] 0x8E R/W 0xC8 VAL_TH_ON_CS15[7:0] 0x8F R/W 0x64 VAL_TH_OFF_CS15[7:0] 0x90 R/W 0xC8 VAL_TH_ON_CS16[7:0] 0x91 R/W 0x64 VAL_TH_OFF_CS16[7:0] 0x92 R/W 0xC8 VAL_TH_ON_CS17[7:0] 0x93 R/W 0x64 VAL_TH_OFF_CS17[7:0] 0x94 R/W 0xC8 VAL_TH_ON_CS18[7:0] 0x95 R/W 0x64 VAL_TH_OFF_CS18[7:0] 0x96 R/W 0xC8 VAL_TH_ON_CS19[7:0] 0x97 R/W 0x64 VAL_TH_OFF_CS19[7:0] www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 Bit7 Bit6 Bit5 24/40 Bit4 Bit3 Bit2 Bit1 Bit0 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS 0x98: Digital Gain Name: GA_DIGI_CFG Address: 0x98 Description: This register configures low sensitivity. This is used to set lower sensitivity than the setting value of the register “Sensitivity”. The register “Sensor Data” = [(The register “Filter Sensor Data” - 2500) - (315  The register “Sensitivity”)]  (The register “Digital Gain” + 1) Address R/W Initial 0x98 R/W 0x30 Bit7 Bit6 Bit5 Bit4 VAL_ADJ_DAT[3:0] Bit3 Bit2 Bit1 Bit0 - - - - 0x99: Sampling Frequency Name: SENS_CFG Address: 0x99 Description: This register configures the sampling frequency. TIM_AFE[2:0]: The Setting of Sampling Frequency The detect duration per one sensor is like below. TIM_AFE[2:0]=0x0 : Sampling frequency=1563kHz TIM_AFE[2:0]=0x1 : Sampling frequency=1024kHz TIM_AFE[2:0]=0x2 : Sampling frequency=781kHz TIM_AFE[2:0]=0x3 : Sampling frequency=391kHz TIM_AFE[2:0]=0x4 : Sampling frequency=298kHz TIM_AFE[2:0]=0x5 : Sampling frequency=195kHz TIM_AFE[2:0]=0x6 : Sampling frequency=156kHz TIM_AFE[2:0]=0x7 : Sampling frequency=130kHz Address R/W Initial Bit7 0x99 R/W 0x50 - 0x9A: Filter Tap Name: Address: Description: Bit6 Bit5 Detection duration per one sensor=0.2054ms Detection duration per one sensor=0.3082ms Detection duration per one sensor=0.4109ms Detection duration per one sensor=0.8218ms Detection duration per one sensor=1.0786ms Detection duration per one sensor=1.6435ms Detection duration per one sensor=2.0544ms Detection duration per one sensor=2.4653ms Bit4 TIM_AFE[2:0] Bit3 Bit2 Bit1 Bit0 - - - - FIL_CFG 0x9A This register configures the filter for the register “Sensor Data”. This configures the median filter tap and the kinds of sampling frequency. The sampling frequencies are modulated from the base frequency set by the register “Sampling Frequency”. FIL_CFG[2:0]=0x0 : 1 kind (base frequency) of sampling frequency is used. Median filter tap length=1 3 kinds(+6%, ±0%, -6%) of sampling frequency is used. Median filter tap length=3 5 kinds(+6%, +3%, ±0%, -3%, -6%) of sampling frequency is used. Median filter tap length=5 7 kinds(+6%, +4%, +2%, ±0%, -2%, -4%, -6%) of sampling frequency is used. Median filter tap length=7 7 kinds(+6%, +4%, +2%, ±0%, -2%, -4%, -6%) of sampling frequency is used. Median filter tap length=9 7 kinds(+6%, +4%, +2%, ±0%, -2%, -4%, -6%) of sampling frequency is used. Median filter tap length=11 7 kinds(+6%, +4%, +2%, ±0%, -2%, -4%, -6%) of sampling frequency is used. Median filter tap length=13 7 kinds(+6%, +4%, +2%, ±0%, -2%, -4%, -6%) of sampling frequency is used. Median filter tap length=15 FIL_CFG[2:0]=0x1 : FIL_CFG[2:0]=0x2 : FIL_CFG[2:0]=0x3 : FIL_CFG[2:0]=0x4 : FIL_CFG[2:0]=0x5 : FIL_CFG[2:0]=0x6 : FIL_CFG[2:0]=0x7 : Address R/W Initial Bit7 Bit6 Bit5 Bit4 Bit3 0x9A R/W 0x03 - - - - - www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 25/40 Bit2 Bit1 Bit0 FIL_CFG[2:0] TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS 0x9B: Control Mode Name: MODE_CFG Address: 0x9B Description: This register configures the functions for calibration and sensor. SCAN_SEL: Sensor High Impedance This bit configures the states of enabled sensors during the other sensor is sensing. 0: Sensor outputs low. 1: Sensor becomes high impedance. ADJ_OFS_ENB: Offset Calibration This bit configures whether the offset calibration to the register “Filter Sensor Data” is performed or not. 0: Offset calibration is enabled. 1: Offset calibration is disabled. The limitation about offset calibration 1. 2. 3. The register “Switch ON Threshold” setting value is 0x50 or over. The register “Periodical Calibration” settings is disabled, or the register “Filter Tap” setting value is 0x06 or over when the register “Periodical Calibration” is enabled. The completion without calibration failures is needed to confirm the register “Calibration Failure Number of Times” before and after the software calibration completion is complete. Calibration must to be performed again when calibration failures. UNK_CAL_EN: Unexpected Long Press Calibration This bit configures whether automatic calibration is performed when unexpected long press is detected. This calibration is effective only to the unexpected long press switches. 0: Unexpected Long Press Calibration is disabled. 1: Unexpected Long Press Calibration is enabled. LOWER_CAL_EN: Lower Calibration This bit configures whether automatic calibration is performed when the data of the register “Filter Sensor Data” is smaller than the reference value. When the offset calibration is enabled, this calibration is disabled. 0: Lower Calibration is disabled. 1: Lower Calibration is enabled. CAL_SFT_EN: Sampling Frequency Modulation This bit configures whether frequency modulation is performed when calibration fails. 0: Frequency modulation is disabled. 1: Frequency modulation is enabled. MLT_SW_EN: Multiple Switches Control This bit configures whether multiple switches are usable at the same time. In the case multiple switches are usable, the register “Switch Detection Time” and “Multiple Pattern Switches Assignment” are disabled. 0: Multiple switches are unusable. Address 0x9B R/W R/W Initial Bit7 0x80 MLT_SW _EN Bit6 - 1: Multiple switches are usable. Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 - CAL_SFT _EN LOWER _CAL_EN UNK_CAL _EN ADJ_OFS _ENB SCAN_SEL 0x9C: Oversampling Name: OST_CFG Address: 0x9C Description: This register configures the number of oversampling to reject chattering. The result is reflected to the register “Switch ON Detection” and “Switch OFF Detection” when ON / OFF judgment is same as “OST[3:0]+1” times. Address R/W Initial Bit7 Bit6 Bit5 Bit4 0x9C R/W 0x03 - - - - www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 26/40 Bit3 Bit2 Bit1 Bit0 OST[3:0] TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS 0x9D: Drift Calibration Name: DRIFT_CAL_CFG Address: 0x9D Description: This register configures the calibration to be performed at detecting the drift state. ADJ_DET_NUM[4:0]: Drift Calibration Condition When the register “Sensor Data” is larger than a quarter value of the register “Switch ON Threshold” or a value of the register “Switch OFF Threshold”, the sensor is recognized as the drift state sensor. When the number of the drift state sensors is larger than ADJ_DET_NUM[4:0], drift state is detected and calibration is performed. ADJ_ALL_EN: Drift Calibration Selection In the case this bit is set to 0, the drift calibration is performed except the sensor with switch ON state. In the case this bit is set to 1, the drift calibration is performed for all sensors regardless of switch ON / OFF state. 0: The drift calibration is performed except the sensors with switch ON state. 1: The drift calibration is performed for all sensors regardless of switch ON / OFF state. Address 0x9D R/W R/W Initial Bit7 Bit6 Bit5 0x09 ADJ_ALL _EN - - Bit4 Bit3 Bit2 Bit1 Bit0 ADJ_DET_NUM[4:0] 0x9E: Noise Calibration Name: NOISE_CAL_CFG Address: 0x9E Description: This register configures the calibration to be performed at detecting the noise state. NOISE_DET_NUM[4:0]: Noise Calibration Condition When the plural sensors are simultaneously the switch ON state, the sensors are recognized as the noise state sensor. When the number of the noise state sensors is larger than ADJ_DET_NUM[4:0], noise state is detected and calibration is performed. NOISE_SFT_EN: Noise Shift Configuration The noise calibration is performed without the shift of sampling frequency in the case this bit is set to 0. The calibration is performed after shifting sampling frequency in the case this bit is set to 1. 0: Only noise calibration is performed. 1: The noise calibration is performed after shifting sampling frequency. Address R/W Initial Bit7 Bit6 Bit5 0x9E R/W 0x89 NOISE _SFT_EN - - Bit4 Bit3 Bit2 Bit1 Bit0 NOISE_DET_NUM[4:0] 0x9F: Periodical Calibration Name: TIME_PERCAL_CFG Address: 0x9F Description: This register configures the interval time of the periodical calibration. In the case this register is set to 0, the periodical calibration is not performed. The periodical calibration is performed for the sensors whose the register “Sensor Data” is not larger than the register “Switch ON Threshold”. Interval time of the periodical calibration = TIME_PERCAL[7:0] x Approximately 5s Address R/W Initial 0x9F R/W 0x3C www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 TIME_PERCAL[7:0] 27/40 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS 0xA2-0xA3: Unexpected Long Press Detection Time Name: TIME_UNKNOWN_CFG Address: 0xA2-0xA3 Description: These registers configure the time until detecting unexpected long press. The data 1 is set to the register “Unexpected Long Press Detection” when unexpected long press is detected. Until unexpected long press is avoided, the unexpected long press is repeatedly detected each configured time. The time until detecting unexpected long press = TIME_UNKNOWN_*[7:0] x Approximately 1s In the case TIME_ UNKNOWN_*[7:0] is set to 0, unexpected long press are not detected. * represent the setting number A and B. Address R/W Initial Bit7 Bit6 Bit5 Bit4 Bit3 0xA2 R/W 0x00 TIME_UNKNOWN_A[7:0] 0xA3 R/W 0x00 TIME_UNKNOWN_B[7:0] Bit2 Bit1 Bit0 0xA4-0xB1: Long Press Detection Time / Repeated Long Press Detection Time Name: TIME_HLD_CFG Address: 0xA4-0xB1 Description: Pressing the switch for a fixed time is referred to as “long press”. After first long press is detected, subsequent long pressing is referred to as “repeated long press”. These registers configure the time until detecting long press and repeated long press. The data 1 is set to the register “Switch Long Press Detection” when long press is detected. And the data 1 is set to the register “Switch Repeated Long Press Detection” when repeated long press is detected. The time until detecting long press = TIME_HLD_*[7:0] x Approximately 0.1s In the case TIME_HLD_*[7:0] is set to 0, long press are not detected. The time until detecting repeated long press = TIME_HLD_RPT_*[7:0] x Approximately 0.1s In the case TIME_HLD_RPT_*[7:0] is set to 0, repeated long press is not detected. * represent the setting number from A to G. Address R/W Initial Bit7 Bit6 Bit5 Bit4 Bit3 0xA4 R/W 0x00 TIME_HLD_A[7:0] 0xA5 R/W 0x00 TIME_HLD_RPT_A[7:0] 0xA6 R/W 0x00 TIME_HLD_B[7:0] 0xA7 R/W 0x00 TIME_HLD_RPT_B[7:0] 0xA8 R/W 0x00 TIME_HLD_C[7:0] 0xA9 R/W 0x00 TIME_HLD_RPT_C[7:0] 0xAA R/W 0x00 TIME_HLD_D[7:0] TIME_HLD_RPT_D[7:0] 0xAB R/W 0x00 0xAC R/W 0x00 TIME_HLD_E[7:0] 0xAD R/W 0x00 TIME_HLD_RPT_E[7:0] 0xAE R/W 0x00 TIME_HLD_F[7:0] 0xAF R/W 0x00 TIME_HLD_RPT_F[7:0] 0xB0 R/W 0x00 TIME_HLD_G[7:0] 0xB1 R/W 0x00 TIME_HLD_RPT_G[7:0] www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 28/40 Bit2 Bit1 Bit0 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS 0xB2-0xBB: Long Press Detection Assignment / Unexpected Long Press Detection Assignment Name: SENS_HLD_CFG Address: 0xB2-0xBB Description: These registers assign the settings of the register “Long Press Detection Time / Repeated Long Press Detection Time” and “Unexpected Long Press Detection Time” to each sensor. HLD_CS*[2:0] = 0x0: Long press and repeated long press are not detected to CS*. = 0x1: Long press A and repeated long press A are assigned to CS*. = 0x2: Long press B and repeated long press B are assigned to CS*. = 0x3: Long press C and repeated long press C are assigned to CS*. = 0x4: Long press D and repeated long press D are assigned to CS*. = 0x5: Long press E and repeated long press E are assigned to CS*. = 0x6: Long press F and repeated long press F are assigned to CS*. = 0x7: Long press G and repeated long press G are assigned to CS*. UNK_CS* = 0x0: Unexpected long press A is assigned to CS*. = 0x1: Unexpected long press B is assigned to CS*. * represent the sensor number from 0 to 19. Address R/W Initial Bit7 0xB2 R/W 0x00 UNK_CS1 Bit6 HLD_CS1[2:0] Bit5 Bit4 UNK_CS0 Bit3 Bit2 HLD_CS0[2:0] Bit1 0xB3 R/W 0x00 UNK_CS3 HLD_CS3[2:0] UNK_CS2 HLD_CS2[2:0] 0xB4 R/W 0x00 UNK_CS5 HLD_CS5[2:0] UNK_CS4 HLD_CS4[2:0] 0xB5 R/W 0x00 UNK_CS7 HLD_CS7[2:0] UNK_CS6 HLD_CS6[2:0] 0xB6 R/W 0x00 UNK_CS9 HLD_CS9[2:0] UNK_CS8 HLD_CS8[2:0] 0xB7 R/W 0x00 UNK_CS11 HLD_CS11[2:0] UNK_CS10 HLD_CS10[2:0] 0xB8 R/W 0x00 UNK_CS13 HLD_CS12[2:0] UNK_CS12 HLD_CS12[2:0] 0xB9 R/W 0x00 UNK_CS15 HLD_CS15[2:0] UNK_CS14 HLD_CS14[2:0] 0xBA R/W 0x00 UNK_CS17 HLD_CS17[2:0] UNK_CS16 HLD_CS16[2:0] 0xBB R/W 0x00 UNK_CS19 HLD_CS19[2:0] UNK_CS18 HLD_CS18[2:0] Bit0 0xBC: Switch Detection Time Name: TIME_DET_CFG Address: 0xBC Description: This register configures the time until detecting ON state. IC recognizes the ON state after the delay time by median filter and this function. Second touch is not detected until clearing the interrupt of first touch. Pressing simultaneously within the time is detected as a multiple pattern switch. The time until detecting the ON state of switch = TIME_DET[7:0] x Approximately 10ms Address R/W Initial 0xBC R/W 0x00 www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 TIME_DET[7:0] 29/40 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS 0xBD-0xD4: Multiple Pattern Switches Assignment Name: SENS_MULT_CFG Address: 0xBD-0xD4 Description: These registers configure the combinations of multiple pattern switches detection. The multiple pattern switch combinations are able to be set up to 8 types from A to H. In the case the same combinations are set in 8 types, the combination settings are invalid. MULT_A_CS*=0: CS* is not assigned to multiple pattern switches A. MULT_A_CS*=1: CS* is assigned to multiple pattern switches A. MULT_B_CS*=0: CS* is not assigned to multiple pattern switches B. MULT_B_CS*=1: CS* is assigned to multiple pattern switches B. MULT_C_CS*=0: CS* is not assigned to multiple pattern switches C. MULT_C_CS*=1: CS* is assigned to multiple pattern switches C. MULT_D_CS*=0: CS* is not assigned to multiple pattern switches D. MULT_D_CS*=1: CS* is assigned to multiple pattern switches D. MULT_E_CS*=0: CS* is not assigned to multiple pattern switches E. MULT_E_CS*=1: CS* is assigned to multiple pattern switches E. MULT_F_CS*=0: CS* is not assigned to multiple pattern switches F. MULT_F_CS*=1: CS* is assigned to multiple pattern switches F. MULT_G_CS*=0: CS* is not assigned to multiple pattern switches G. MULT_G_CS*=1: CS* is assigned to multiple pattern switches G. MULT_H_CS*=0: CS* is not assigned to multiple pattern switches H. MULT_H_CS*=1: CS* is assigned to multiple pattern switches H. * represent the sensor number from 0 to 19. Address R/W Initial 0xBD R/W 0x00 0xBE R/W 0x00 0xBF R/W 0x00 0xC0 R/W 0x00 0xC1 R/W 0x00 0xC2 R/W 0x00 0xC3 R/W 0x00 0xC4 R/W 0x00 0xC5 R/W 0x00 0xC6 R/W 0x00 0xC7 R/W 0x00 0xC8 R/W 0x00 0xC9 R/W 0x00 0xCA R/W 0x00 0xCB R/W 0x00 0xCC R/W 0x00 0xCD R/W 0x00 0xCE R/W 0x00 0xCF R/W 0x00 0xD0 R/W 0x00 0xD1 R/W 0x00 0xD2 R/W 0x00 0xD3 R/W 0x00 0xD4 R/W 0x00 www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 MULT_A _CS7 MULT_A _CS15 MULT_A _CS6 MULT_A _CS14 MULT_A _CS5 MULT_A _CS13 MULT_A _CS4 MULT_A _CS12 MULT_A _CS3 MULT_A _CS11 MULT_A _CS19 MULT_B _CS3 MULT_B _CS11 MULT_B _CS19 MULT_C _CS3 MULT_C _CS11 MULT_C _CS19 MULT_D _CS3 MULT_D _CS11 MULT_D _CS19 MULT_E _CS3 MULT_E _CS11 MULT_E _CS19 MULT_F _CS3 MULT_F _CS11 MULT_F _CS19 MULT_G _CS3 MULT_G _CS11 MULT_G _CS19 MULT_H _CS3 MULT_H _CS11 MULT_H _CS19 MULT_A _CS2 MULT_A _CS10 MULT_A _CS18 MULT_B _CS2 MULT_B _CS10 MULT_B _CS18 MULT_C _CS2 MULT_C _CS10 MULT_C _CS18 MULT_D _CS2 MULT_D _CS10 MULT_D _CS18 MULT_E _CS2 MULT_E _CS10 MULT_E _CS18 MULT_F _CS2 MULT_F _CS10 MULT_F _CS18 MULT_G _CS2 MULT_G _CS10 MULT_G _CS18 MULT_H _CS2 MULT_H _CS10 MULT_H _CS18 MULT_A _CS1 MULT_A _CS9 MULT_A _CS17 MULT_B _CS1 MULT_B _CS9 MULT_B _CS17 MULT_C _CS1 MULT_C _CS9 MULT_C _CS17 MULT_D _CS1 MULT_D _CS9 MULT_D _CS17 MULT_E _CS1 MULT_E _CS9 MULT_E _CS17 MULT_F _CS1 MULT_F _CS9 MULT_F _CS17 MULT_G _CS1 MULT_G _CS9 MULT_G _CS17 MULT_H _CS1 MULT_H _CS9 MULT_H _CS17 MULT_A _CS0 MULT_A _CS8 MULT_A _CS16 MULT_B _CS0 MULT_B _CS8 MULT_B _CS16 MULT_C _CS0 MULT_C _CS8 MULT_C _CS16 MULT_D _CS0 MULT_D _CS8 MULT_D _CS16 MULT_E _CS0 MULT_E _CS8 MULT_E _CS16 MULT_F _CS0 MULT_F _CS8 MULT_F _CS16 MULT_G _CS0 MULT_G _CS8 MULT_G _CS16 MULT_H _CS0 MULT_H _CS8 MULT_H _CS16 - - - - MULT_B _CS7 MULT_B _CS15 MULT_B _CS6 MULT_B _CS14 MULT_B _CS5 MULT_B _CS13 MULT_B _CS4 MULT_B _CS12 - - - - MULT_C _CS7 MULT_C _CS15 MULT_C _CS6 MULT_C _CS14 MULT_C _CS5 MULT_C _CS13 MULT_C _CS4 MULT_C _CS12 - - - - MULT_D _CS7 MULT_D _CS15 MULT_D _CS6 MULT_D _CS14 MULT_D _CS5 MULT_D _CS13 MULT_D _CS4 MULT_D _CS12 - - - - MULT_E _CS7 MULT_E _CS15 MULT_E _CS6 MULT_E _CS14 MULT_E _CS5 MULT_E _CS13 MULT_E _CS4 MULT_E _CS12 - - - - MULT_F _CS7 MULT_F _CS15 MULT_F _CS6 MULT_F _CS14 MULT_F _CS5 MULT_F _CS13 MULT_F _CS4 MULT_F _CS12 - - - - MULT_G _CS7 MULT_G _CS15 MULT_G _CS6 MULT_G _CS14 MULT_G _CS5 MULT_G _CS13 MULT_G _CS4 MULT_G _CS12 - - - - MULT_H _CS7 MULT_H _CS15 MULT_H _CS6 MULT_H _CS14 MULT_H _CS5 MULT_H _CS13 MULT_H _CS4 MULT_H _CS12 - - - - 30/40 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS 0xD5-0xD6: Mask Interrupt Factor Name: MSK_INTERRUPT_CFG Address: 0xD5-0xD6 Description: These registers are for masking the interrupt of the register “Interrupt Factor”. In the case mask is set to 1, Interrupt is not reflected to the register “Interrupt Factor”. 0: Interrupt is not masked 1: Interrupt is masked MSK_INT_FINCAL : Mask Software Calibration Completion Interrupt In the case this bit is set to 1, interrupt is not reflected to the bit “INT_FINCAL” in the register “Interrupt Factor”. MSK_INT_FALCAL : Mask Software Calibration Failure Interrupt In the case this bit is set to 1, interrupt is not reflected to the bit “INT_FALCAL” in the register “Interrupt Factor”. MSK_INT_NOISE : Mask Noise Detection Interrupt In the case this bit is set to 1, interrupt is not reflected to the bit “INT_NOISE” in the register “Interrupt Factor”. MSK_INT_AVDDON : Mask AVDD ON Detection Interrupt In the case this bit is set to 1, interrupt is not reflected to the bit “INT_AVDDON” in the register “Interrupt Factor”. MSK_INT_AVDDOFF : Mask AVDD OFF Detection Interrupt In the case this bit is set to 1 interrupt is not reflected to the bit “INT_AVDDOFF” in the register “Interrupt Factor”. Address R/W Initial Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 0xD5 R/W 0x00 MSK_INT _NOISE - - - MSK_INT FALCAL MSK_INT FINCAL - - - MSK_INT AVDDOFF MSK_INT AVDDON 0xD6 R/W 0x00 - - - - - Bit0 0xD7-0xD9: Mask Switch ON Detection Name: MSK_DET_ON_CFG Address: 0xD7-0xD9 Description: These register are for masking the interrupt of the register “Switch ON Detection”. If these bits are set to 1, interrupt is not reflected to the register “Switch ON Detection”. 0: Interrupt is not masked Address R/W Initial 0xD7 R/W 0x00 0xD8 R/W 0x00 0xD9 R/W 0x00 1: Interrupt is masked Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 MSK_DET _ON_CS7 MSK_DET _ON_CS15 MSK_DET _ON_CS6 MSK_DET _ON_CS14 MSK_DET _ON_CS5 MSK_DET _ON_CS13 MSK_DET _ON_CS4 MSK_DET _ON_CS12 - - - - MSK_DET _ON_CS3 MSK_DET _ON_CS11 MSK_DET _ON_CS19 MSK_DET _ON_CS2 MSK_DET _ON_CS10 MSK_DET _ON_CS18 MSK_DET _ON_CS1 MSK_DET _ON_CS9 MSK_DET _ON_CS17 MSK_DET _ON_CS0 MSK_DET _ON_CS8 MSK_DET _ON_CS16 0xDA-0xDC: Mask Switch OFF Detection Name: MSK_DET_OFF_CFG Address: 0xDA-0xDC Description: These register are for masking the interrupt of the register “Switch OFF Detection”. If these bits are set to 1, interrupt is not reflected to the register “Switch OFF Detection”. 0: Interrupt is not masked Address R/W Initial 0xDA R/W 0x00 0xDB R/W 0xDC R/W 1: Interrupt is masked Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 0x00 MSK_DET _OFF_CS7 MSK_DET _OFF_CS15 MSK_DET _OFF_CS6 MSK_DET _OFF_CS14 MSK_DET _OFF_CS5 MSK_DET _OFF_CS13 MSK_DET _OFF_CS4 MSK_DET _OFF_CS12 0x00 - - - - MSK_DET _OFF_CS3 MSK_DET _OFF_CS11 MSK_DET _OFF_CS19 MSK_DET _OFF_CS2 MSK_DET _OFF_CS10 MSK_DET _OFF_CS18 MSK_DET _OFF_CS1 MSK_DET _OFF_CS9 MSK_DET _OFF_CS17 MSK_DET _OFF_CS0 MSK_DET _OFF_CS8 MSK_DET _OFF_CS16 www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 31/40 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS 0xDD-0xDF: Mask Unexpected Long Press Detection Name: MSK_DET_UNKNOWN_CFG Address: 0xDD-0xDF Description: These registers are for masking the interrupt are the register “Unexpected Long Press Detection”. If these bits are set to 1, interrupt is not reflected to the register “Unexpected Long Press Detection”. 0: Interrupt is not masked Address R/W Initial 0xDD R/W 0x00 0xDE R/W 0xDF R/W 1: Interrupt is masked Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 0x00 MSK_UNK _CS7 MSK_UNK _CS15 MSK_UNK _CS6 MSK_UNK _CS14 MSK_UNK _CS5 MSK_UNK _CS13 MSK_UNK _CS4 MSK_UNK _CS12 0x00 - - - - MSK_UNK _CS3 MSK_UNK _CS11 MSK_UNK _CS19 MSK_UNK _CS2 MSK_UNK _CS10 MSK_UNK _CS18 MSK_UNK _CS1 MSK_UNK _CS9 MSK_UNK _CS17 MSK_UNK _CS0 MSK_UNK _CS8 MSK_UNK _CS16 www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 32/40 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS Command Register Description 0xE0-0xE1: Clear Interrupt Factor Name: CLR_INTERRUPT_CMD Address: 0xE0-0xE1 Description: These are for clearing the interrupt of the register “Interrupt Factor”. 0: Interrupt is cleared 1: Interrupt is not cleared CLR_INT_FININI : Clear Initialization Completion Interrupt This bit is for clearing the bit “INT_FININI” in the register “Interrupt Factor”. CLR_INT_FINCAL : Clear Software Calibration Completion Interrupt This bit is for clearing the bit “INT_FINCAL” in the register “Interrupt Factor”. CLR_INT_FALCAL : Clear Software Calibration Failure Interrupt This bit is for clearing the bit “INT_FALCAL” in the register “Interrupt Factor”. CLR_INT_NOISE : Clear Noise Detection Interrupt This bit is for clearing the bit “INT_NOISE” in the register “Interrupt Factor”. CLR_INT_AVDDON : Clear AVDD ON Detection Interrupt This bit is for clearing the bit “INT_AVDDON” in the register “Interrupt Factor”. CLR_INT_AVDDOFF : Clear AVDD OFF Detection Interrupt This bit is for clearing the bit “INT_AVDDOFF” in the register “Interrupt Factor”. Address 0xE0 0xE1 R/W R/W R/W Initial Bit7 0x00 CLR_INT _NOISE 0x00 - Bit6 - Bit5 - Bit4 Bit3 Bit2 - CLR_INT _FALCAL CLR_INT _FINCAL - - CLR_INT_ AVDDOFF - - Bit1 Bit0 CLR_INT _FININI CLR_INT_ AVDDON 0xE2-0xE4: Clear Switch ON Detection Name: CLR_DET_ON_CMD Address: 0xE2-0xE4 Description: These registers are for clearing the interrupt of the register “Switch ON Detection”. 0: Interrupt is cleared Address R/W Initial 0xE2 R/W 0x00 0xE3 R/W 0x00 0xE4 R/W 0x00 1: Interrupt is not cleared Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 CLR_DET _ON_CS7 CLR_DET _ON_CS15 CLR_DET _ON_CS6 CLR_DET _ON_CS14 CLR_DET _ON_CS5 CLR_DET _ON_CS13 CLR_DET _ON_CS4 CLR_DET _ON_CS12 - - - - CLR_DET _ON_CS3 CLR_DET _ON_CS11 CLR_DET _ON_CS19 CLR_DET _ON_CS2 CLR_DET _ON_CS10 CLR_DET _ON_CS18 CLR_DET _ON_CS1 CLR_DET _ON_CS9 CLR_DET _ON_CS17 CLR_DET _ON_CS0 CLR_DET _ON_CS8 CLR_DET _ON_CS16 0xE5-0xE7: Clear Switch OFF Detection Name: CLR_DET_OFF_CMD Address: 0xE5-0xE7 Description: These registers are for clearing the interrupt of the register “Switch OFF Detection”. 0: Interrupt is cleared Address R/W Initial Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 CLR_DET _OFF_CS6 CLR_DET _OFF_CS14 CLR_DET _OFF_CS5 CLR_DET _OFF_CS13 CLR_DET _OFF_CS4 CLR_DET _OFF_CS12 - - - CLR_DET _OFF_CS3 CLR_DET _OFF_CS11 CLR_DET _OFF_CS19 CLR_DET _OFF_CS2 CLR_DET _OFF_CS10 CLR_DET _OFF_CS18 CLR_DET _OFF_CS1 CLR_DET _OFF_CS9 CLR_DET _OFF_CS17 CLR_DET _OFF_CS0 CLR_DET _OFF_CS8 CLR_DET _OFF_CS16 0xE5 R/W 0x00 0xE6 R/W 0x00 CLR_DET _OFF_CS7 CLR_DET _OFF_CS15 0xE7 R/W 0x00 - www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 1: Interrupt is not cleared 33/40 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS 0xE8-0xEA: Clear Switch Long Press Detection Name: CLR_DET_HLD_CMD Address: 0xE8-0xEA Description: These registers are for clearing the interrupt of the register “Switch Long Press Detection”. 0: Interrupt is cleared Address R/W Initial 0xE8 R/W 0x00 0xE9 R/W 0x00 0xEA R/W 0x00 1: Interrupt is not cleared Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 CLR_HLD _CS7 CLR_HLD _CS15 CLR_HLD _CS6 CLR_HLD _CS14 CLR_HLD _CS5 CLR_HLD _CS13 CLR_HLD _CS4 CLR_HLD _CS12 - - - - CLR_HLD _CS3 CLR_HLD _CS11 CLR_HLD _CS19 CLR_HLD _CS2 CLR_HLD _CS10 CLR_HLD _CS18 CLR_HLD _CS1 CLR_HLD _CS9 CLR_HLD _CS17 CLR_HLD _CS0 CLR_HLD _CS8 CLR_HLD _CS16 0xEB-0xED: Clear Switch Repeated Long Press Detection Name: CLR_DET_HLDRPT Address: 0xEB-0xED Description: These registers are for clearing the interrupt of the register “Switch Repeated Long Press Detection”. 0: Interrupt is cleared Address R/W Initial 0xEB R/W 0x00 0xEC R/W 0x00 0xED R/W 0x00 1: Interrupt is not cleared Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 CLR_HLD RPT_CS7 CLR_HLD RPT_CS15 CLR_HLD RPT_CS6 CLR_HLD RPT_CS14 CLR_HLD RPT_CS5 CLR_HLD RPT_CS13 CLR_HLD RPT_CS4 CLR_HLD RPT_CS12 - - - - CLR_HLD RPT_CS3 CLR_HLD RPT_CS11 CLR_HLD RPT_CS19 CLR_HLD RPT_CS2 CLR_HLD RPT_CS10 CLR_HLD RPT_CS18 CLR_HLD RPT_CS1 CLR_HLD RPT_CS9 CLR_HLD RPT_CS17 CLR_HLD RPT_CS0 CLR_HLD RPT_CS8 CLR_HLD RPT_CS16 0xEE: Clear Multiple Pattern Switches ON Detection Name: CLR_DET_MULT_ON Address: 0xEE Description: This register is for clearing the interrupt of the register “Multiple Pattern Switches ON Detection”. 0: Interrupt is cleared Address 0xEE R/W R/W 1: Interrupt is not cleared Initial Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 0x00 CLR_MULT _ON_H CLR_MULT _ON_G CLR_MULT _ON_F CLR_MULT _ON_E CLR_MULT _ON_D CLR_MULT _ON_C CLR_MULT _ON_B CLR_MULT _ON_A 0xEF: Clear Multiple Pattern Switches OFF Detection Name: CLR_ DET_MULT_OFF Address: 0xEF Description: This register is for clearing clear the interrupt of the register “Multiple Pattern Switches OFF Detection”. 0: Interrupt is cleared Address 0xEE R/W R/W 1: Interrupt is not cleared Initial Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 0x00 CLR_MULT _OFF_H CLR_MULT _OFF_G CLR_MULT _OFF_F CLR_MULT _OFF_E CLR_MULT _OFF_D CLR_MULT _OFF_C CLR_MULT _OFF_B CLR_MULT _OFF_A 0xF0-0xF2: Clear Unexpected Long Press Detection Name: CLR_DET_UNKNOWN Address: 0xF0-0xF2 Description: These registers are for clearing the interrupt of the register “Unexpected Long Press Detection”. 0: Interrupt is cleared. 1: Interrupt is not cleared Address R/W Initial Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 0xF0 R/W 0x00 0xF1 R/W 0x00 CLR_UNK _CS7 CLR_UNK _CS15 CLR_UNK _CS6 CLR_UNK _CS14 CLR_UNK _CS5 CLR_UNK _CS13 CLR_UNK _CS4 CLR_UNK _CS12 0xF2 R/W 0x00 - - - - CLR_UNK _CS3 CLR_UNK _CS11 CLR_UNK _CS19 CLR_UNK _CS2 CLR_UNK _CS10 CLR_UNK _CS18 CLR_UNK _CS1 CLR_UNK _CS9 CLR_UNK _CS17 CLR_UNK _CS0 CLR_UNK _CS8 CLR_UNK _CS16 www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 34/40 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS 0xF3-0xF4: Software Reset Name: SWRST_CMD Address: 0xF3-0xF4 Description: These registers are used for software reset. When the data of register 0xF3 is set to 0x55 and the data of register 0xF4 is set to 0xAA, IC is initialized and all registers are cleared. Address R/W Initial 0xF3 R/W 0x00 SRST[7:0] 0xF4 R/W 0x00 SRST[15:8] 0xFE: AVDD LDO Name: Address: Description: Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Bit3 Bit2 Bit1 Bit0 - - - AVDD_ON Control AVDD_CMD 0xFE This register controls AVDD LDO. AVDD_ON : AVDD LDO Control 0: AVDD is disable 1: AVDD is enable SEL_AVDD [1:0]: AVDD LDO Output Voltage SEL_AVDD [1:0] = 0x0: AVDD voltage = 2.8V = 0x1: AVDD voltage = 2.7V = 0x2: AVDD voltage = 2.6V = 0x3: AVDD voltage = 2.5V Address R/W Initial Bit7 Bit6 0xFE R/W 0x00 - - Bit5 Bit4 SEL_AVDD[1:0] 0xFF: Sensor Control Name: SENS_CMD Address: 0xFF Description: This register controls the sensor. STR_AFE : Control Sensor 0: Detection stops STR_CAL 1: Detection starts : Software Calibration Control 0: Calibration is not performed STR_CFG 1: Calibration is performed : Update Configuration Registers This bit is for updating configuration register. Set 1 to this bit after changing configuration registers. Address R/W Initial Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 0xFF R/W 0x00 - - - - - STR_CFG STR_CAL STR_AFE www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 35/40 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS Operational Notes 1. Reverse Connection of Power Supply Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply pins. 2. Power Supply Lines Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic capacitors. 3. Ground Voltage Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition. 4. Ground Wiring Pattern When using both small-signal and large-current ground traces, the two ground traces should be routed separately but connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal ground caused by large currents. Also ensure that the ground traces of external components do not cause variations on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance. 5. Recommended Operating Conditions The function and operation of the IC are guaranteed within the range specified by the recommended operating conditions. The characteristic values are guaranteed only under the conditions of each item specified by the electrical characteristics. 6. Inrush Current When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing of connections. 7. Operation Under Strong Electromagnetic Field Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction. 8. Testing on Application Boards When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should always be turned off completely before connecting or removing it from the test setup during the inspection process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and storage. 9. Inter-pin Short and Mounting Errors Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin. Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and unintentional solder bridge deposited in between pins during assembly to name a few. 10. Unused Input Pins Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power supply or ground line. www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 36/40 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS Operational Notes – continued 11. Regarding the Input Pin of the IC In the construction of this IC, P-N junctions are inevitably formed creating parasitic diodes or transistors. The operation of these parasitic elements can result in mutual interference among circuits, operational faults, or physical damage. Therefore, conditions which cause these parasitic elements to operate, such as applying a voltage to an input pin lower than the ground voltage should be avoided. Furthermore, do not apply a voltage to the input pins when no power supply voltage is applied to the IC. Even if the power supply voltage is applied, make sure that the input pins have voltages within the values specified in the electrical characteristics of this IC. 12. Ceramic Capacitor When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with temperature and the decrease in nominal capacitance due to DC bias and others. 13. Area of Safe Operation (ASO) Operate the IC such that the output voltage, output current, and the maximum junction temperature rating are all within the Area of Safe Operation (ASO). 14. Over Current Protection Circuit (OCP) This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should not be used in applications characterized by continuous operation or transitioning of the protection circuit. www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 37/40 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS Ordering Information B U 2 1 1 8 Part Number 0 F S Package FS: SSOP-A32 - E2 Packaging and forming specification E2:Embossed tape and reel Marking Diagram SSOP-A32(TOP VIEW) Part Number Marking BU2 11 80 LOT Number Pin 1 Mark www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 38/40 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS Physical Dimension and Packing Information Package Name www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 SSOP-A32 39/40 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 BU21180FS Revision History Date Revision 08.Sep.2017 06.Aug.2018 001 002 Changes New Release P26 Add the limitation about offset calibration www.rohm.com © 2017 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 40/40 TSZ02201-0L5L0F300930-1-2 06.Aug.2018 Rev.002 Notice Precaution on using ROHM Products 1. Our Products are designed and manufactured for application in ordinary electronic equipment (such as AV equipment, OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you (Note 1) intend to use our Products in devices requiring extremely high reliability (such as medical equipment , transport equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific Applications. (Note1) Medical Equipment Classification of the Specific Applications JAPAN USA EU CHINA CLASSⅢ CLASSⅡb CLASSⅢ CLASSⅢ CLASSⅣ CLASSⅢ 2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which a failure or malfunction of our Products may cause. The following are examples of safety measures: [a] Installation of protection circuits or other protective devices to improve system safety [b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. Our Products are designed and manufactured for use under standard conditions and not under any special or extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our Products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary: [a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents [b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust [c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves [e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items [f] Sealing or coating our Products with resin or other coating materials [g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] Use of the Products in places subject to dew condensation 4. The Products are not subject to radiation-proof design. 5. Please verify and confirm characteristics of the final or mounted products in using the Products. 6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied, confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect product performance and reliability. 7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in the range that does not exceed the maximum junction temperature. 8. Confirm that operation temperature is within the specified range described in the product specification. 9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in this document. Precaution for Mounting / Circuit board design 1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product performance and reliability. 2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products, please consult with the ROHM representative in advance. For details, please refer to ROHM Mounting specification Notice-PGA-E © 2015 ROHM Co., Ltd. All rights reserved. Rev.003 Precautions Regarding Application Examples and External Circuits 1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the characteristics of the Products and external components, including transient characteristics, as well as static characteristics. 2. You agree that application notes, reference designs, and associated data and information contained in this document are presented only as guidance for Products use. Therefore, in case you use such information, you are solely responsible for it and you must exercise your own independent verification and judgment in the use of such information contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such information. Precaution for Electrostatic This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron, isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control). Precaution for Storage / Transportation 1. Product performance and soldered connections may deteriorate if the Products are stored in the places where: [a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [b] the temperature or humidity exceeds those recommended by ROHM [c] the Products are exposed to direct sunshine or condensation [d] the Products are exposed to high Electrostatic 2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is exceeding the recommended storage time period. 3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of which storage time is exceeding the recommended storage time period. Precaution for Product Label A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only. Precaution for Disposition When disposing Products please dispose them properly using an authorized industry waste company. Precaution for Foreign Exchange and Foreign Trade act Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign trade act, please consult with ROHM in case of export. Precaution Regarding Intellectual Property Rights 1. All information and data including but not limited to application example contained in this document is for reference only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data. 2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the Products with other articles such as components, circuits, systems or external equipment (including software). 3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to manufacture or sell products containing the Products, subject to the terms and conditions herein. Other Precaution 1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM. 2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written consent of ROHM. 3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the Products or this document for any military purposes, including but not limited to, the development of mass-destruction weapons. 4. The proper names of companies or products described in this document are trademarks or registered trademarks of ROHM, its affiliated companies or third parties. Notice-PGA-E © 2015 ROHM Co., Ltd. All rights reserved. Rev.003 Datasheet General Precaution 1. Before you use our Products, you are requested to carefully read this document and fully understand its contents. ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any ROHM’s Products against warning, caution or note contained in this document. 2. All information contained in this document is current as of the issuing date and subject to change without any prior notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales representative. 3. The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccuracy or errors of or concerning such information. Notice – WE © 2015 ROHM Co., Ltd. All rights reserved. Rev.001