74LVT04PW,112

74LVT04 3.3 V Hex inverter Rev. 2 — 28 April 2014 Product data sheet 1. General description The 74LVT04 is a high-performance product designed for VCC operation at 3.3 V. The 74LVT04 provides six inverting buffers. 2. Features and benefits  TTL input and output switching levels  Latch-up protection  JESD78 class II exceeds 500 mA  ESD protection:  HBM JESD22-A114E exceeds 2000 V  MM JESD22-A115-A exceeds 200 V  Specified from 40 C to +85 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVT04D 40 C to +85 C SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 74LVT04DB 40 C to +85 C SSOP14 plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1 74LVT04PW 40 C to +85 C TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 74LVT04 Nexperia 3.3 V Hex inverter 4. Functional diagram    $ <   $ <    $ <   $ <   $ <   $ <       PQD Logic symbol     Fig 1.       Y A PQD Fig 2. mna341 IEC logic symbol Fig 3. Logic diagram for one gate 5. Pinning information 5.1 Pinning 1A 1 14 VCC 1Y 2 13 6A 2A 3 12 6Y 2Y 4 3A 5 3Y 6 9 4A GND 7 8 4Y 04 11 5A 10 5Y 001aac915 Fig 4. Pin configuration SOT108-1 (SO14), SOT337-1 (SSOP14) and SOT402-1 (TSSOP14) 74LVT04 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 28 April 2014 © Nexperia B.V. 2017. All rights reserved 2 of 13 74LVT04 Nexperia 3.3 V Hex inverter 5.2 Pin description Table 2. Pin description Symbol Pin Description nA 1, 3, 5, 9, 11, 13 data input nY 2, 4, 6, 8, 10, 12 data output GND 7 ground (0 V) VCC 14 supply voltage 6. Functional description Table 3. Function table[1] Input Output nA nY L H H L [1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage Conditions Min Max Unit 0.5 +4.6 V 0.5 +7.0 V input voltage [1] VO output voltage output in OFF-state or HIGH-state [1] 0.5 +7.0 V IIK input clamping current VI < 0 V 50 - mA IOK output clamping current VO < 0 V 50 - mA IO output current output in LOW-state - 64 mA output in HIGH-state - 32 mA Tstg storage temperature 65 +150 C Tj junction temperature [2] - 150 C [3] - 500 mW VI total power dissipation Ptot Tamb = 40 °C to +85 °C [1] The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. [2] The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. [3] For SO14 packages: above 70 C derate linearly with 8 mW/K. For SSOP14 and TSSOP14 packages: above 60 C derate linearly with 5.5 mW/K. 74LVT04 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 28 April 2014 © Nexperia B.V. 2017. All rights reserved 3 of 13 74LVT04 Nexperia 3.3 V Hex inverter 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter VCC Conditions Min Max Unit supply voltage 2.7 3.6 V VI input voltage 0 5.5 V VIH HIGH-level input voltage 2.0 - V VIL LOW-level input voltage - 0.8 V IOH HIGH-level output current - 20 mA IOL LOW-level output current - 32 mA Tamb ambient temperature in free air 40 +85 C t/V input transition rise and fall rate outputs enabled - 10 ns/V 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 40 C to +85 C Conditions Min Typ[1] Unit Max VIK input clamp voltage VCC = 2.7 V; IIK = 18 mA - - 1.2 V VOH LOW-level input voltage VCC = 2.7 V to 3.6 V; IOH = 100 A VCC  0.2 - - V VCC = 2.7 V; IOH = 6 mA 2.4 - - V VCC = 3.0 V; IOH = 20 mA 2.0 - - V VCC = 2.7 V; IOL = 100 A - - 0.2 V VCC = 2.7 V; IOL = 24 mA - - 0.5 V VCC = 3.0 V; IOL = 32 mA - - 0.5 V - - 10 A LOW-level output voltage VOL II input leakage current VCC = 0 V or 3.6 V; VI = 5.5 V VCC = 3.6 V; VI = VCC or GND - - ±1 A IOFF output off current VCC = 0 V; VI or VO = 0 V to 4.5 V - - ±100 A ICCH quiescent supply current VCC = 3.6 V; outputs HIGH; VI = GND or VCC, IO = 0 V - - 0.02 mA ICCL quiescent supply current VCC = 3.6 V; outputs LOW; VI = GND or VCC; IO = 0 V - 1.5 3 mA ICC additional supply current per input pin[2] VCC = 3 V to 3.6 V; one input at VCC  0.6 V; other inputs at VCC or GND - - 0.2 A CI input capacitance VI = 3 V or 0 V - 3 - pF [1] All typical values are at VCC = 3.3 V and Tamb = 25C. [2] This is the increase in supply current for each input at the specified voltage level other than VCC or GND. 74LVT04 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 28 April 2014 © Nexperia B.V. 2017. All rights reserved 4 of 13 74LVT04 Nexperia 3.3 V Hex inverter 10. Dynamic characteristics Table 7. Dynamic characteristics GND = 0 V; for test circuit, see Figure 6. Symbol Parameter LOW to OFF-state propagation delay tPLH 40 C to +85 C Conditions OFF-state to LOW propagation delay VCC = 2.7 V Max - - 4.7 ns 1.0 2.6 3.9 ns nA to nY; see Figure 5 ns VCC = 2.7 V VCC = 3.3 V  0.3 V [1] Min nA to nY; see Figure 5 VCC = 3.3 V  0.3 V tPHL Unit Typ[1] - - 3.2 1.0 2.5 3.5 ns All typical values are at VCC = 3.3 V and Tamb = 25C. 11. Waveforms 9, 90 Q$LQSXW 90 *1' W 3+/ W 3/+ 92+ 90 Q