PC66-222-920

3.3V 2M x 64/72-Bit 1 BANK SDRAM Module 3.3V 4M x 64/72-Bit 2 BANK SDRAM Module 168 pin unbuffered DIMM Modules HYS64/72V2200GU-8/-10 HYS64/72V4220GU-8/-10 • 168 Pin PC100 and PC66 compatible unbuffered 8 Byte Dual-In-Line SDRAM Modules for PC main memory applications 1 bank 2M x 64, 2M x 72 and 2 bank 4M x 64, 4M x 72 organisation Optimized for byte-write non-parity or ECC applications JEDEC standard Synchronous DRAMs (SDRAM) Fully PC board layout compatible to INTEL’ Rev. 1.0 module specification s SDRAM Performance: -8 fCK tAC Clock frequency (max.) Clock access time 100 6 -8-3 100 6 -10 66 8 Units MHz ns • • • • • • Programmed Latencies : Product Speed -8 -8-3 -10 PC100 PC100 PC66 CL 2 3 2 tRCD 2 2 2 tRP 2 3 2 • • Single +3.3V(± 0.3V ) power supply Programmable CAS Latency, Burst Length and Wrap Sequence (Sequential & Interleave) Auto Refresh (CBR) and Self Refresh Decoupling capacitors mounted on substrate All inputs, outputs are LVTTL compatible Serial Presence Detect with E 2PROM Utilizes 2M x 8 SDRAMs in TSOPII-44 packages 4096 refresh cycles every 64 ms 133,35 mm x 31.75 mm x 4,00 mm card size with gold contact pads • • • • • • • Semiconductor Group 1 6.98 HYS64(72)V2200/4220GU-8/-10 SDRAM-Modules The HYS64(72)2200 and HYS64(72)4220 are industry standard 168-pin 8-byte Dual in-line Memory Modules (DIMMs) which are organised as 2M x 64, 2M x 72 in 1 bank and 4M x 64 and 4M x 72 in two banks high speed memory arrays designed with Synchronous DRAMs (SDRAMs) for non-parity and ECC applications. The DIMMs use -8 speed sort 2M x 8 SDRAM devices in TSOP44 packages to meet the PC100 requirement. Modules which use -10 parts are suitable for PC66 applications only. Decoupling capacitors are mounted on the PC board. The PC board design is according to INTEL’ PC SDRAM Rev.1.0 module specification. s The DIMMs have a serial presence detect, implemented with a serial E 2PROM using the two pin I2C protocol. The first 128 bytes are utilized by the DIMM manufacturer and the second 128 bytes are available to the end user. All SIEMENS 168-pin DIMMs provide a high performance, flexible 8-byte interface in a 133,35 mm long footprint, with 1,25“( 31,75 mm) height Ordering Information Type HYS 64V2200GU-8 HYS 72V2200GU-8 HYS 64V4220GU-8 HYS 72V4220GU-8 HYS 64V2200GU-8-3 HYS 72V2200GU-8-3 HYS 64V4220GU-8-3 HYS 72V4220GU-8-3 HYS 64V2200GU-10 HYS 72V2200GU-10 HYS 64V4220GU-10 HYS 72V4220GU-10 Ordering Code PC100-222-620 PC100-222-620 PC100-222-620 PC100-222-620 PC100-323-620 PC100-323-620 PC100-323-620 PC100-323-620 PC66-222-920 PC66-222-920 PC66-222-920 PC66-222-920 Package Descriptions Module Height 1,25“ 1,25“ 1,25“ 1,25“ 1,25“ 1,25“ 1,25“ 1,25“ 1,25“ 1,25“ 1,25“ 1,25“ L-DIM-168-29 100 Mhz 2M x 64 1 bank SDRAM module L-DIM-168-29 100 MHz 2M x 72 1 bank SDRAM module L-DIM-168-29 100 Mhz 4M x 64 2 bank SDRAM module L-DIM-168-29 100 Mhz 4M x 72 2 bank SDRAM module L-DIM-168-29 100 Mhz 2M x 64 1 bank SDRAM module L-DIM-168-29 100 MHz 2M x 72 1 bank SDRAM module L-DIM-168-29 100 Mhz 4M x 64 2 bank SDRAM module L-DIM-168-29 100 Mhz 4M x 72 2 bank SDRAM module L-DIM-168-29 66 Mhz 2M x 64 1 bank SDRAM module L-DIM-168-29 66 MHz 2M x 72 1 bank SDRAM module L-DIM-168-29 66 Mhz 4M x 64 2 bank SDRAM module L-DIM-168-29 66 Mhz 4M x 72 2 bank SDRAM module Pin Names Address Inputs Bank Address Data Input/Output Check Bits (x72 organisation only) RAS Row Address Strobe CAS Column Address Strobe Read / Write Input WE CKE0, CKE1 Clock Enable A0-A10 BA DQ0 - DQ63 CB0-CB7 CLK0 - CLK3 DQMB0 - DQMB7 CS0 - CS3 Vcc Vss SCL SDA N.C. Clock Input Data Mask Chip Select Power (+3.3 Volt) Ground Clock for Presence Detect Serial Data Out for Presence Detect No Connection Address Format: 2M x 64 2M x 72 4M x 64 4M x 72 Part Number HYS 64V2200GU HYS 72V2200GU HYS 64V4220GU HYS 72V4220GU Rows 11 11 11 11 Columns 9 9 9 9 Banks 1 1 1 1 Refresh 4k 4k 4k 4k Period 64 ms 64 ms 64 ms 64 ms Interval 15,6 µs 15,6 µs 15,6 µs 15,6 µs Semiconductor Group 2 HYS64(72)V2200/4220GU-8/-10 SDRAM-Modules Pin Configuration PIN # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 Symbol VSS DQ0 DQ1 DQ2 DQ3 VCC DQ4 DQ5 DQ6 DQ7 DQ8 VSS DQ9 DQ10 DQ11 DQ12 DQ13 VCC DQ14 DQ15 NC (CB0) NC (CB1) VSS NC NC VCC WE DQMB0 DQMB1 CS0 DU VSS A0 A2 A4 A6 A8 A10 NC VCC VCC CLK0 PIN # 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 Symbol VSS DU CS2 DQMB2 DQMB3 DU VCC NC NC NC (CB2) NC (CB3) VSS DQ16 DQ17 DQ18 DQ19 VCC DQ20 NC DU CKE1 VSS DQ21 DQ22 DQ23 VSS DQ24 DQ25 DQ26 DQ27 VCC DQ28 DQ29 DQ30 DQ31 VSS CLK2 NC WP SDA SCL VCC PIN # 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 Symbol VSS DQ32 DQ33 DQ34 DQ35 VCC DQ36 DQ37 DQ38 DQ39 DQ40 VSS DQ41 DQ42 DQ43 DQ44 DQ45 VCC DQ46 DQ47 NC (CB4) NC (CB5) VSS NC NC VCC CAS DQMB4 DQMB5 CS1 RAS VSS A1 A3 A5 A7 A9 BA NC VCC CLK1 NC PIN # 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 Symbol VSS CKE0 CS3 DQMB6 DQMB7 NC VCC NC NC CB6 CB7 VSS DQ48 DQ49 DQ50 DQ51 VCC DQ52 NC DU NC VSS DQ53 DQ54 DQ55 VSS DQ56 DQ57 DQ58 DQ59 VCC DQ60 DQ61 DQ62 DQ63 VSS CLK3 NC SA0 SA1 SA2 VCC Note : Pinnames in brackets are for the x72 ECC versions Semiconductor Group 3 HYS64(72)V2200/4220GU-8/-10 SDRAM-Modules WE CS0 DQMB0 DQ(7:0) CS WE DQM DQ0-DQ7 D0 CS WE DQMB1 DQ(15:8) DQM DQ0-DQ7 D1 CS WE DQM CB(7:0) CS2 DQMB2 DQ(23:16) CS WE DQM DQ0-DQ7 D2 CS WE DQMB3 DQ(31:24) DQM DQ0-DQ7 D3 D0 - D7,(D8) D0 - D7,(D8) C0-C7,(C8) VSS RAS CAS CKE0 D0 - D7,(D8) D0 - D7,(D8) D0 - D7,(D8) CLK0 CLK1 CLK2 CLK3 Clock Wiring 2M x 64 2M x 72 4 SDRAM+3.3pF 5 SDRAM Termination Termination 4 SDRAM+3.3pF 4 SDRAM+3.3pF Termination Termination D0 - D7,(D8) E2PROM (256wordx8bit) SA0 SA1 SA2 SCL SA0 SA1 SA2 SCL DQMB7 DQ(63:56) DQM DQ0-DQ7 D7 DQMB6 DQ(55:48) DQM DQ0-DQ7 D6 CS WE CS WE DQ0-DQ7 D8 DQMB5 DQ(47:40) DQM DQ0-DQ7 D5 DQMB4 DQ(39:32) DQM DQ0-DQ7 D4 CS WE CS WE A0-A10,BA VCC SDA WP 47k Note: D8 is only used in the x72 ECC version Block Diagram for 2M x 64/72 SDRAM DIMM modules (HYS64/72V2200GU) Semiconductor Group 4 HYS64(72)V2200/4220GU-8/-10 SDRAM-Modules CS1 CS0 CS DQMB0 DQ(7:0) DQM DQ0-DQ7 D0 CS DQMB1 DQ(15:8) DQM DQM DQM DQ0-DQ7 D8 CS DQMB5 DQ(47:40) DQM CS DQMB4 DQ(39:32) DQM DQ0-DQ7 D4 CS DQM CS DQM DQ0-DQ7 D12 CS CS DQ0-DQ7 DQ0-DQ7 D1 D9 CS DQM DQ0-DQ7 D16 CS DQM DQ0-DQ7 D17 DQ0-DQ7 DQ0-DQ7 D5 D13 CB(7:0) CS3 CS2 CS DQMB2 DQ(23:16) DQM DQ0-DQ7 D2 CS DQMB3 DQ(31:24) DQM DQ0-DQ7 D3 DQM DQM CS DQMB6 DQ(55:48) DQM DQ0-DQ7 D10 CS DQMB7 DQ(63:56) DQM DQ0-DQ7 D11 CS DQM DQ0-DQ7 D6 CS DQM DQ0-DQ7 D7 CS DQ0-DQ7 D14 CS DQ0-DQ7 D15 A0-A10,BA VDD VSS D0 - D15,(D16,D17) D0 - D15,(D16,D17) C0-C31,(C32..C35) D0 - D7,(D8) D0 - D15,(D16,D17) D0 - D7,(D16) VDD E2PROM (256wordx8bit) SA0 SA1 SA2 SCL SA0 SA1 SA2 SCL SDA WP 47k RAS, CAS, WE CKE0 10k CKE1 D9 - D15,(D17) CLK0 CLK1 CLK2 CLK3 Clock Wiring 4M x 64 4M x 72 4 SDRAM+3.3pF 5 SDRAM 4 SDRAM+3.3pF 5 SDRAM 4 SDRAM+3.3pF 4 SDRAM+3.3pF 4 SDRAM+3.3pF 4 SDRAM+3.3pF Note: D16 & D17 is only used in the x72 ECC version and all resistor values are 10 Ohms except otherwise noted. Block Diagram for 4M x 64/72 SDRAM DIMM modules (HYS64/72V4220GU) Semiconductor Group 5 HYS64(72)V2200/4220GU-8/-10 SDRAM-Modules DC Characteristics TA = 0 to 70 °C; VSS = 0 V; VDD,VDDQ = 3.3 V ± 0.3 V Parameter Input high voltage Input low voltage Output high voltage ( IOUT = – 2.0 mA) Output low voltage ( IOUT = 2.0 mA) Input leakage current, any input (0 V < VIN < 3.6 V, all other inputs = 0 V) Output leakage current (DQ is disabled, 0 V < VOUT < VCC) Symbol Limit Values min. max. Vcc+0.3 0.8 – 0.4 40 40 V V V V µA µA 2.0 – 0.5 2.4 – – 40 – 40 Unit V IH V IL VOH VOL II(L) IO(L) Capacitance TA = 0 to 70 °C; VDD = 3.3 V ± 0.3 V, f = 1 MHz Parameter Symbol Limit Values max. max. max. max. 2Mx64 2Mx72 4Mx64 4Mx72 Input capacitance (A0 to A10, BA, RAS, CAS, WE ) Unit CI1 CI2 CICL CI3 CI4 CIO Csc Csd 45 20 22 22 13 13 8 10 55 25 38 38 13 12 8 10 80 30 22 50 20 20 8 10 90 35 38 55 20 20 8 10 pF pF pF pF pF pF pF pF Input capacitance (CS0 -CS3 ) Input capacitance ( CLK0 - CLK3) Input capacitance (CKE0, CKE1) Input capacitance (DQMB0 - DQMB7) Input / Output capacitance (DQ0-DQ63,CB0-CB7) Input Capacitance (SCL,SA0-2) Input/Output Capacitance Semiconductor Group 6 HYS64(72)V2200/4220GU-8/-10 SDRAM-Modules Standby and Refresh Currents (Ta = 0 to 70 oC, VCC = 3.3V ± 0.3V) 1) Parameter Operating Current Symbol Icc1 Test Condition Burst length = 4, CL=3 trc>=trc(min.), tck>=tck(min.), Io=0 mA 2 bank interleave operation CKE=tck(min.) CKE=VIH(min), tck>=tck (min.), input changed once in 3 cycles CKE>=VIH(min), tck=infinite, no input change CKE=tck(min.) CKE=VIH(min), tck>=tck (min.) input changed one time CKE=>VIH(min),tck=infinite, no input change X64 800 X72 900 mA Note max. 1,2 Precharged Standby Current in Power Down Mode Precharged Standby Current in Nonpower Down Mode Active Standby Current in Power Down Mode Active Standby Current in Nonpower Down Mode Burst Operating Current Icc2P Icc2PS Icc2N Icc2NS Icc3P Icc3PS Icc3N Icc3NS Icc4 24 16 160 80 24 16 200 120 760 27 18 180 90 27 18 225 135 855 mA mA mA CS= High mA mA mA mA CS= High mA mA 1,2 Burst length = full page, trc = infinite, CL = 3, tck>=tck (min.), Io = 0 mA 2 banks activated trc>=trc(min) CKE=