SI2401-FS

Si2401 V. 22 B I S I S O M O D E M ® W I T H I N T E G R A T E D G L O B A L D A A Features Data modem formats 2400 bps: V.22bis 1200 bps: V.22, V.23, Bell 212A 300 bps: V.21, Bell 103 Fast connect and V.23 reversing SIA and other security protocols Integrated third-generation DAA Fewer external components required Over 5000 V capacitive isolation Parallel phone detect Globally-compliant line interface 27 MHz CLKIN support Caller ID detection and decoding UART with flow control AT command set support Call progress support 3.3 V Power Lead-free, RoHS-compliant packages Ordering Information See page 72. Applications Set-top boxes Point-of-sale ATM terminals Security systems Medical monitoring Power meters Pin Assignments Si2401 CLKIN/XTALI XTALO GPIO5/RI VD RXD TXD CTS RESET 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 GPIO1/EOFR GPIO2/CD GPIO3/ESC VA GND GPIO4/INT/AOUT C1A C2A Description The Si2401 ISOmodem® is a complete, two-chip 2400 bps modem integrating Silicon Labs’ third-generation direct access arrangement (DAA), which provides a globally-programmable telephone line interface with an unprecedented level of integration. Available in two 16-pin SOIC packages, this compact solution eliminates the need for a separate DSP data pump, modem controller, codec, isolation transformer, relay, opto-isolators, and 2–4 wire hybrid. The Si2401 provides conventional data formats at connect rates of up to 2400 bps with fullduplex operation over the Public Switched Telephone Network (PSTN). Additionally, the Si2401 is fully-programmable to meet global standards with a single design. Other features include fast connect times for electronic point-ofsale (EPOS) applications and alarm protocols for security systems. The device is ideal for embedded modem applications due to its small size, low external component count, and low power consumption. Si3010 QE DCT RX IB C1B C2B VREG 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 DCT2 IGND DCT3 QB QE2 SC VREG2 RNG2 Functional Block Diagram Si2401 UART RXD TXD CTS RESET EOFR/GPIO1 CD/GPIO2 ESC/GPIO3 INT/GPIO4 RI/GPIO5 XTALI XOUT Clock Interface Control Interface Si3010 RX RNG1 µ Controller (AT Decoder, Call Progress) Isolation Interface Hybrid, AC and DC Terminations Isolation Interface DSP (Data Pump) IB SC DCT VREG VREG2 DCT2 DCT3 U.S. Patent #5,870,046 U.S. Patent #6,061,009 Other patents pending Ring Detect Off-Hook RNG1 RNG2 QB QE QE2 Rev. 1.0 12/05 Copyright © 2005 by Silicon Laboratories Si2401 This information applies to a product under development. Its characteristics and specifications are subject to change without notice. S i2401 2 Rev. 1.0 S i2401 TA B L E O F C O N T E N TS Section Page 1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 2. Typical Application Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3. Bill of Materials: Si2401/10 Chipset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.1. Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.2. Configurations and Data Rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.3. Low Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.4. Global DAA Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.5. Parallel Phone Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.6. Interrupt Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.7. V.23 Operation/V.23 Reversing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.8. V.42 HDLC Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.9. Fast Connect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 4.10. Clock Generation Subsystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5. AT Command Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 5.1. Command Line Execution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5.2. End-Of-Line Character . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5.3. AT Command Set Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 5.4. Alarm Industry AT Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.5. Modem Result Codes and Call Progress . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 6. Low Level DSP Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31 6.1. DSP Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 6.2. Call Progress Filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 7. S Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 8. Pin Descriptions: Si2401 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .69 9. Pin Descriptions: Si3010 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .71 10. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 11. Package Outline: 16-Pin SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .74 Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .76 Rev. 1.0 3 S i2401 1. Electrical Specifications Table 1. Recommended Operating Conditions Parameter1 Ambient Temperature Si2401 Supply Voltage, Digital 3 Symbol TA VD Test Condition F-Grade Min2 0 3.0 Typ 25 3.3 Max2 70 3.6 Unit °C V Notes: 1. The Si2401 specifications are guaranteed when the typical application circuit (including component tolerance) and Si2401 and Si3010 are used. See "2. Typical Application Schematic" on page 10. 2. All minimum and maximum specifications are guaranteed and apply across the recommended operating conditions. Typical values apply at nominal supply voltages and an operating temperature of 25 °C unless otherwise stated. 3. The digital supply, VD, operates from 3.0 to 3.6 V. The Si2401 interface supports 5 V logic (CLKIN/XTALI supports 3.3 V logic only). 4 Rev. 1.0 S i2401 Table 2. Loop Characteristics (VD = 3.0 to 3.6 V, TA = 0 to 70 °C for F-Grade, see Figure 1 on page 6) Parameter DC Termination Voltage DC Termination Voltage DC Termination Voltage DC Termination Voltage DC Termination Voltage DC Termination Voltage DC Termination Voltage On-Hook Leakage Current Operating Loop Current Operating Loop Current DC Ring Current Ring Detect Voltage* Ring Detect Voltage Ring Frequency Ringer Equivalence Number * Symbol VTR VTR VTR VTR VTR VTR VTR ILK ILP ILP Test Condition IL = 20 mA, ILIM = 0 DCV = 00, MINI = 11, DCR = 0 IL = 120 mA, ILIM = 0 DCV = 00, MINI = 11, DCR = 0 IL = 20 mA, ILIM = 0 DCV = 11, MINI = 00, DCR = 0 IL = 120 mA, ILIM = 0 DCV = 11, MINI = 00, DCR = 0 IL = 20 mA, ILIM = 1 DCV = 11, MINI = 00, DCR = 0 IL = 60 mA, ILIM = 1 DCV = 11, MINI = 00, DCR = 0 IL = 50 mA, ILIM = 1 DCV = 11, MINI = 00, DCR = 0 VTR = –48 V MINI = 00, ILIM = 0 MINI = 00, ILIM = 1 dc current flowing through ring detection circuitry Min — 9 — 9 — 40 — — 10 10 — 12 18 15 — Typ — — — — — — — — — — 1.5 15 21 — — Max 6.0 — 7.5 — 7.5 — 40 5 120 60 3 18 25 68 0.2 Unit V V V V V V V µA mA mA µA VRMS VRMS Hz VRD VRD FR REN RT = 0 RT = 1 *Note: The ring signal is guaranteed to not be detected below the minimum. The ring signal is guaranteed to be detected above the maximum. Rev. 1.0 5 S i2401 Table 3. DC Characteristics* (VD = 3.0 to 3.6 V, TA = 0 to 70°C for F-Grade) Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Low Level Output Voltage, GPIO1–4 Input Leakage Current Pullup Resistance Pins 5, 7, 11, 14 Power Supply Current, Digital Power Supply Current, DSP Powerdown Power Supply Current, Wake-On-Ring Power Supply Current, Total Powerdown Symbol VIH VIL VOH VOL VOL IL RPU ID ID ID ID Test Condition Min 2.0 — Typ — — — — — — 100 10 8 7 100 Max — 0.8 — 0.35 0.6 10 200 15 12 10 — Unit V V V V V µA kΩ mA mA mA µA IO = –2 mA IO = 1 mA IO = 10 mA 2.4 — — –10 50 VD pin VD pin VD pin VD pin — — — — *Note: Measurements are taken with inputs at rails and no loads on outputs. TIP + 600 Ω IL 1 0 µF Si3010 V TR – RING Figure 1. Test Circuit for Loop Characteristics 6 Rev. 1.0 S i2401 Table 4. AC Characteristics (VD = 3.0 to 3.6 V, TA = 0 to 70 °C for F-Grade, Fs = 8 kHz) Parameter Sample Rate Clock Input Frequency Clock Input Frequency Receive Frequency Response Receive Frequency Response Transmit Full Scale Level1 Receive Full Scale Dynamic Range3 Dynamic Range3 Dynamic Range3 Transmit Total Harmonic Distortion4 Transmit Total Harmonic Distortion4 Receive Total Harmonic Distortion4 Receive Total Harmonic Distortion4 Dynamic Range (Caller ID Mode) Level1,2 Symbol Fs FXTL FXTL Test Condition default