74LCX74TTR

74LCX74 Low voltage CMOS dual D-Type Flip Flop with 5V tolerant inputs Features ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ 5V tolerant inputs High speed: – fMAX = 150MHz (Max) at VCC = 3V Power down protection on inputs and outputs Symmetrical output impedance: – |IOH| = IOL = 24mA (Min) at VCC = 3V PCI bus levels guaranteed at 24mA Balanced propagation delays: – tPLH ≅ tPHL Operating voltage range: – VCC (Opr) = 2.0V to 3.6V Pin and function compatible with 74 series 74 Latch-up performance exceeds 500mA (JESD 17) ESD performance: – HBM > 2000V (MIL STD 883 method 3015); MM > 200V SO-14 TSSOP14 Description The 74LCX74 is a low voltage CMOS dual D-type flip flop with preset and clear non inverting fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and high speed 3.3V applications; it can be interfaced to 5V signal environment for inputs. A signal on the D INPUT is transferred to the Q OUTPUT during the positive going transition of the clock pulse. CLR and PR are independent of the clock and accomplished by a low setting on the appropriate input. It has same speed performance at 3.3V than 5V AC/ACT family, combined with a lower power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. Order codes Part number 74LCX74MTR 74LCX74TTR Package SO-14 TSSOP14 Packaging Tape and reel Tape and reel July 2006 Rev 8 1/17 www.st.com 17 Contents 74LCX74 Contents 1 Logic symbols and I/O equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 2.2 2.3 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.1 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 5 6 7 8 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2/17 74LCX74 Logic symbols and I/O equivalent circuit 1 Logic symbols and I/O equivalent circuit Figure 1. IEC logic symbols Figure 2. Input and output equivalent circuit 1.1 Logic diagram Figure 3. Logic diagram Note: This logic diagram has not to be used to estimate propagation delays 3/17 Pin settings 74LCX74 2 2.1 Pin settings Pin connection Figure 4. Pin connection (top through view) 2.2 Pin description Table 1. Pin description Pin N° 1, 13 2, 12 3, 11 4, 10 5, 9 6, 8 7 14 Symbol 1CLR, 2CLR 1D, 2D 1CK, 2CK 1PR, 2PR 1Q, 2Q 1Q, 2Q GND VCC Name and function Asynchronous reset - direct input Data inputs Clock input (LOW to HIGH, Edge Triggered) Asynchronous set - direct input True Flip-Flop outputs Complement Flip-Flop outputs Ground (0V) Positive supply voltage 2.3 Truth table Table 2. Truth table Inputs CLR L H L H H H 1. X do not care Outputs D X X X L H X (1) CK X X X Q L H H L H Qn Q H L H H L Qn PR H L L H H H Function CLEAR PRESET No change 4/17 74LCX74 Maximum rating 3 Maximum rating stressing the device above the rating listed in the “absolute maximum ratings” table may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. refer also to the STMicroelectronics sure program and other relevant quality documents. Table 3. Absolute maximum ratings Symbol VCC VI VO VO IIK IOK IO ICC IGND Tstg TL Supply voltage DC input voltage DC output voltage (VCC = 0V) DC output voltage (high or low state) (1) DC input diode current DC output diode current (2) DC output current DC supply current per supply pin DC ground current per supply pin Storage temperature Lead temperature (10 sec) Parameter Value -0.5 to +7.0 -0.5 to +7.0 -0.5 to +7.0 -0.5 to VCC + 0.5 -50 -50 ± 50 ± 100 ± 100 -65 to +150 300 Unit V V V V mA mA mA mA mA °C °C 1. IO absolute maximum rating must be observed 2. VO < GND 3.1 Recommended operating conditions Table 4. Recommended operating conditions Symbol VCC VI VO VO IOH, IOL IOH, IOL Top dt/dv Supply voltage Input voltage Output voltage (VCC = 0V) Output voltage (high or low state) High or low level output current (VCC = 3.0 to 3.6V) High or low level output current (VCC = 2.7V) Operating temperature Input Rise and Fall Time (2) (1) Parameter Value 2.0 to 3.6 0 to 5.5 0 to 5.5 0 to VCC ± 24 ± 12 -40 to 85 0 to 10 Unit V V V V mA mA °C ns/V 1. Truth table guaranteed: 1.5V to 3.6V 2. VIN from 0.8V to 2V at VCC = 3.0V 5/17 Electrical characteristics 74LCX74 4 Electrical characteristics Table 5. DC specifications Test condition Symbol Parameter VCC (V) Value -40 to 85°C Min 2.0 2.7 to 3.6 VIL Low level input voltage 2.7 to 3.6 VOH High level output voltage 2.7 3.0 2.7 to 3.6 VOL Low level output voltage 2.7 3.0 II Ioff ICC ∆ICC Input leakage current 2.7 to 3.6 Power OFF leakage current Quiescent supply current I incr. per Input 0 IO=-100 µA IO=-12 mA IO=-18 mA IO=-24 mA IO=100 µA IO=12 mA IO=16 mA IO=24 mA VI = 0 to 5.5V VI or VO = 5.5V VI = VCC or GND VI or VO= 3.6 to 5.5V 2.7 to 3.6 VIH = VCC - 0.6V VCC-0.2 2.2 V 2.4 2.2 0.2 0.4 V 0.4 0.55 ±5 10 10 ± 10 500 µA µA µA µA 0.8 V Max V Unit VIH High level input voltage 2.7 to 3.6 Table 6. Dynamic switching characteristics Test condition Symbol Parameter VCC (V) 3.3 CL = 50pF VIL = 0V, VIH = 3.3V Value TA = 25 °C Min Typ 0.8 V -0.8 Max Unit VOLP VOLV Dynamic low level quiet output (1) 1. Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to HIGH. The remaining output is measured in the LOW state. 6/17 74LCX74 Electrical characteristics Table 7. AC electrical characteristics Test condition Symbol Parameter VCC (V) 2.7 3.0 to 3.6 2.7 3.0 to 3.6 2.7 3.0 to 3.6 2.7 3.0 to 3.6 2.7 3.0 to 3.6 2.7 3.0 to 3.6 2.7 3.0 to 3.6 50 500 2.5 50 500 2.5 50 500 2.5 50 500 2.5 50 500 2.5 CL (pF) RL (Ω) ts = tr (ns) Value -40 to 85 °C Min 1.5 1.5 1.5 1.5 2.5 2.5 1.5 1.5 3.0 3.0 0 0 150 1.0 ns ns ns Max 8.0 7.0 8.0 7.0 ns ns Unit Propagation delay tPLH tPHL time (CK to Q or Q) Propagation delay tPLH tPHL time (PR or CLR to Q or Q) tS Setup time, HIGH or LOW level D to CK Hold time, HIGH or LOW level D to CK CK Pulse width, HIGH or LOW PR or CLR Pulse Width, LOW Recovery time PR or CLR to CK Clock pulse frequency Output to output skew time (1) (2) th tW trec fMAX tOSLH tOSHL 50 50 50 500 500 500 2.5 2.5 2.5 ns MHz ns 1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction, either HIGH or LOW (tOSLH = | tPLHm - tPLHn|, tOSHL = | tPHLm - tPHLn|) 2. Parameter guaranteed by design Table 8. Capacitive characteristics Test condition Symbol Parameter VCC (V) 3.3 3.3 VIN = 0 to VCC fIN = 10MHz VIN = 0 or VCC Value TA = 25 °C Min Typ 6 40 Max pF pF Unit CIN CPD Input capacitance Power dissipation capacitance (1) 1. CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/2 (per gate) 7/17 Test circuit 74LCX74 5 Test circuit Figure 5. Test circuit CL = 50pF or equivalent (includes jig and probe capacitance) RL = 500Ω or equivalent RT = ZOUT of pulse generator (typically 50Ω) 6 Waveforms Figure 6. Propagation delays, setup and hold times (f = 1MHz; 50% duty cycle) 8/17 74LCX74 Figure 7. Propagation delays (f=1MHz; 50% duty cycle) Waveforms Figure 8. Recovery times (f=1MHz; 50% duty cycle) 9/17 Waveforms Figure 9. Pulse width (f=1MHz; 50% duty cycle) 74LCX74 10/17 74LCX74 Package mechanical data 7 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 11/17 Package mechanical data 74LCX74 SO-14 MECHANICAL DATA DIM. A A1 A2 B C D E e H h L k ddd 5.8 0.25 0.4 0° mm. MIN. 1.35 0.1 1.10 0.33 0.19 8.55 3.8 1.27 6.2 0.50 1.27 8° 0.100 0.228 0.010 0.016 0° TYP MAX. 1.75 0.25 1.65 0.51 0.25 8.75 4.0 MIN. 0.053 0.004 0.043 0.013 0.007 0.337 0.150 0.050 0.244 0.020 0.050 8° 0.004 inch TYP. MAX. 0.069 0.010 0.065 0.020 0.010 0.344 0.157 0016019D 12/17 74LCX74 Package mechanical data TSSOP14 MECHANICAL DATA mm. DIM. MIN. A A1 A2 b c D E E1 e K L 0˚ 0.45 0.60 0.05 0.8 0.19 0.09 4.9 6.2 4.3 5 6.4 4.4 0.65 BSC 8˚ 0.75 0˚ 0.018 0.024 1 TYP MAX. 1.2 0.15 1.05 0.30 0.20 5.1 6.6 4.48 0.002 0.031 0.007 0.004 0.193 0.244 0.169 0.197 0.252 0.173 0.0256 BSC 8˚ 0.030 0.004 0.039 MIN. TYP. MAX. 0.047 0.006 0.041 0.012 0.0089 0.201 0.260 0.176 inch A A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0080337D 13/17 Package mechanical data 74LCX74 Tape & Reel SO-14 MECHANICAL DATA mm. DIM. MIN. A C D N T Ao Bo Ko Po P 6.4 9 2.1 3.9 7.9 12.8 20.2 60 22.4 6.6 9.2 2.3 4.1 8.1 0.252 0.354 0.082 0.153 0.311 TYP MAX. 330 13.2 0.504 0.795 2.362 0.882 0.260 0.362 0.090 0.161 0.319 MIN. TYP. MAX. 12.992 0.519 inch 14/17 74LCX74 Package mechanical data Tape & Reel TSSOP14 MECHANICAL DATA mm. DIM. MIN. A C D N T Ao Bo Ko Po P 6.7 5.3 1.6 3.9 7.9 12.8 20.2 60 22.4 6.9 5.5 1.8 4.1 8.1 0.264 0.209 0.063 0.153 0.311 TYP MAX. 330 13.2 0.504 0.795 2.362 0.882 0.272 0.217 0.071 0.161 0.319 MIN. TYP. MAX. 12.992 0.519 inch 15/17 Revision history 74LCX74 8 Revision history Table 9. Revision history Date 15-Sep-2004 10-Jul-2006 Revision 7 8 Changes Ordering codes revision - pag. 1. New template, temperature ranges updated 16/17 74LCX74 Please Read Carefully: Information in this document is provided solely in connection with ST products. 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