LNBP11LPUR

LNBP8L - LNBP9L LNBP10L - LNBP11L LNB supply and control voltage regulator Preliminary data Features ■ Simplest integrated solution for LNB remote supply and control ■ 500 mA guaranteed output current ■ Dual input supply for reducing power dissipation (DFN package) ■ 3-state function to enable/disable and select the output voltage level through a single pin ■ Fast oscillator startup for DiSEq™ encoding (LNBP9L/11L versions) ■ External 22 kHz modulation input pin (LNBP8L/10L versions) ■ Cable length compensation, LLC pin (LNBP10L, LNBP11L versions) ■ Short-circuit and over-temperature protection ■ LNB overload and short-circuit dynamic protection (LNBP10L, LNBP11L versions) ■ Available in DFN8 (5 x 6 mm) and IPPAK packages Description Intended for analog and digital satellite receivers, the LNBP is a monolithic linear voltage regulator, assembled in the DFN8 5x6 and IPPAK packages, specifically designed to provide the powering voltages and the interfacing signals to the LNB down-converter. The regulator output can be logic controlled for 13 V or 18 V (typ.) by means of the EN/VSEL 3-state pin for remotely controlling the LNB. When the IC is powered and put in standby (EN/VSEL pin at high impedance), the regulator output is disabled. In order to reduce power dissipation, the LNBP10L/11L versions (on DFN package) feature 2 supply inputs: VCC1 and VCC2. These pins must be powered, respectively, at 15 V (min.) and 22 V (min.), and an internal switch will automatically select the appropriate supply voltage according to the selected output voltage. The LNBP8L/9L versions (in the IPPAK package) have only one supply input pin, which must be November 2008 IPPAK DFN8 (5 x 6 mm) supplied at 22 V (min.). Additionally, the LNBP10L/11L versions have the LLC pin to increment the selected output voltage value by 1 V (typ.) to compensate for the excess voltage drop along the coaxial cable (LLC pin HIGH). An analog 22 kHz modulation input pin (EXTM) is available in the LNBP8L and LNBP10L versions. An appropriate DC blocking capacitor must be used to couple the modulating signal source to the EXTM pin. The LNBP10L/11L versions are also equipped with over-current dynamic protection: as soon as an overload is detected the output is shut down for the time TOFF, which is determined by the capacitor connected between the CEXT pin and GND. After the time has elapsed, the output is resumed for a time TON = (1/12)*TOFF (typ.). If the overload is still present, the protection circuit will cycle again through TOFF and TON until the overload is removed. A typical TON+TOFF value is 1100 ms when a 4.7 µF external capacitor is used on the CEXT. This dynamic operation can greatly reduce the power dissipation in short-circuit condition, while ensuring excellent power-on startup even with highly capacitive loads on the LNB outputs. The device is packaged in the IPPAK for throughhole mounting and in the DFN8 5x6 for surface mounting. Both package solutions are offered in two versions: with ten pins (LNBP9L/11L) to use with the integrated 22 kHz tone generator, or with the EXTM pin (LNBP8L/10L) to use external 22 kHz sources. All versions have built-in thermal protection to prevent overheating damage. Rev 1 This is preliminary information on a new product in development or undergoing evaluation. Details are subject to change without notice. 1/21 www.st.com 21 Contents LNBP8L - LNBP9L - LNBP10L - LNBP11L Contents 1 Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 Typical application circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6 Detailed description and application hints . . . . . . . . . . . . . . . . . . . . . . . 9 6.1 Input voltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6.2 Single supply for the DFN package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6.3 IPPAK mounting and thermal considerations . . . . . . . . . . . . . . . . . . . . . . 11 7 Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 9 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2/21 LNBP8L - LNBP9L - LNBP10L - LNBP11L 1 Diagram Figure 1. Block diagram Diagram VCC1 VCC2 RSENSE EN/VSEL TRISTATE ENABLE & VOUT SELECTION VOLTAGE REFERENCE LLC OUTPUT CEXT DYNAMIC CURRENT LIMIT THERMAL PROTECTION TEN 22kHz 22KHz OSCILLATOR EXTM LNBP8L/9L/10L/11L GND 3/21 Pin configuration LNBP8L - LNBP9L - LNBP10L - LNBP11L 2 Pin configuration Figure 2. Pin connections (top view for IPPAK, bottom view for DFN8) DFN8 (5x6 mm) IPPAK Table 1. Pin description Pin n° (DFN) LNBP10/11L 1 Pin n° (IPPAK) LNBP8/9L - Name Pin function Supply input 1: 15 V to 25 V supply. For DFN package it is VCC1 automatically selected when VOUT = 13 V. For IPPAK package (not available for VCC1 and VCC2 are internally connected together to pin 1 to be IPPAK) supplied at 22 V min. Supply input 2: 22 V to 25 V supply. For DFN package it is automatically selected when VOUT = 18 V. For IPPAK package VCC1 and VCC2 are internally connected together to the pin 1 to be supplied at 22 V min. 2 1 VCC2 (VCC pin for IPPAK) 3 2 OUTPUT Output: regulator output. It is 13 V typ when EN/VSEL LOW and 18 V typ when EN/VSEL HIGH. 4, ePAD 3, ePAD GROUND GROUND EN/VSEL Enable and output voltage selection 3-state pin: logic control input 3-state pin for the remote controlling of the LNB; if LOW VOUT = 13 V, when HIGH VOUT = 18 V, if left at high impedance the IC is set in shut down mode (VOUT = 0 V) Tone enable (LNBP9-11): logic control input to enable internal tone generator. External modulation (LNBP8-10): Needs DC decoupling to the AC source. If not used can be left floating. 6 4/21 4 5 5 EXTM/TEN 8 NA LLC LLC: logic control input to add 1 V typ. 7 NA CEXT CEXT: timing capacitor used by the dynamic overload protection. Typical application is 4.7 µF for a 1100 ms cycle LNBP8L - LNBP9L - LNBP10L - LNBP11L Maximum ratings 3 Maximum ratings Table 2. Absolute maximum ratings Symbol Parameter VCC1, VCC2 VCC1-OUTPUT Input voltages Value Unit -0.3 to 28 V (1) -0.3 to 25 V voltage (1) -0.3 to 25 V VCC1 voltage with respect to OUTPUT voltage VCC2-OUTPUT VCC2 voltage with respect to OUTPUT EN/VSEL, TEN, LLC Logic input voltage -0.3 to 7 V External modulation input voltage -0.3 to 1 V Output voltage -0.3 to 25 V Storage temperature range -50 to 150 °C 2 kV EXTM OUTPUT TSTG ESD DFN package ESD IPPAK package ESD rating with human body model (HBM) for all pins except 1, 2, 6 ESD rating with human body model (HBM) for pins 1, 2, 6 1.5 ESD rating with human body model (HBM) for all pins except 1, 4 2 ESD rating with human body model (HBM) for pins 1, 4 kV 1.5 1. Exposure beyond the VCC1 and VCC2 with respect to OUTPUT absolute-maximum-rated voltages during OUTPUT pin overload or short-circuit to GROUND may cause permanent damage to the device. Note: Absolute maximum ratings are those values beyond which damage to the device may occur. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to network ground terminal unless otherwise stated. Table 3. Operating ratings Symbol Value Unit Operating junction temperature range 0 to 125 °C VCC1 Input voltage 15 to 25 V VCC2 Input voltage 22 to 25 V TJ Table 4. Symbol Parameter Thermal data Parameter RthJA Thermal resistance junction-ambient RthJC Thermal resistance junction-case IPPAK 8 DFN8 Unit 35 (mounted on PCB 2s2p) °C/W °C/W 5/21 Electrical characteristics LNBP8L - LNBP9L - LNBP10L - LNBP11L 4 Electrical characteristics Table 5. Electrical characteristics Refer to the typical application circuits in Figure 3 and Figure 4, VCC1 = 16 V, VCC2 = 23 V (1), EN/VSEL = LOW, TEN = LLC = LOW, EXTM = FLOATING, IOUT = 50 mA, TJ = 0 °C to 85 °C, unless otherwise stated. Typical values are referred to TJ = 25 °C Symbol VCC1 VCC2 VOUT Parameter VCC supply input 1 VCC supply input 2 Test conditions (1) (1) Output voltage Min Typ Max IOUT = 500 mA, TEN=HIGH, EN/VSEL=LOW, LLC=LOW 15 25 IOUT = 500 mA, TEN=HIGH, EN/VSEL=LOW, LLC= HIGH 16 25 IOUT = 500 mA, TONE=HIGH, EN/VSEL=HIGH, LLC=LOW 22 25 IOUT = 500 mA, TONE=HIGH, EN/VSEL=HIGH, LLC= HIGH 23 25 Unit V V IOUT = 500 mA, EN/VSEL=LOW 12.5 13.25 14 V IOUT = 500 mA, EN/VSEL=HIGH 17 18 19 V IOUT = 500 mA, EN/VSEL=LOW, LLC=HIGH (2) 14.25 V IOUT = 500 mA, EN/VSEL=LLC=HIGH (2) 19 V ΔVOUT Line regulation (1) VCC1 from 15 V to 18 V, EN/VSEL=LOW or HIGH 5 40 mV ΔVOUT Load regulation VCC1 = VCC2 = 22 V, IOUT from 50 mA to 500 mA, EN/VSEL=LOW or HIGH 50 150 mV 550 700 850 mA IMAX Output current limiting FTONE Tone frequency TEN=High 20 22 24 kHz ATONE Tone amplitude TEN=High 0.4 0.65 0.9 VPP DTONE Tone duty cycle TEN=High 40 50 60 % 5 10 15 µs 4.5 5.5 6.5 (3) tr, tf Tone Rise and Fall Time TEN=High GEXTM External modulation Gain Δ VOUT/Δ VEXTM, freq. from 10 kHz to 40 kHz VEXTM External modulation input AC Coupling voltage ZEXTM External modulation impedance Freq. from 10 kHz to 40 kHz VILT Control input logic LOW threshold for 3-state pin EN/VSEL 0.8 1 1.2 V VIHT Control input logic HIGH threshold for 3-state pin EN/VSEL 1.8 2 2.2 V IIHT 3-state control pin input current HIGH VIHT = 5 V, EN/VSEL 6/21 400 Ω 400 -400 mVPP µA LNBP8L - LNBP9L - LNBP10L - LNBP11L Table 5. Electrical characteristics Electrical characteristics (continued) Refer to the typical application circuits in Figure 3 and Figure 4, VCC1 = 16 V, VCC2 = 23 V (1), EN/VSEL = LOW, TEN = LLC = LOW, EXTM = FLOATING, IOUT = 50 mA, TJ = 0 °C to 85 °C, unless otherwise stated. Typical values are referred to TJ = 25 °C Symbol Parameter Test conditions Min. Typ. Max. Unit IILT 3-state control pin input current LOW VILT = 0 V, EN/VSEL VIL Control input logic LOW TEN, LLC VIH Control input logic HIGH TEN, LLC IIH Control pins input current VIH = 5 V, TEN, LLC 20 Output disabled EN/VSEL=High impedance (floating) 1.7 2.4 mA Output enabled EN/VSEL=HIGH, TEN=HIGH, IOUT = 500 mA 3.7 6.3 mA ICC +180 µA 0.8 2.5 V V µA Supply current TOFF Dynamic overload protection OFF time Output shorted, CEXT = 4.7 µF (2) 1000 ms TON Dynamic overload protection ON time Output shorted, CEXT = 4.7 µF (2) TOFF /12 ms IOBK Output backward current Output forced to 21 V 6 mA TSHDN Thermal shutdown threshold 165 °C ΔTSHDN Thermal shutdown hysteresis 25 °C 1. For IPPAK package VCC1 and VCC2 are internally connected to the pin 1 (VCC) to be supplied in the range from 22 V up to 25 V 2. Only DFN package 3. Guaranteed by design 7/21 Typical application circuits LNBP8L - LNBP9L - LNBP10L - LNBP11L 5 Typical application circuits Figure 3. Single input supply voltage solution for IPPAK package versions D1 1N4001 23V LNB OUTPUT VCC C1 10µF OUTPUT C2 220nF LNBP8/9L D2 C3 1N5818 100nF EN/VSEL (Tristate ) MCU I/Os EXTM or TEN GND Figure 4. Dual input supply voltage solution for DFN8 (5 x 6 mm) package versions D1 1N4001 16V LNB OUTPUT VCC1 C1 10µF 23V OUTPUT C2 220nF D3 1N4001 C3 D2 1N5818 100nF VCC2 C4 10µF LNBP10/11L C5 220nF LLC MCU I/Os CEXT C6 4.7µF EN/VSEL (Tristate ) EXTM or TEN GND Figure 5. Single input supply voltage solution for DFN8 (5 x 6 mm) package versions 23V D1 1N4001 R1 15 Ohm >3W LNB OUTPUT VCC1 C1 10µF OUTPUT C2 220nF VCC2 C4 220nF D2 1N5818 LNBP10/11L LLC MCU I/Os C3 100nF CEXT EN/VSEL (Tristate ) C5 4.7µF EXTM or TEN GND Note: 8/21 In a single supply configuration with the DFN package, an R1 resistor in the 12-15 Ω range is recommended to reduce device power dissipation during the 13 V output condition. The resistor can be omitted, but the power dissipation will increase. LNBP8L - LNBP9L - LNBP10L - LNBP11L 6 Detailed description and application hints Detailed description and application hints The LNBPxx is made up of several functional blocks (see Figure 1 on page 3), as described below: 1. The oscillator is activated by setting the ENT pin (enable tone) = H, and is factorytrimmed at 22 kHz ± 2 kHz, eliminating the need to use external trimming. The rising and falling edges are maintained in the 5 to 15 µs range (10 µs typ.), to avoid RF pollution of the receiver. The duty cycle is 50% typ. It modulates the DC output with a ± 0.325 V typ. amplitude and 0 V average. The presence of this signal usually gives the LNB information about the band to be received. 2. The 3-state enable & VOUT selection block, selects the two output voltages or sets the IC to shutdown mode, depending on the voltage applied on the EN/VSEL pin. When EN/VSEL is set high (EN/VSEL > 2.2 V), an 18 V output voltage is selected; when the EN/VSEL is set low (EN/VSEL < 0.8 V), a 13 V output voltage is selected. If the EN/VSEL pin is left floating (high impedance) or if the pin is set in a range from 1.2 V to 1.8 V (1.5 V typ.), the IC goes into shutdown mode and the output voltage will be set to 0 V. This feature changes the LNB polarization type. The LNB switches to horizontal or vertical polarization depending on the supply voltage it gets from the receiver. 3. For the DFN package, in order to keep the power dissipation of the device as low as possible, the input selector automatically selects VCC1; that is, the lowest input voltage, when 13 V output is selected (i.e. EN/VSEL is low). If the 18 V output is selected (i.e. EN/VSEL is high), the VCC2 input pin is selected. For example, power dissipation at IOUT = 350 mA is: PD = (23 - 18) x 0.35 = 1.75 W with VCC2 = 23 V (voltage on the VCC2 pin) and VOUT = 18 V, and PD = (16 - 13) x 0.35 = 1.05 W with VCC1 = 16 V (voltage on the VCC1 pin) and VOUT = 13 V For IPPAK package, VCC1 and VCC2 are internally connected and must be supplied from a single input voltage line (22 V min.) to the VCC pin. In this case the worst case power dissipation is 13 V output. For example: at IOUT = 350 mA and VCC = 23 V (voltage on the VCC pin): PD = (23 - 13) x 0.35 = 3.5 W 4. The line length compensation function is useful when the antenna is connected to the receiver by a long coaxial cable that adds a considerable DC voltage drop. When the LCC pin is H, the output voltage selected is increased by about 1 V. This function is available for the DFN package only. 5. The reference drives all the internal blocks that require a high-precision thermally compensated voltage source. 6. The LNBPxx has two different protection features, and both turn off the outputs. The first one protects against overheating (i.e. for TJ ≥ 150 °C), and the second against overload conditions (i.e. for output current > 550 mA) or short-circuit: a) In the thermal protection case the output is disabled until the chip temperature has fallen below 140 °C typ. and the LNBPxx output is restored. b) The overload protection case occurs when output current request is ≥ 500 mA. For the DFN package only, the IC features dynamic overload and short-circuit 9/21 Detailed description and application hints LNBP8L - LNBP9L - LNBP10L - LNBP11L protection. When an overload occurs the device limits the output current for the time TON depending on the CEXT value (see Figure 24 and Figure 25). When TON has elapsed, the output goes low for a time of TOFF = 12 x TON. This keeps the power dissipated by the device low in overload conditions, and avoids the need for an oversized heat sink in this condition. For the IPPAK package, when the overload or the short-circuit occurs, the device clamps the output current in a range between 550 mA and 850 mA. 7. EXTM modulates the VOUT by means of a capacitor connected in series (see Figure 6). The following equation is used to calculate the peak-to-peak voltage of VOUT: VOUT(AC) = VEXTM(AC) x GEXTM where VOUT(AC) and VEXTM(AC) are, respectively, the peak-to-peak voltage of VOUT and VEXTM. GEXTM is the external modulation gain. Figure 6. EXTM application circuit D1 1N4001 23V LNB OUTPUT VCC C1 10µF OUTPUT C2 220nF LNBP8/9L D2 C3 1N5818 100nF EN/VSEL (Tristate) EXTM Vextm C4 1µF 6.1 GND Input voltage protection In some cases two or more receivers share the same coaxial cable, rendering their outputs hard-paralleled, so the same voltage is present at the outputs of the receivers. If a receiver is not disconnected at the mains, a current will flow from the OUTPUT to the VCC1 or VCC2 pins, depending the EN/VSEL pin setting. To avoid this, two diodes (only one for the IPPAK package) in series are recommended at input pins VCC1 and VCC2 (see Figure 3). These diodes do not cause a change at VOUT, but only a voltage drop, which can be minimized by using Schottky diodes. Diodes used in Figure 4 and Figure 5 must withstand a continuous current of almost 1 A and a breakdown voltage of 30 V (suggested type is 1N4001 or BYV10-30). Be aware that the minimum voltage needed at the VCC pins must be respected, considering the voltage drop across the input diodes). 10/21 LNBP8L - LNBP9L - LNBP10L - LNBP11L 6.2 Detailed description and application hints Single supply for the DFN package If only one power supply source is available, the VCC1 and VCC2 pins can be powered by the same power source without affecting the performance of other circuits, at the cost of higher power losses in the device and higher heat sink surface. Also, in order to reduce the power dissipation in the device, an appropriate-value resistor can be inserted in series with the VCC1 line (see Figure 5). This resistor must be dimensioned considering that the minimum voltage on the VCC1 pin must be >= 16 V (15 V if LLC is not used). For example, with IOUT = 500 mA: R≤ (23 - V f - 16) 500 x 10 -3 ≅ 12 Ω Where Vf is the forward voltage of the input diode D1 (see Figure 5). Power dissipated in this resistor is: 2 PD = R * IOUT 2 = 12* ( 500*10 3) = 3 W It is recommended to bypass the VCC1 and VCC2 pins using 220 nF electrolytic capacitors. 6.3 IPPAK mounting and thermal considerations First, it should be noted that the tab is directly connected to the GND pin, so care must be taken when the device is connected to a heat-sink. If the heat sink is at a different voltage than the ground, an electrical insulator must be added between the tab and the heat sink at the cost of an increase in the thermal resistance. For better thermal performance, an isolated heat sink or connection to ground is recommended. 11/21 Detailed description and application hints LNBP8L - LNBP9L - LNBP10L - LNBP11L Several clips can be used depending on the heat sink type: ● Saddle clips (Figure 7) for slim heat sinks ● U-clips (Figure 8) for thick heat sinks ● Dedicated clips for special shaped heat sinks Figure 7. IPPAK mounted with a saddle clip. Figure 8. IPPAK mounted with a U-clip. Note that the thickness of the IPPAK package (2.3 +/- 0.1 mm) is similar to that of the SOT32 and SOT-82 (2.55 +/- 0.15 mm). The same clips can also be used for these packages. The junction-to-ambient thermal resistance for the IPPAK can be calculated as follows: RTH-JA = RTH-JC + RTH-CH + RTH-HA where: RTH-JC is the junction-to-case thermal resistance of the IPPAK (see Table 4: Thermal data), RTH-CH is the case-to-heat sink thermal resistance and the RTH-HA is the heat sink-toair thermal resistance. 12/21 LNBP8L - LNBP9L - LNBP10L - LNBP11L Typical performance characteristics 7 Typical performance characteristics Figure 9. (Refer to the typical application circuit, TJ from 0 to 85 °C. Typical values are referred to TJ = 25 °C). Output voltage vs. temperature Figure 10. Output voltage vs. temperature 14 14 VCC1 = 15 V VCC2 = 23 V IOUT = 50 mA VOUT = 13 V 13.6 VOUT [V] 13.4 VCC1 = 15 V VCC2 = 23 V IOUT = 500 mA VOUT = 13 V 13.8 13.6 13.4 VOUT [V] 13.8 13.2 13 12.8 12.6 13.2 13 12.8 12.6 12.4 12.4 EN/VSEL=L TEN=L, LLC=L 12.2 H = Logic High = 5 V L = Logic Low = 0 V EN/VSEL=L TEN=L, LLC=L 12.2 H = Logic High = 5 V L = Logic Low = 0 V 12 12 -10 0 10 20 30 40 50 60 70 80 -10 90 0 10 20 30 Figure 11. Output voltage vs. temperature 60 70 80 90 19 VCC1 = 15 V VCC2 = 23 V IOUT = 50 mA VOUT = 18 V 18.6 VCC1 = 15 V VCC2 = 23 V IOUT = 500 mA VOUT = 18 V 18.8 18.6 18.4 VOUT [V] 18.4 VOUT [V] 50 Figure 12. Output voltage vs. temperature 19 18.8 18.2 18 17.8 18.2 18 17.8 17.6 17.6 17.4 17.4 H = Logic High = 5 V L = Logic Low = 0 V EN/VSEL=H TEN=L, LLC=L 17.2 EN/VSEL=H TEN=L, LLC=L 17.2 H = Logic High = 5 V L = Logic Low = 0 V 17 17 -10 0 10 20 30 40 50 60 70 80 -10 90 0 10 20 30 Figure 13. Line regulation vs. temperature 50 40 30 20 10 0 -10 -20 -30 -40 -50 Load [mV] EN/VSEL=L TEN=L, LLC=L 0 10 H = Logic High = 5 V L = Logic Low = 0 V 20 30 40 T [°C] 50 60 70 80 90 Figure 14. Load regulation vs. temperature VCC1 = 16 V to 25 V VCC2 = 23 V IOUT = 50 mA VOUT = 13 V -10 40 T [°C] T [°C] Line Reg. [mV] 40 T [°C] T [°C] 50 60 70 80 90 250 200 150 100 50 0 -50 -100 -150 -200 -250 VCC1 = 15 V VCC2 = 23 V IOUT = from 50 mA to 500 mA VOUT = 13 V EN/VSEL=L TEN=L, LLC=L -10 0 10 H = Logic High = 5 V L = Logic Low = 0 V 20 30 40 50 60 70 80 90 T [°C] 13/21 Typical performance characteristics LNBP8L - LNBP9L - LNBP10L - LNBP11L Figure 15. Load regulation vs. temperature Figure 16. Output current limiting vs. temperature 250 VCC1 = 15 V VCC2 = 23 V IOUT = from 50 mA to 500 mA VOUT = 18 V 200 ILIM [mA] Load [mV] 150 100 50 0 -50 H = Logic High = 5 V L = Logic Low = 0 V EN/VSEL=H TEN=L, LLC=L -100 -150 -10 0 10 20 30 40 50 60 70 80 900 850 800 750 700 650 600 550 500 450 400 90 VCC1 = 15 V VCC2 = 23 V VOUT = 13 V EN/VSEL=L TEN=L, LLC=L -10 0 10 H = Logic High = 5 V L = Logic Low = 0 V 20 30 T [°C] Figure 17. Output current limiting vs. temperature 170 150 110 90 50 EN/VSEL=H TEN=L, LLC=L 0 H = Logic High = 5 V L = Logic Low = 0 V 10 20 30 40 50 60 70 80 30 EN/VSEL=L TEN=L, LLC=L H = Logic High = 5 V L = Logic Low = 0 V 10 90 -10 0 10 20 30 Figure 20. Tone enable VCC1 = 23 V VCC2 = 23 V IOUT = 50 mA VOUT = 13 V 1200 VCC1 = 15 V VCC2 = 23 V Cext = 4.7 µF VOUT = 13 V 1100 1000 EN/VSEL=L TEN=H, LLC=L 900 800 700 EN/VSEL=L TEN=L, LLC=L 600 -10 0 10 H = Logic High = 5 V L = Logic Low = 0 V 20 30 40 T [°C] 40 T [°C] Figure 19. Dynamic overload protection OFF time vs. temperature [ms] 90 130 T [°C] OFF 80 70 -10 T 70 VCC1 = 16 V VCC2 = 23 V Cext = 4.7 µF VOUT = 13 V 190 750 700 14/21 60 210 VCC1 = 15 V VCC2 = 23 V VOUT = 18 V 650 600 550 500 450 400 50 Figure 18. Dynamic overload protection ON time vs. temperature T [ms] ON ILIM [mA] 900 850 800 40 T [°C] 50 60 70 80 90 50 60 70 80 90 LNBP8L - LNBP9L - LNBP10L - LNBP11L Typical performance characteristics Figure 21. Tone disable Figure 22. External modulation gain vs. temperature VCC1 = 23 V VCC2 = 23 V IOUT = 50 mA VOUT = 13 V Gain EN/VSEL=L TEN=H, LLC=L 8 VCC1 = 15 V 7.5 VCC2 = 23 V 7 IOUT = 50 mA 6.5 VOUT = 13 V 6 f = 22 kHz 5.5 5 4.5 4 3.5 3 EN/VSEL=L 2.5 TEN=L, LLC=L 2 -10 0 10 H = Logic High = 5 V L = Logic Low = 0 V 20 30 40 50 60 70 80 90 T [°C] Figure 23. External modulation gain vs. frequency Figure 24. TON time vs. CEXT 400 7 6.5 300 TON [ms] 6 Gain 350 VCC1 = 15 V VCC2 = 23 V IOUT = 50 mA VOUT = 13 V 5.5 5 4.5 3.5 1000 10000 200 150 100 H = Logic High = 5 V L = Logic Low = 0 V EN/VSEL=L TEN=L, LLC=L 4 250 50 100000 0 0 5 10 15 F [Hz] CAPACITOR CEXT [µF] Figure 25. TOFF time vs. CEXT 4000 3500 TOFF [ms] 3000 2500 2000 1500 1000 500 0 0 5 10 15 CAPACITOR CEXT [µF] 15/21 Package mechanical data 8 LNBP8L - LNBP9L - LNBP10L - LNBP11L Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 26. IPPAK package dimensions 0075222 16/21 LNBP8L - LNBP9L - LNBP10L - LNBP11L Table 6. Package mechanical data IPPAK mechanical data (mm.) Dim. Min. Typ. A 2.20 2.40 A1 0.90 1.10 B 0.40 0.60 B2 5.20 5.40 B3 0.70 B5 0.30 B6 1 C 0.45 0.60 C2 0.48 0.60 D 6 6.20 E 6.40 6.60 e Note: Max. 1.27 G 4.90 5.25 G1 2.38 2.70 H 15.90 16.30 L 9 9.40 L1 0.80 1.20 L2 0.80 V1 10° 1 1 Controlling dimensions: millimeter. 2 Burrs larger than 0.25 mm are not allowed on the upper surface of the dissipater (FRONT) on the lower surface (REAR) the maximum allowed is: 0.05 mm. 3 The side of the dissipater to be connected to the external dissipater must be flat within 30 µ 4 The leads size is comprehensive of the thickness of the leads finishing material. 5 Package outline exclusive of any mold flashes dimensions and metal burrs. 6 Max resin gate protrusion: 0.5 mm. 7 Max resin protrusion: 0.25 mm. 8 The maximum bent leads allowed, in any direction, is: # 2° if the devices are packed in tube. 17/21 Package mechanical data LNBP8L - LNBP9L - LNBP10L - LNBP11L DFN8 (5x6 mm) mechanical data mm. inch. Dim. Min. Typ. Max. Min. Typ. Max. 0.80 0.90 1.00 0.032 0.035 0.039 A1 0.02 0.05 0.001 0.002 A3 0.20 A b 0.35 D D2 0.47 0.014 5.00 4.15 E E2 0.40 0.008 4.2 3.6 4.25 0.163 0.165 3.65 0.140 0.142 1.27 0.049 F 1.99 0.078 G 2.20 0.086 H 0.40 0.015 I 0.219 0.0086 0.70 0.167 0.236 e L 0.018 0.197 6.00 3.55 0.016 0.90 0.028 0.144 0.035 7286463/C 18/21 LNBP8L - LNBP9L - LNBP10L - LNBP11L Ordering information 9 Ordering information Table 7. Order codes Order codes Part numbers Packing DFN8 (5x6 mm) IPPAK LNBP8L LNBP8LIT Tape and reel LNBP9L LNBP9LIT Tape and reel LNBP10L LNBP10LPUR Tape and reel LNBP11L LNBP11LPUR Tape and reel 19/21 Revision history LNBP8L - LNBP9L - LNBP10L - LNBP11L 10 Revision history Table 8. Document revision history Date Revision 11-Nov-2008 1 20/21 Changes Initial release. LNBP8L - LNBP9L - LNBP10L - LNBP11L Please Read Carefully: Information in this document is provided solely in connection with ST products. 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