LNBP11SP-TR

LNBP20 / LNBP1X series LNBP supply and control voltage regulator (parallel interface) Feature summary ■ ■ ■ Complete interface for two LNBs remote supply and control LNB selection and stand-by function Built-in tone oscillator factory trimmed at 22KHz Fast oscillator start-up facilitates DiSEqC encoding Two supply inputs for lowest dissipation Bypass function for slave operation LNB short circuit protection and diagnostic Auxiliary modulation input extends flexibility Cable length compensation Internal over temperature protection Backward current protection via the coaxial cable. Since most satellite receivers have two antenna ports, the output voltage of the regulator is available at one of two logic-selectable output pins (LNBA, LNBB). When the IC is powered and put in Stand-by (EN pin LOW), both regulator outputs are disabled to allow the antenna downconverters to be supplied/controlled by others satellite receivers sharing the same coaxial lines. In this occurrence the device will limit at 3 mA (max) the backward current that could flow from LNBA and LNBB output pins to GND. (See continuous description). TM 10 1 ■ ■ ■ ■ ■ ■ ■ ■ PowerSO-20 PowerSO-10 Description Intended for analog and digital satellite receivers, the LNBP is a monolithic linear voltage regulator, assembled in PowerSO-20 and PowerSO-10, specifically designed to provide the powering voltages and the interfacing signals to the LNB downconverter situated in the antenna Order codes Part number LNBP10 LNBP11 LNBP12 LNBP13 LNBP14 LNBP15 LNBP16 LNBP20 May 2007 LNBP20PD-TR Rev. 10 1/24 www.st.com 24 Package PowerSO-20 PowerSO-10 LNBP10SP-TR LNBP11SP-TR LNBP12SP-TR LNBP13SP-TR LNBP14SP-TR LNBP15SP-TR LNBP16SP-TR LNBP20 / LNBP1X series Contents 1 2 3 4 5 6 7 8 9 Description (continued) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Typical application schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 2/24 LNBP20 / LNBP1X series Description (continued) 1 Description (continued) For slave operation in single dish, dual receiver systems, the bypass function is implemented by an electronic switch between the Master Input pin (MI) and the LNBA pin, thus leaving all LNB powering and control functions to the Master Receiver. This electronic switch is closed when the device is powered and EN pin is LOW. The regulator outputs can be logic controlled to be 13 or 18 V (typ.) by mean of the VSEL pin for remote controlling of LNBs. Additionally, it is possible to increment by 1V (typ.) the selected voltage value to compensate the excess voltage drop along the coaxial cable (LLC pin HIGH). In order to reduce the power dissipation of the device when the lowest output voltage is selected, the regulator has two Supply Input pins VCC1 and VCC2. They must be powered respectively at 16V (min) and 23V (min), and an internal switch automatically will select the suitable supply pin according to the selected output voltage. If adequate heatsink is provided and higher power losses are acceptable, both supply pins can be powered by the same 23V source without affecting any other circuit performance. The ENT (Tone Enable) pin activates the internal oscillator so that the DC output is modulated by a ±0.3 V, 22KHz (typ.) square wave. This internal oscillator is factory trimmed within a tolerance of ±2KHz, thus no further adjustments neither external components are required. A burst coding of the 22KHz tone can be accomplished thanks to the fast response of the ENT input and the prompt oscillator start-up. This helps designers who want to implement the DiSEqCTM protocols (a). In order to improve design flexibility and to allow implementation of newcoming LNB remote control standards, an analogic modulation input pin is available (EXTM). An appropriate DC blocking capacitor must be used to couple the modulating signal source to the EXTM pin. When external modulation is not used, the relevant pin can be left open. Two pins are dedicated to the overcurrent protection/monitoring: CEXT and OLF. The overcurrent protection circuit works dynamically: as soon as an overload is detected in either LNB output, the output is shut-down for a time toff determined by the capacitor connected between CEXT and GND. Simultaneously the OLF pin, that is an open collector diagnostic output flag, from HIGH IMPEDANCE state goes LOW. After the time has elapsed, the output is resumed for a time ton=1/15toff (typ.) and OLF goes in HIGH IMPEDANCE. If the overload is still present, the protection circuit will cycle again through toff and ton until the overload is removed. Typical ton+toff value is 1200ms when a 4.7µF external capacitor is used. This dynamic operation can greatly reduce the power dissipation in short circuit condition, still ensuring excellent power-on start up even with highly capacitive loads on LNB outputs. The device is packaged in PowerSO-20 for surface mounting. When a limited functionality in a smaller package matches design needs, a range of cost-effective PowerSO-10 solutions is also offered. All versions have built-in thermal protection against overheating damage. a. External components are needed to comply to level 2.x and above (bidirectional) DiSEqCTM bus hardware requirements. DiSEqCTM is a trademark or EUTELSAT. 3/24 Pin configuration LNBP20 / LNBP1X series 2 Figure 1. Pin configuration Pin connections (top view) PowerSO-20 PowerSO-10 Table 1. SYMBOL Pin Description PIN NUMBER vs SALES TYPE (LNBP) NAME FUNCTION 20PD 10SP 11SP 12SP 13SP 14SP 15SP 16SP VCC1 15V to 25V supply. It is Supply input automatically selected 1 when VOUT= 13 or 14V 22V to 25V supply. It is Supply input automatically selected 2 when VOUT= 18 or 19V See truth table voltage and port selection. In stand-by mode this port is powered by the MI pin via the internal bypass switch Logic control input: see truth table Logic control input: see truth table Logic control input: see truth table Circuit ground. It is internally connected to the die frame 2 1 1 1 1 1 1 VCC2 3 2 2 2 2 2 2 2 LNBA Output port 4 3 3 3 3 3 3 3 VSEL Output voltage selection:13 or 18V (typ) Port enable Port selection 5 4 4 4 4 4 4 4 EN OSEL 6 7 1 10 11 20 5 9 5 NA 5 NA 5 NA 5 NA 5 NA 5 NA GND Ground 6 6 6 6 6 6 6 4/24 LNBP20 / LNBP1X series Table 1. SYMBOL Pin configuration Pin Description PIN NUMBER vs SALES TYPE (LNBP) NAME 22KHz tone enable FUNCTION 20PD 10SP 11SP 12SP 13SP 14SP 15SP 16SP Logic control input: see truth table Timing capacitor used by the dynamic overload protection. Typical application is 4.7μF for a 1200ms cycle External modulation input. Needs DC decoupling to the AC source. if not used, can be left open. Logic control input: see truth table Logic output (open collector). Normally in HIGH IMPEDANCE, goes LOW when current or thermal overload occurs ENT 13 7 7 7 7 7 7 7 CEXT External capacitor 14 8 8 8 8 8 8 8 EXTM External modulator 15 NA NA NA 9 NA 9 9 LLC Line length compens. (1V typ) 16 NA NA 9 NA 9 NA 10 OLF Over load flag 17 NA 9 NA NA 10 10 NA MI In stand-by mode, the voltage on MI is routed to Master input LNBA pin. Can be left open if bypass function is not needed Output port See truth tables for voltage and port selection 18 NA 10 10 10 NA NA NA LNBB 19 10 NA NA NA NA NA NA Note: The limited pin availability of the PowerSO-10 package leads to drop some functions. 5/24 Maximum ratings LNBP20 / LNBP1X series 3 Table 2. Symbol VI VO IO VI ISW PD Tstg Top Maximum ratings Absolute maximum ratings Parameter DC Input voltage (VCC1, VCC2, MI) Output voltage Output current (LNBA, LNBB) Logic input voltage (ENT, EN OSEL, VSEL, LLC) Bypass switch current Power dissipation at Tcase < 85°C Storage temperature range Operating junction temperature range Value 28 -0.3 to 28 Internally Limited -0.5 to 7 900 14 -40 to +150 -40 to +125 Unit V V mA V mA W °C °C Note: Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied Thermal data Parameter Thermal resistance junction-case PowerSO-20 2 PowerSO-10 2 Unit °C/W Table 3. Symbol RthJC Table 4. Logic Controls Truth Table PIN NAME OLF ENT EN OSEL VSEL LLC OSEL X L L L L H H H H VSEL X L H L H L H L H LLCO X L L H H L L H H L IOUT > IOMAX or Tj > 150°C 22KHz tone OFF See Table Below See Table Below See Table Below See Table Below VLNBA VMI - 0.4V (typ.) 13V (typ.) 18V (typ.) 14V (typ.) 19V (typ.) Disabled Disabled Disabled Disabled H IOUT < IOMAX 22KHz tone ON See Table Below See Table Below See Table Below See Table Below VLNBB Disabled Disabled Disabled Disabled Disabled 13V (typ.) 18V (typ.) 14V (typ.) 19V (typ.) OUT IN IN IN IN IN CONTROL I/O EN L H H H H H H H H Note: 6/24 All logic input pins have internal pull-down resistor (typ. = 250KW) LNBP20 / LNBP1X series Diagram 4 Figure 2. Diagram Block diagram 7/24 Electrical characteristics LNBP20 / LNBP1X series 5 Table 5. Symbol VIN1 VIN2 VO1 VO2 ΔVO ΔVO SVR IMAX tOFF tON fTONE ATONE DTONE tr, tf GEXTM VEXTM ZEXTM VSW VOL IOZ VIL Electrical characteristics Electrical characteristics for LNBP Series (TJ = 0 to 85°C, CI = 0.22µF, CO = 0.1µF, EN=H, ENT=L, LLC=L, VIN1=16V, VIN2=23V IOUT=50mA, unless otherwise specified.) Parameter VCC1 Supply voltage VCC2 Supply voltage Output voltage Test conditions IO = 500 mA, ENT=H, VSEL=L, LLC=L IO = 500 mA, ENT=H, VSEL=L, LLC=H IO = 500 mA, ENT=H, VSEL=L, LLC=L IO = 500 mA, VSEL=L, LLC=H IO = 500 mA, VSEL=H, LLC=L IO = 500 mA, VSEL=H, LLC=H IO = 500 mA, VSEL=L, LLC=L IO = 500 mA, VSEL=L, LLC=H VIN1=15 to 18V, VOUT=13V VIN2=22 to 25V, VOUT=18V VIN1=VIN2=22V, VOUT=13 or 18V IO = 50 to 500mA VIN1 = VIN2 = 23 ± 0.5Vac, fac = 120 Hz, 500 Output Shorted, CEXT = 4.7µF Output Shorted, CEXT = 4.7µF ENT=H ENT=H ENT=H ENT=H ΔVOUT/ΔVEXTM, f = 10Hz to 40KHz AC Coupling f = 10Hz to 40KHz EN=L, ISW=300mA, VCC2-VMI=4V IOL=8mA VOH = 6V 400 0.35 0.28 0.6 0.5 10 0.8 20 0.55 40 5 12.5 Min. 15 16 22 23 17.3 18 19 13 14 4 4 80 45 650 1100 tOFF/15 22 0.72 50 10 5 400 mVPP Ω V V µA V 24 0.9 60 15 800 40 40 180 13.5 Typ. Max. 25 25 25 25 18.7 Unit V V V V V V V V mV mV mV dB mA ms ms KHz VPP % µs Output voltage Line regulation Load regulation Supply voltage rejection Output current limiting Dynamic overload protection OFF time Dynamic overload protection ON time Tone frequency Tone amplitude Tone duty cycle Tone rise and fall time External modulation gain External modulation input voltage External modulation impedance Bypass switch voltage drop (MI to LNBA) Overload flag pin logic LOW Overload flag pin OFF state leakage current Control input pin logic LOW 8/24 LNBP20 / LNBP1X series Table 5. Symbol VIH IIH ICC IOBK TSHDN Electrical characteristics Electrical characteristics for LNBP Series (TJ = 0 to 85°C, CI = 0.22µF, CO = 0.1µF, EN=H, ENT=L, LLC=L, VIN1=16V, VIN2=23V IOUT=50mA, unless otherwise specified.) Parameter Control input pin logic HIGH Control pins input current Supply current Output backward current Temperature shutdown threshold VIH = 5V Output Disabled (EN=L) ENT=H, IOUT=500mA EN=L, VLNBA = VLNBB = 18V VIN1 = VIN2 = 22V or floating Test conditions Min. 2.5 20 0.3 3.1 0.2 150 1 6 3 Typ. Max. Unit V µA mA mA mA °C 9/24 Typical characteristics LNBP20 / LNBP1X series 6 Figure 3. Typical characteristics (unless otherwise specified TJ = 25°C) Output voltage vs output current Figure 4. Tone duty cycle vs temperature Figure 5. Tone fall time vs temperature Figure 6. Tone frequency vs temperature Figure 7. Tone rise time vs temperature Figure 8. Tone amplitude vs temperature 10/24 LNBP20 / LNBP1X series Typical characteristics Figure 9. S.V.R. vs Frequency Figure 10. External modulation vs temperature Figure 11. Bypass switch drop vs output current Figure 12. LNBA External modulation gain vs frequency Figure 13. Bypass switch drop vs output current Figure 14. Overload flag pin logic low vs flag current 11/24 Typical characteristics LNBP20 / LNBP1X series Figure 15. Supply voltage vs temperature Figure 16. Supply voltage vs temperature Figure 17. Dynamic overload protection (ISC vs time) Figure 18. Tone enable Figure 19. Tone disable Figure 20. 22KHz Tone 12/24 LNBP20 / LNBP1X series Figure 21. Enable time Figure 22. Disable time Typical characteristics Figure 23. 18V to 13V Change Figure 24. 18V to 13V Change 13/24 Typical application schematics LNBP20 / LNBP1X series 7 Typical application schematics Figure 25. Two antenna ports receiver MCU+V 10uF C2 AUX DATA R1 11 EXTM VCC1 VCC2 LNBA LNBB MI CEXT 1 2 3 15 14 10 4.7µF C1 + GND 8 2x 0.1µF 2x 47nF C3 C4 C5 C6 TUNER 17V 24V ANT CONNECTORS JA 47K 13 OLF JB 4 9 5 7 12 VSEL ENT EN OSEL LLC LNBP20CR Vcc I/Os MCU I/Os Figure 26. Single antenna receiver with master receiver port 17V 10uF C2 AUX DATA R1 47K 13 11 EXTM VCC1 VCC2 LNBA LNBB MI CEXT 1 2 3 15 14 10 4.7µF C1 + GND 8 2x 0.1µF C3 C4 C5 47nF TUNER 24V MCU+V ANT OLF MASTER 4 9 5 7 12 VSEL ENT EN OSEL LLC LNBP20CR Vcc I/Os MCU I/Os 14/24 LNBP20 / LNBP1X series Typical application schematics Figure 27. Using serial bus to save MPU I/os 17V MCU+V C2 R1 47K 10uF 13 OLF VSEL ENT EN OSEL LLC LNBP20CR AUX DATA 11 EXTM VCC1 VCC2 LNBA LNBB MI CEXT 1 2 3 15 14 10 4.7µF C1 + GND 8 2x 0.1µF 2x 47nF C3 C4 C5 C6 TUNER ANT CONNECTORS JA 24V JB 1 2 3 15 STR D CLK OE Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 QS QS 4 5 6 7 14 13 12 11 9 10 4 9 5 7 12 4094 SERIAL BUS MCU+V I/Os Vcc MCU Figure 28. Two antenna ports receiver - low cost solution 17V 24V ANT CONNECTORS VCC1 VCC2 LNBA LNBB 1 2 3 10 JB 4 7 5 9 VSEL ENT EN OSEL GND LNBP10SP MCU+V CEXT 8 4.7µF 6 2x 0.1µF 2x 47nF C1 + C3 C4 C5 C6 TUNER JA Vcc I/Os MCU I/Os 15/24 Typical application schematics LNBP20 / LNBP1X series Figure 29. Connecting together VCC1 and VCC2 24V ANT CONNECTORS VCC1 VCC2 LNBA LNBB 1 2 3 10 JB 4 7 5 9 VSEL ENT EN OSEL CEXT 8 4.7µF 6 0.1µF 2x 47nF C1 + C4 C5 C6 TUNER JA GND LNBP10SP MCU+V Vcc I/Os MCU I/Os Figure 30. Single antenna receiver with master receiver port - low cost solution 17V C2 AUX DATA 10µF 9 EXTM VCC1 VCC2 LNBA MI 4 7 5 VSEL ENT EN 6 GND LNBP13SP MCU+V 2x 0.1µF CEXT 10 8 4.7µF C1 + C3 C4 C5 47nF TUNER MASTER 1 2 3 ANT 24V Vcc I/Os MCU I/Os 16/24 LNBP20 / LNBP1X series Typical application schematics Figure 31. Single antenna receiver with overload diagnostic 17V MCU+V C2 AUX DATA R1 10µF 10 47K 4 7 5 9 EXTM VCC1 VCC2 LNBA OLF 8 4.7µF C1 + GND LNBP15SP 6 2x 0.1µF C3 C4 1 2 3 24V ANT VSEL ENT EN CEXT TUNER C5 47nF Vcc I/Os MCU I/Os 17/24 Package mechanical data LNBP20 / LNBP1X series 8 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. 18/24 LNBP20 / LNBP1X series Package mechanical data PowerSO-20 MECHANICAL DATA DIM. A a1 a2 a3 b c D (1) E e e3 E1 (1) E2 E3 G H h L N S T mm. MIN. 0.10 0 0.40 0.23 15.80 13.90 1.27 11.43 10.90 5.8 0 15.5 0.80 0° 10.0 11.10 2.90 6.2 0.10 15.9 1.10 1.10 10° 8° 0.4291 0.2283 0.0000 0.6102 0.0314 0° 0.3937 TYP MAX. 3.60 0.30 3.30 0.10 0.53 0.32 16.00 14.50 MIN. 0.0039 0 0.0157 0.0090 0.6220 0.5472 0.0500 0.4500 0.4370 0.1141 0.2441 0.0039 0.6260 0.0433 0.0433 10° 8° inch TYP. MAX. 0.1417 0.0118 0.1299 0.0039 0.0209 0.0013 0.630 0.5710 (1) “D and E1” do not include mold flash or protusions - Mold flash or protusions shall not exceed 0.15mm (0.006”) 0056635/I 19/24 Package mechanical data LNBP20 / LNBP1X series PowerSO-10 MECHANICAL DATA DIM. A A1 A2 A3 b c D D1 E E1 E2 E3 e L α 0.95 0° 3.40 1.25 0.40 0.35 9.40 7.40 13.80 9.30 7.20 5.90 1.27 1.65 8° 0.037 0° mm. MIN. TYP MAX. 3.70 0.10 3.60 1.35 0.53 0.55 9.60 7.60 14.40 9.50 7.60 6.10 0.134 0.049 0.016 0.014 0.370 0.291 0.543 0.366 0.283 0.232 0.050 0.065 8° MIN. inch TYP. MAX. 0.146 0.004 0.142 0.053 0.021 0.022 0.378 0.299 0.567 0.374 0.299 0.240 0068039-E 20/24 LNBP20 / LNBP1X series Package mechanical data Tape & Reel PowerSO-20 MECHANICAL DATA mm. DIM. MIN. A C D N T Ao Bo Ko Po P W 15.1 16.5 3.8 3.9 23.9 23.7 12.8 20.2 60 30.4 15.3 16.7 4.0 4.1 24.1 24.3 0.594 0.650 0.149 0.153 0.941 0.933 TYP MAX. 330 13.2 0.504 0.795 2.362 1.197 0.602 0.658 0.157 0.161 0.949 0.957 MIN. TYP. MAX. 12.992 0.519 inch 21/24 Package mechanical data LNBP20 / LNBP1X series Tape & Reel PowerSO10 MECHANICAL DATA mm. DIM. MIN. A C D N T Ao Bo Ko Po P W 14.9 9.9 4.15 3.9 23.9 23.7 12.8 20.2 60 30.4 15.1 10.1 4.35 4.1 24.1 24.3 0.587 0.390 0.163 0.153 0.941 0.933 TYP MAX. 330 13.2 0.504 0.795 2.362 1.197 0.594 0.398 0.171 0.161 0.949 0.957 MIN. TYP. MAX. 12.992 0.519 inch 22/24 LNBP20 / LNBP1X series Revision history 9 Table 6. Date Revision history Revision history Revision 7 8 9 10 Changes Typing Error VO1 and VO2 on Table 6 - Page 6. Table 2 has been updated on GND row. Add value VO on table 2 and new template. Order codes has been updated. 08-Jun-2004 21-Dec-2004 07-Sep-2006 03-May-2007 23/24 LNBP20 / LNBP1X series Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. © 2007 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 24/24