STB9NK60ZD
N-channel 600 V, 0.85 Ω typ., 7 A Zener-protected
SuperFREDMESH™ Power MOSFET (with fast diode) in D²PAK
Datasheet - production data
Features
TAB
Order code
VDS
RDS(on) max.
ID
PTOT
0.95 Ω
7A
125 W
STB9NK60ZDT4 600 V
• Extremely high dv/dt capability
3
1
• Zener-protected
D2PAK
• 100% avalanche tested
• Gate charge minimized
Figure 1. Internal schematic diagram
D(2, TAB)
• Low intrinsic capacitances
• Fast internal recovery diode
Applications
• Switching applications
• Fast internal recovery diode
G(1)
Description
S(3)
AM16813v1
The device is developed using the revolutionary
SuperFREDMesh™ technology. It associates all
advantages of reduced on-resistance, Zener gate
protection and very high dv/dt capability with a
fast body-drain recovery diode. Such series
complements the “FDmesh™” advanced
technology.
Table 1. Device summary
Order code
Marking
Package
Packaging
STB9NK60ZDT4
B9NK60ZD
D2PAK
Tape and reel
July 2013
This is information on a product in full production.
DocID9573 Rev 9
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www.st.com
14
Contents
STB9NK60ZD
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves)
............................. 6
3
Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5
Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
6
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
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STB9NK60ZD
1
Electrical ratings
Electrical ratings
Table 2. Absolute maximum ratings
Symbol
Parameter
Value
Unit
VDS
Drain-source voltage
600
V
VGS
Gate-source voltage
±30
V
ID
Drain current (continuous) at TC = 25 °C
7
A
ID
Drain current (continuous) at TC = 100 °C
4.3
A
Drain current (pulsed)
28
A
Total dissipation at TC = 25 °C
125
W
1
W/°C
4000
V
15
V/ns
- 55 to 150
°C
IDM
(1)
PTOT
VESD(G-S)
dv/dt (2)
Tj
Tstg
Derating factor
Gate-source ESD (HBM-C=100 pF, R=1.5
kΩ)
Peak diode recovery voltage slope
Max. operating junction temperature
Storage temperature
1. Pulse width limited by safe operating area.
2. ISD ≤ 7 A, di/dt ≤ 500 A/µs; VDD = 80% V(BR)DSS.
Table 3. Thermal data
Symbol
Parameter
Value
Unit
Rthj-case
Thermal resistance junction-case max.
1
°C/W
Rthj-pcb
Thermal resistance junction-pcb max.(1)
30
°C/W
Value
Unit
7
A
235
mJ
1. When mounted on 1 inch² FR-4, 2 Oz copper board.
Table 4. Avalanche characteristics
Symbol
Parameter
IAR
Avalanche current, repetitive or not repetitive (pulse
width limited by Tjmax)
EAS
Single pulse avalanche energy (starting Tj=25 °C, ID=
IAR; VDD= 50)
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Electrical characteristics
2
STB9NK60ZD
Electrical characteristics
(TC = 25 °C unless otherwise specified)
Table 5. On /off states
Symbol
V(BR)DSS
Parameter
Drain-source
breakdown voltage
Test conditions
ID = 1 mA, VGS = 0
Min.
Typ.
Max.
Unit
600
V
IDSS
Zero gate voltage
VDS = 600 V
drain current (VGS = 0) VDS = 600 V, TC = 125 °C
1
50
µA
µA
IGSS
Gate-body leakage
current (VDS = 0)
±10
µA
3.5
4.5
V
0.85
0.95
Ω
Min.
Typ.
Max.
Unit
-
5.3
S
-
1110
pF
-
135
pF
-
30
pF
-
72
pF
-
41
-
8.7
nC
-
21
nC
VGS = ± 20 V
VGS(th)
Gate threshold voltage VDS = VGS, ID = 100 µA
RDS(on)
Static drain-source
on-resistance
2.5
VGS = 10 V, ID = 3.5 A
Table 6. Dynamic
Symbol
Parameter
gfs(1)
Forward
transconductance
Ciss
Input capacitance
Coss
Output capacitance
Crss
Reverse transfer
capacitance
Coss eq.(2)
Equivalent output
capacitance
Qg
Total gate charge
Qgs
Gate-source charge
Qgd
Gate-drain charge
Test conditions
VDS = 15 V, ID= 3.5 A
VDS = 25 V, f = 1 MHz,
VGS = 0
VDS = 0 to 480 V, VGS = 0
VDD = 480 V, ID = 11 A,
VGS = 10 V (see Figure 15 )
53
1. Pulsed: pulse duration= 300 μs, duty cycle 1.5%.
2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS.
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nC
STB9NK60ZD
Electrical characteristics
Table 7. Switching times
Symbol
td(on)
Parameter
Test conditions
td(off)
tf
Typ.
Max.
Unit
-
11.4
-
ns
-
13.6
-
ns
-
23.1
-
ns
-
15
-
ns
-
11
-
ns
-
8
-
ns
-
20
-
ns
Turn-on delay time
VDD = 300 V, ID = 3.5 A,
RG = 4.7 Ω, VGS = 10 V (see
Figure 14 and Figure 19)
Rise time
tr
Min.
Turn-off delay time
Fall time
tr(Voff)
Off-voltage rise time
tf
Fall time
tc
Cross-overtime
VDD = 480 V, ID = 7 A,
RG = 4.7 Ω, VGS = 10 V (see
Figure 14 and Figure 19)
Table 8. Source - drain diode
Symbol
Parameter
Test conditions
Min.
Typ.
Max. Unit
Source-drain current
-
7
A
ISDM
(1)
Source-drain current (pulsed)
-
28
A
VSD
(2)
Forward on voltage
-
1.6
V
ISD
trr
ISD = 7 A, VGS = 0
Reverse recovery time
Qrr
Reverse recovery charge
IRRM
Reverse recovery current
trr
Reverse recovery time
Qrr
Reverse recovery charge
IRRM
Reverse recovery current
ISD = 7 A, di/dt = 100 A/µs
VDD = 30 V (see Figure 16)
ISD = 7 A, di/dt = 100 A/µs
VDD = 30 V, Tj = 150 °C (see
Figure 16)
-
130
ns
-
550
nC
-
8.4
A
-
176
ns
-
880
nC
-
10
A
1. Pulse width limited by safe operating area.
2. Pulsed: pulse duration= 300 μs, duty cycle 1.5%.
Table 9. Gate - source Zener diode
Symbol
BVGSO(1)
Parameter
Test conditions
Gate-source
breakdown voltage
Igs= ± 1 mA (open
drain)
Min.
30
Typ.
Max.
Unit
V
1. The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect, the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the
usage of external components.
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Electrical characteristics
2.1
STB9NK60ZD
Electrical characteristics (curves)
Figure 2. Safe operating area
Figure 3. Thermal impedance
Figure 4. Output characteristics
Figure 5. Transfer characteristics
Figure 6. Normalized BVDSS vs temperature
Figure 7. Static drain-source on-resistance
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STB9NK60ZD
Electrical characteristics
Figure 8. Gate charge vs gate-source voltage
Figure 9. Capacitance variations
Figure 10. Normalized gate threshold voltage vs
temperature
Figure 11. Normalized on-resistance vs
temperature
Figure 12. Source-drain diode forward
characteristics
Figure 13. Maximum avalanche energy vs
temperature
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Test circuits
3
STB9NK60ZD
Test circuits
Figure 14. Switching time test circuit for
resistive load
Figure 15. Gate charge test circuit
VDD
12 V
μF
VDD
VD
VGS
RG
1 kΩ
100nF
3.3
μF
2200
RL
47 kΩ
IG=CONST
Vi=20 V=VGMAX
2200
μF
D.U.T.
100 Ω
D.U.T.
VG
2.7 kΩ
PW
47 kΩ
1 kΩ
PW
AM16810v1
AM016809v1
Figure 16. Test circuit for inductive load
switching and diode recovery times
D
G
S
25 Ω
A
A
D.U.T.
FAST
DIODE
B
B
Figure 17. Unclamped inductive load test circuit
L
A
VD
L=100μH
B
D
3.3
μF
1000
μF
VDD
2200
μF
3.3
μF
VDD
ID
G
RG
S
Vi
D.U.T.
Pw
AM16811v1
AM16812v1
Figure 18. Unclamped inductive waveform
Figure 19. Switching time waveform
ton
V(BR)DSS
tdon
VD
toff
tr
tdoff
tf
90%
90%
IDM
10%
ID
VDD
10%
0
VDD
VDS
90%
VGS
AM01472v1
8/14
0
DocID9573 Rev 9
10%
AM01473v1
STB9NK60ZD
4
Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Table 10. D²PAK (TO-263) mechanical data
mm
Dim.
Min.
Typ.
Max.
A
4.40
4.60
A1
0.03
0.23
b
0.70
0.93
b2
1.14
1.70
c
0.45
0.60
c2
1.23
1.36
D
8.95
9.35
D1
7.50
E
10
E1
8.50
10.40
e
2.54
e1
4.88
5.28
H
15
15.85
J1
2.49
2.69
L
2.29
2.79
L1
1.27
1.40
L2
1.30
1.75
R
V2
0.4
0°
8°
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Package mechanical data
STB9NK60ZD
Figure 20. D²PAK (TO-263) drawing
0079457_T
Figure 21. D²PAK footprint(a)
16.90
12.20
5.08
1.60
3.50
9.75
a. All dimensions are in millimeters.
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Footprint
STB9NK60ZD
5
Packaging mechanical data
Packaging mechanical data
Table 11. D²PAK (TO-263) tape and reel mechanical data
Tape
Reel
mm
mm
Dim.
Dim.
Min.
Max.
A0
10.5
10.7
A
B0
15.7
15.9
B
1.5
D
1.5
1.6
C
12.8
D1
1.59
1.61
D
20.2
E
1.65
1.85
G
24.4
F
11.4
11.6
N
100
K0
4.8
5.0
T
P0
3.9
4.1
P1
11.9
12.1
Base qty
1000
P2
1.9
2.1
Bulk qty
1000
R
50
T
0.25
0.35
W
23.7
24.3
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Min.
Max.
330
13.2
26.4
30.4
11/14
Packaging mechanical data
STB9NK60ZD
Figure 22. D²PAK (TO-263) tape
10 pitches cumulative
tolerance on tape +/- 0.2 mm
T
P0
Top cover
tape
P2
D
E
F
W
K0
B0
A0
P1
D1
User direction of feed
R
Bending radius
User direction of feed
AM08852v2
Figure 23. D²PAK (TO-263) reel
T
REEL DIMENSIONS
40mm min.
Access hole
At sl ot location
B
D
C
N
A
Full radius
Tape slot
in core for
tape start 25 mm min.
width
G measured at hub
AM08851v2
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6
Revision history
Revision history
Table 12. Document revision history
Date
Revision
29-Sep-2003
6
Data updated.
13-Jun-2006
7
The doc. has been reformatted.
14-Apr-2008
8
Table 8 has been corrected.
Package mechanical data updated.
9
-The part numbers: STF9NK60ZD and STP9NK60ZD have been
moved to a separate datasheet.
-Changed the title and Figure 1.
-Added Zener-protected to the features.
-Minor text changes.
11-Jul-2013
Changes
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STB9NK60ZD
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