STD18NF03L

STD18NF03L Datasheet Automotive-grade N-channel 30 V, 38 mΩ typ., 17 A STripFET II Power MOSFET in a DPAK package Features TAB 2 3 1 DPAK • • • • D(2, TAB) Order code VDS RDS(on) max. ID STD18NF03L 30 V < 50 mΩ 17 A AEC-Q101 qualified Exceptional dv/dt capability 100% avalanche tested Low gate charge Applications G(1) • Switching applications Description S(3) AM01475v1_noZen This Power MOSFET has been developed using STMicroelectronics' unique STripFET process, which is specifically designed to minimize input capacitance and gate charge. This renders the device suitable for use as primary switch in advanced high-efficiency isolated DC-DC converters for telecom and computer applications, and applications with low gate charge driving requirements. Product status link STD18NF03L Product summary Order code STD18NF03L Marking 18NF03L Package DPAK Packing Tape and reel DS5403 - Rev 2 - April 2020 For further information contact your local STMicroelectronics sales office. www.st.com STD18NF03L Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage (VGS = 0 V) 30 V VGS Gate-source voltage ±16 V Drain current (continuous) at TC = 25 °C 17 A Drain current (continuous) at TC = 100 °C 12 A IDM(1) Drain current (pulsed) 68 A PTOT Total power dissipation at TC = 25 °C 30 W Derating Factor 0.2 W/°C 7 V/ns 200 mJ -55 to 175 °C Value Unit ID dv/dt(2). (3) EAS Tstg TJ Peak diode recovery avalanche energy Single pulse avalanche energy Storage temperature range Operating junction temperature range 1. Pulse width limited by safe operating area. 2. ISD ≤ 17 A, di/dt ≤ 300 A/μs, VDD = V(BR)DSS, TJ ≤ TJ max. 3. Starting TJ = 25 °C, ID = 8.5 A, VDD = 15 V. Table 2. Thermal data Symbol Rthj-case Thermal resistance junction-case max 5.0 °C/W Rthj-amb Thermal resistance junction-to ambient max 100 °C/W Maximum lead temperature for soldering purpose 275 °C TJ DS5403 - Rev 2 Parameter page 2/15 STD18NF03L Electrical characteristics 2 Electrical characteristics TC = 25 °C unless otherwise specified Table 3. On-/off-states Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage VGS = 0 V, ID = 250 μA Min. Typ. Max. 30 Unit V VGS = 0 V, VDS = max rating 1 µA VGS = 0 V, VDS = max rating, TC = 125 °C 10 µA ±100 nA 1.5 2.2 V VGS = 10 V, ID = 8.5 A 38 50 VGS = 5 V, ID = 8.5 A 45 60 Min. Typ. Max. - 12 S - 320 pF - 155 pF - 28 pF IDSS Zero gate voltage drain current IGSS Gate-body leakage current VDS = 0 V, VGS = ±16 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA RDS(on) Static drain-source on-resistance 1.0 mΩ Table 4. Dynamic Symbol Parameter Test conditions Unit gfs(1) Forward transconductance Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge VDD = 24 V, ID = 17 A - 4.8 Qgs Gate-source charge RG = 4.7 Ω, VGS = 5 V - 2.25 nC Qgd Gate-drain charge (see Figure 14. Test circuit for gate charge behavior) - 1.7 nC Min. Typ. VDS > ID(on) x RDS(on) max., ID = 8.5A VDS = 25 V, f = 1 MHz, VGS = 0 V 6.5 nC 1. Pulsed: Pulse duration = 300 μs, duty cycle 1.5%. Table 5. Switching times Symbol td(on) tr td(off) tf DS5403 - Rev 2 Parameter Test conditions Max. Unit Turn-on delay time VDD = 15 V, ID = 8.5 A, - 11 ns Rise time RG = 4.7 Ω, VGS = 5 V - 100 ns Turn-off delay time (see Figure 13. Test circuit for resistive load switching times and Figure 18. Switching time waveform) - 25 ns - 22 ns Fall time page 3/15 STD18NF03L Electrical characteristics Table 6. Source-drain diode Symbol ISD Parameter Test conditions Min. Typ. Max. Unit Source-drain current - 22 A ISDM(1) Source-drain current (pulsed) - 88 A VSD(2) Forward on voltage ISD = 17 A, VGS = 0 V - 1.5 V trr Reverse recovery time ISD = 17 A, di/dt = 100 A/µs, - 28 ns Qrr Reverse recovery charge VDD = 15 V, TJ = 150 °C - 18 nC Reverse recovery current (see Figure 15. Test circuit for inductive load switching and diode recovery times) - 1.3 A IRRM 1. Pulse width limited by safe operating area. 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%. DS5403 - Rev 2 page 4/15 STD18NF03L Electrical characteristics (curves) 2.1 DS5403 - Rev 2 Electrical characteristics (curves) Figure 1. Safe operating area Figure 2. Thermal impedance Figure 3. Output characteristics Figure 4. Transfer characteristics Figure 5. Transconductance Figure 6. Static drain-source on resistance page 5/15 STD18NF03L Electrical characteristics (curves) Figure 7. Gate charge vs. gate-source voltage Figure 8. Capacitance variations Qg (nC) Figure 9. Normalized gate threshold voltage vs temperature Figure 10. Normalized on resistance vs temperature Figure 11. Source-drain diode forward characteristics Figure 12. Normalized breakdown voltage vs temperature DS5403 - Rev 2 page 6/15 STD18NF03L Test circuits 3 Test circuits Figure 13. Test circuit for resistive load switching times Figure 14. Test circuit for gate charge behavior VDD 12 V 2200 + μF 3.3 μF VDD VD VGS 1 kΩ 100 nF RL IG= CONST VGS RG 47 kΩ + pulse width D.U.T. 2.7 kΩ 2200 μF pulse width D.U.T. 100 Ω VG 47 kΩ 1 kΩ AM01469v1 AM01468v1 Figure 15. Test circuit for inductive load switching and diode recovery times D G A D.U.T. S 25 Ω A L A B B 3.3 µF D G + VD 100 µH fast diode B Figure 16. Unclamped inductive load test circuit RG 1000 + µF 2200 + µF VDD 3.3 µF VDD ID D.U.T. S D.U.T. Vi _ pulse width AM01471v1 AM01470v1 Figure 18. Switching time waveform Figure 17. Unclamped inductive waveform ton V(BR)DSS td(on) VD toff td(off) tr tf 90% 90% IDM VDD 10% 0 ID VDD AM01472v1 VGS 0 VDS 10% 90% 10% AM01473v1 DS5403 - Rev 2 page 7/15 STD18NF03L Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 4.1 DPAK (TO-252) type A package information Figure 19. DPAK (TO-252) type A package outline 0068772_A_27 DS5403 - Rev 2 page 8/15 STD18NF03L DPAK (TO-252) type A package information Table 7. DPAK (TO-252) type A mechanical data Dim. mm Min. Max. A 2.20 2.40 A1 0.90 1.10 A2 0.03 0.23 b 0.64 0.90 b4 5.20 5.40 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 D1 4.95 E 6.40 E1 4.60 4.70 4.80 e 2.159 2.286 2.413 e1 4.445 4.572 4.699 H 9.35 10.10 L 1.00 1.50 (L1) 2.60 2.80 3.00 L2 0.65 0.80 0.95 L4 0.60 R V2 DS5403 - Rev 2 Typ. 5.10 5.25 6.60 1.00 0.20 0° 8° page 9/15 STD18NF03L DPAK (TO-252) type A package information Figure 20. DPAK (TO-252) type A recommended footprint (dimensions are in mm) FP_0068772_27 DS5403 - Rev 2 page 10/15 STD18NF03L DPAK (TO-252) packing information 4.2 DPAK (TO-252) packing information Figure 21. DPAK (TO-252) tape outline 10 pitches cumulative tolerance on tape +/- 0.2 mm T P0 Top cover tape P2 D E F B1 K0 For machine ref. only including draft and radii concentric around B0 W B0 A0 P1 D1 User direction of feed R Bending radius User direction of feed AM08852v1 DS5403 - Rev 2 page 11/15 STD18NF03L DPAK (TO-252) packing information Figure 22. DPAK (TO-252) reel outline T 40mm min. access hole at slot location B D C N A G measured at hub Tape slot in core for tape start 2.5mm min.width Full radius AM06038v1 Table 8. DPAK (TO-252) tape and reel mechanical data Tape Dim. mm mm Dim. Min. Max. A0 6.8 7 A B0 10.4 10.6 B 1.5 12.1 C 12.8 1.6 D 20.2 G 16.4 50 B1 DS5403 - Rev 2 Reel Min. Max. 330 13.2 D 1.5 D1 1.5 E 1.65 1.85 N F 7.4 7.6 T K0 2.55 2.75 P0 3.9 4.1 Base qty. 2500 P1 7.9 8.1 Bulk qty. 2500 P2 1.9 2.1 R 40 T 0.25 0.35 W 15.7 16.3 18.4 22.4 page 12/15 STD18NF03L Revision history Table 9. Document revision history DS5403 - Rev 2 Date Version 27-Jul-2007 1 29-Apr-2020 2 Changes First release. Updated Title, Internal schematic, Features and Device summary in cover page. Minor text changes. page 13/15 STD18NF03L Contents Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 4.1 DPAK (TO-252) type A package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.2 DPAK (TO-252) packing information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 DS5403 - Rev 2 page 14/15 STD18NF03L IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. 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Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2020 STMicroelectronics – All rights reserved DS5403 - Rev 2 page 15/15