STD90NS3LLH7
N-channel 30 V, 2.8 mΩ typ., 80 A STripFET™ H7
Power MOSFET plus monolithic Schottky in a DPAK package
Datasheet - production data
Features
Order code
VDS
RDS(on) max.
ID
PTOT
STD90NS3LLH7
30 V
3.4 mΩ
80 A
57 W
Figure 1: Internal schematic diagram
Applications
D(2, TAB)
Very low on-resistance
Very low gate charge
High avalanche ruggedness
Embedded Schottky diode
Switching applications
Description
This device exhibits low on-state resistance and
capacitance for improved conduction and
switching performance.
G(1)
S(3)
NG1D2TS3Sch
Table 1: Device summary
Order code
Marking
Package
Packing
STD90NS3LLH7
90NS3LLH7
DPAK
Tape and reel
February 2016
DocID025367 Rev 4
This is information on a product in full production.
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www.st.com
Contents
STD90NS3LLH7
Contents
1
Electrical ratings ............................................................................. 3
2
Electrical characteristics ................................................................ 4
2.1
Electrical characteristics (curves) ...................................................... 5
3
Test circuits ..................................................................................... 7
4
Package information ....................................................................... 8
5
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4.1
DPAK (TO-252) type A package information..................................... 8
4.2
DPAK (TO-252) packing information ............................................... 11
Revision history ............................................................................ 13
DocID025367 Rev 4
STD90NS3LLH7
1
Electrical ratings
Electrical ratings
Table 2: Absolute maximum ratings
Symbol
Parameter
Value
Unit
VDS
Drain-source voltage
30
V
VGS
Gate-source voltage
±20
V
Drain current (continuous) at TC = 25 °C
80
A
Drain current (continuous) at TC = 100 °C
65
A
Drain current (pulsed)
320
A
Total dissipation at TC = 25 °C
57
W
-55 to 150
°C
ID(1)
IDM(1)(2)
PTOT
(1)
Tstg
Storage temperature
Tj
Operating junction temperature
Notes:
(1)This
value is rated according to Rthj-c and limited by wire bonding
(2)Pulse
width limited by safe operating area.
Table 3: Thermal data
Symbol
Rthj-pcb
(1)
Rthj-case
Parameter
Value
Thermal resistance junction-pcb max
50
Thermal resistance junction-case max
2.2
Unit
°C/W
Notes:
(1)When
mounted on a 1 inch², FR-4 board, 2oz Cu
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Electrical characteristics
2
STD90NS3LLH7
Electrical characteristics
(TC = 25 °C unless otherwise specified)
Table 4: Static
Symbol
V(BR)DSS
Parameter
Test conditions
Min.
Typ.
Max.
Drain-source breakdown voltage
ID = 1 mA, VGS = 0 V
IDSS
Zero gate voltage drain current
VGS = 0 V, VDS = 24 V
500
µA
IGSS
Gate-body leakage current
VGS = ±20 V, VDS = 0 V
±100
nA
Gate threshold voltage
VDS = VGS, ID = 1 mA
VGS(th)
RDS(on)
30
Unit
V
1.2
V
VGS = 10 V, ID = 40 A
2.8
3.4
mΩ
VGS = 4.5 V, ID = 40 A
4.1
5.3
mΩ
Min.
Typ.
Max.
Unit
-
2110
-
-
640
-
-
42
-
-
13.7
-
-
7.5
-
-
3.3
-
0.4
0.7
2
Ω
Test conditions
Min.
Typ.
Max.
Unit
VDD = 15 V, ID = 40 A, RG = 4.7 Ω,
VGS = 4.5 V (see Figure 12: "Test
circuit for resistive load switching
times" and Figure 17: "Switching
time waveform")
-
26.4
-
-
10.4
-
-
31.8
-
-
12.5
-
Min.
Typ.
Max.
Unit
-
0.4
0.7
V
-
35.2
ns
-
26.4
nC
-
1.5
A
Static drain-source on-resistance
Table 5: Dynamic
Symbol
Ciss
Parameter
Test conditions
Input capacitance
VDS = 25 V, f = 1 MHz,
VGS = 0 V
Coss
Output capacitance
Crss
Reverse transfer capacitance
Qg
Total gate charge
Qgs
Gate-source charge
Qgd
Gate-drain charge
Rg
Gate input resistance
VDD = 15 V, ID = 80 A,
VGS = 4.5 V (see Figure 13:
"Test circuit for gate charge
behavior"
f = 1 MHz, gate DC;
Bias = 0, test signal
level = 20 mV, ID = 0 A
pF
nC
Table 6: Switching times
Symbol
td(on)
tr
td(off)
tf
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
ns
Table 7: Source drain diode
Symbol
VSD(1)
Parameter
Test conditions
Forward on voltage
ISD = 2 A, VGS = 0 V
trr
Reverse recovery time
Qrr
Reverse recovery
charge
IRRM
Reverse recovery
current
ID = 40 A, di/dt = 100 A/µs,
VDD = 20 V (see Figure 14: "Test
circuit for inductive load
switching and diode recovery
times")
Notes:
(1)Pulsed:
4/14
pulse duration = 300 µs, duty cycle 1.5%
DocID025367 Rev 4
STD90NS3LLH7
2.1
Electrical characteristics
Electrical characteristics (curves)
Figure 2: Safe operating area
Figure 3: Thermal impedance
Figure 4: Output characteristics
Figure 5: Transfer characteristics
Figure 6: Gate charge vs gate-source voltage
Figure 7: Static drain-source on-resistance
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Electrical characteristics
6/14
STD90NS3LLH7
Figure 8: Capacitance variations
Figure 9: Normalized gate threshold voltage
vs temperature
Figure 10: Normalized on-resistance vs
temperature
Figure 11: Normalized V(BR)DSS vs
temperature
DocID025367 Rev 4
STD90NS3LLH7
3
Test circuits
Test circuits
Figure 12: Test circuit for resistive load
switching times
Figure 13: Test circuit for gate charge
behavior
Figure 14: Test circuit for inductive load
switching and diode recovery times
Figure 15: Unclamped inductive load test
circuit
Figure 16: Unclamped inductive waveform
DocID025367 Rev 4
Figure 17: Switching time waveform
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Package information
4
STD90NS3LLH7
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
4.1
DPAK (TO-252) type A package information
Figure 18: DPAK (TO-252) type A package outline
0068772_A_21
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DocID025367 Rev 4
STD90NS3LLH7
Package information
Table 8: DPAK (TO-252) type A mechanical data
mm
Dim.
Min.
Typ.
Max.
A
2.20
2.40
A1
0.90
1.10
A2
0.03
0.23
b
0.64
0.90
b4
5.20
5.40
c
0.45
0.60
c2
0.48
0.60
D
6.00
6.20
D1
4.95
E
6.40
E1
4.60
4.70
4.80
e
2.16
2.28
2.40
e1
4.40
4.60
H
9.35
10.10
L
1.00
1.50
(L1)
2.60
2.80
3.00
L2
0.65
0.80
0.95
L4
0.60
R
V2
5.10
5.25
6.60
1.00
0.20
0°
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8°
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Package information
STD90NS3LLH7
Figure 19: DPAK (TO-252) recommended footprint (dimensions are in mm)
FP_0068772_21
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DocID025367 Rev 4
STD90NS3LLH7
4.2
Package information
DPAK (TO-252) packing information
Figure 20: DPAK (TO-252) tape outline
DocID025367 Rev 4
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Package information
STD90NS3LLH7
Figure 21: DPAK (TO-252) reel outline
Table 9: DPAK (TO-252) tape and reel mechanical data
Tape
Reel
mm
mm
Dim.
Dim.
Min.
Max.
A0
6.8
7
A
B0
10.4
10.6
B
1.5
12.1
C
12.8
B1
12/14
D
1.5
D1
1.5
E
1.65
F
1.6
Min.
Max.
330
13.2
D
20.2
G
16.4
1.85
N
50
7.4
7.6
T
K0
2.55
2.75
P0
3.9
4.1
Base qty.
2500
P1
7.9
8.1
Bulk qty.
2500
P2
1.9
2.1
R
40
T
0.25
0.35
W
15.7
16.3
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18.4
22.4
STD90NS3LLH7
5
Revision history
Revision history
Table 10: Document revision history
Date
Revision
17-Apr-2014
1
First release.
2
Text and formatting changes throughout document
Removed all TO-220 (STP90NS3LLH7) package references and
data
On cover page:
- updated title and Features
In section Electrical ratings
updated table Absolute maximum ratings
In section Electrical characteristics
- updated and renamed table Static (was On /off states)
- updated tables Dynamic and Source drain diode
Added section Electrical characteristics (curves)
Updated and renamed section Package information (was Package
mechanical data)
29-Oct-2015
3
Updated title and features in cover page.
Updated Table 2: "Absolute maximum ratings", Table 5: "Dynamic"
and Figure 2: "Safe operating area".
Minor text changes.
10-Feb-2016
4
Document status promoted from preliminary to production data.
07-Sep-2015
Changes
DocID025367 Rev 4
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STD90NS3LLH7
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2016 STMicroelectronics – All rights reserved
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